6602 Multiple Counter Output

Hi
I would like to output a counter signal on all eight of my outputs on the PCI6602. These outputs have to be able to be stopped individually. How do I do this in labview 8.

Hi Chris,
There is a great shipping example that comes with DAQmx named "Gen Dig Pulse Train-Continuous.vi" which will do what you are looking for on a single counter. To get to this, go to the NI Example Finder and browse to Hardware Input and Output>>DAQmx>>Generating Digital Pulses.
To expand this to all 8 counters on your 6602 there are 2 options:
The easiest way is to copy the code 7 times, to have a total of 8 seperate counter tasks, with 8 parallel while loops that all poll for a stop condition. Although not the prettiest, this should be very easy to create starting from the example mentioned above.
A sleeker way to accomplish this is to reuse the same DAQmx code inside of auto-indexed for loops. Attached is a modified version of the original example that should work for all 8 counters, and give you individual control of all of them.
Hopefully this helps you get up and running!
Have a great day!
Travis W
Attachments:
Gen Dig Pulse Train-Continuous - Multiple Counters - Individual Control.vi ‏44 KB

Similar Messages

How to import 6602's counter output to PFI3 of the 6534 board?

Dear friends,
I have the following problem:
I am trying to import the output of one of the counters of the 6602 board (counter 4) to
the REQ2 (PFI3) line of the 6543 board (please see the VI attached). But I do
not see any signal on the PFI3 line though the VI runs without errors.
The situation is the same if I connect output of the counter to the PFI3 directly in the "Connect Terminals" VI instead of connecting it via PXI_Trig4 line.
I need your help to understand why is it so and how can I accomplish the
"import" task.
Thanks in advance!
Attachments:
counterImport.vi ‏28 KB

Hi Andrew,
You are absolutely right - there should be PFI20 instead of PFI26.
It works now. Thank you!
.....I hope you can give some ideas with regard to the following problem:
In a program I used four 6602's counters (counters 0-3) to generate single trigger
pulses on the backplane of the PXI.
It worked fine.
Now I want to incorporate the fifth counter into the program (counter 4) to
generate a finite pulse sequence on the PFI3 line of the 6534 board.
And I can not do this.
Code example is in the VI attached.
When I try to run this VI it gives error:
Error -89137 occurred at DAQmx Connect Terminals.vi:4
Possible reason(s):
Specified route cannot be satisfied, because it requires resources that are
currently in use by another route.
Source Device: TimingIO
Source Terminal: PFI36
Destination Device: TimingIO
Destination Terminal: PXI_Trig0
Required Resources in Use by
Source Device: TimingIO
Source Terminal: PFI20
Destination Device: TimingIO
Destination Terminal: PXI_Trig4
I do not understand why it happens and how to correct this....
Thanks!
Attachments:
counterImport 2.vi ‏79 KB

Can I generate pulse trains on more than one counter output at the same time?

I have a PCI 6601 card with a BNC 2121 to connect the signals to two devices. The card is used as a trigger for both devices and I want to be able to generate pulse trains on two output channels at the same time, with a time delay between the two. How do I do that in Labview 7.1 Development with DAQmx?

I feel foolish for not being able to figure this out, but it still doesn't work. Attached is the VI I use now. Counter 0 generates a finite pulse train and I programmed Counter 1 to generate a retriggerable single pulse triggered by CtrOinternaloutput. I still get the same error message: -50103 The specified resource is reserved. The operation could not be completed as specified.
The same happens if I set the trigger for counter 1 at PFI36 (default output of counter 0) or any other PFI line. If I try a pulse train generation on only one of the counters, both work fine.
If I try the example in traditional DAQ for multiple counter outputs with phase delay, it works fine.
Can you tell me what I'm doing wrong?
Attachments:
Shutter_AND_lamp_trigger.vi ‏103 KB

How to filter starttrigger on counter output precisely

HW PCI6602
Measurement studio 2008 (C#)NI-DAQmx 9.02I’m trying to trig a camera using the output from a counter.
The camera should be trigged when the counter input pulse width is larger than approx (filterPulseWidth 10us).To do this a have set up the following tasktask.COChannels.CreatePulseChannelTime(counter, "TriggerTaskChannel", COPulseTimeUnits.Seconds, COPulseIdleState.Low, 0, 80E-6, 0.007); task.Triggers.StartTrigger.Type = StartTriggerType.DigitalEdge; task.Triggers.StartTrigger.DigitalEdge.Edge = DigitalEdgeStartTriggerEdge.Rising; task.Triggers.StartTrigger.Retriggerable = true;task.Triggers.StartTrigger.DigitalEdge.DigitalFilterMinimumPulseWidth = filterPulseWidth; task.Triggers.StartTrigger.DigitalEdge.DigitalFilterEnable = true;Unfortunatly this filter has the following behaviour”If the period of the filter clock timebase is tfltrclk, this filter guarantees topass pulse widths that are 2*tfltrclk or longer and to block pulse widths thatare tfltrclk or shorter. A pulse with a width between these two ranges may ormay not pass, depending on the phase of the pulse with respect to the filterclock timebase”.It means that I have no sharp distinction on my filter as one would when applying a filter to an ordinary pulse width measuring task. Implementing this with via the software in a callback is to slow.The bottom line is that I would like to generate a pulse on my counter output when the trigger/counter input is greater than say 10us. The output pulse could be predetermind as in the sample code above or as long as the filtered input (I.e counter just pass filtered input to my output).How can this be done? BR
Jongas
Solved!
Go to Solution.

Hi Jongas,
Is it OK if the trigger is sent once the pulse hits 10 us, rather than
on the exact falling edge? I'll assume the exact timing isn't as important, but you would like the trigger to occur very close to the falling edge (within a couple of us). The important thing is that we trigger as close as possible to when the PWM has hit 50% duty cycle.
Some brainstorming:
Digital Filtering on the 660x Isn't the Best for This:
Digital filtering might not be as practical here on your 6602 due to the region of uncertainty between 5 and 10 (or 10 and 20) us pulses. The TIO boards count two consecutive edges of a filter clock to determine when to pass a signal through so the guaranteed rejected pulse width is always half of your guaranteed passed pulse width (providing an external filter clock timebase that is synchronized with your external signal could potentially reduce this uncertainty but I honestly haven't tried this before and I would imagine it is not going to be very straightforward).
X Series Alternative:
Our X Series devices use a different method of digital filtering that would work better for you. If a hardware change is an option (and you can use PCIe) then you might consider this. You could use the 20 MHz timebase as your filter clock timebase and could guarantee to pass 10 us (200/20M) and reject 9.95 us (201/20M). The 6320 is currently our lowest cost X Series board. A couple of points about this solution:
1. To configure the PFI filter, you need to use some sort of dummy task to
access the property nodes. Here is an
example of this (although it is written in LabVIEW).
2. You can route the filtered PFI signal to be exported on another PFI line, but this will reserve Counter 3. This is documented in the Device Routes tab of Measurement and Automation Explorer.
3. The filtered output will be 9.95-10 us delayed from the input signal, so you could trigger the camera off of the rising edge of the filtered output directly and be fairly close to the actual falling edge.
External AND Gate Alternative:
You could configure a Counter Output to generate a re-triggerable pulse with a 10 us initial delay (to be triggered off of the rising edge of your PWM signal). Assuming the pulse is short enough to complete before the next period of your PWM signal, the counter output would only be high at the same time as the PWM signal if the signal was longer than 10 us. Use the external AND gate to combine these two signals and the result would be the trigger for your camera (the rising edge would correspond to 10 us after the PWM signal first goes high).
If you wanted to you could make the counter output pulse a little longer (say 8 us) and trigger the camera off of the falling edge out of the AND gate (a.k.a. rising edge out of a NAND gate) which would line up with the exact falling edge of the PWM signal. Don't make the CO pulse too long or it will overlap with the next period of the PWM.
Another Idea:
One idea that I keep coming back to is to use the internal rollover event of a counter input task (a pulse is generated whenever a counter rolls over on its Internal Output which can be routed to a PFI line). I don't think this will work, but the idea in theory would be to:
1. Set Default state to known value (e.g. 2^32-200).
2. Gate the Counter so it only counts during the time PWM is high. Have it count the 20 MHz timebase.
3. Reset the Counter to default state on the falling edge of the PWM signal.
4. The counter would rollover if 200 pulses occurred of the 20 MHz timebase (10 us), and the Counter Output could be routed to a PFI line to trigger the camera.
The problem is that there is no good way to reset the counter except for an encoder measurement (Kevin has already made a nice suggestion about this). A Pulse Width Measurement would technically reset the counter, but you cannot currently set the default value of a Pulse Width Measurement task so there is no way to make the rollover happen prematurely).
Configuring an encoder measurement and working with the multiple counters on the 6602 to produce appropriate A,B, and Z signals might be a method to look into further, but at this point I think you'd be better off with an external AND gate.
I don't want to say it's impossible with just the 6602, but I can't think of a straightforward way to go about it without external hardware (although maybe I can sleep on it and think of something later... how many counters do you have to work with?).
With your current NI Hardware, I think your best bet is to go with an external AND gate. If you're planning on purchasing an X Series card the digital filtering idea is actually not a bad way to go.
I hope this is helpful!
Best Regards,
John Passiak

Counter Output/Counter Input PXI Signals Behaving Erratically

Question for all your LabVIEW guru's out there,
I am running a frequency loopback test using the NI PXI 6229 MIO DAQ card. I am generating a "Counter Output" pulse train signal which feeds through my device under test and then back out of my device under test and back into the PXI 6229 for a "Counter Input" frequency measurement. Both the "Counter Output" and the "Counter Input" are assigned different PFI lines using DAQmx in LabVIEW.
I have 4 lines to test on my DUT. All four lines run this same frequency measurement but with different PFI lines on the PXI 6229. Each line is test independently.
This is my setup for the 4 lines:
Path 1: P2.0 (Counter Output - Pulse Train) -> DUT (Device Under Test) -> P2.1 (Counter Input - Frequency Measurement)
Path 2: P2.2 (Counter Output - Pulse Train) -> DUT (Device Under Test) -> P2.3 (Counter Input - Frequency Measurement)
Path 3: P2.4 (Counter Output - Pulse Train) -> DUT (Device Under Test) -> P2.5 (Counter Input - Frequency Measurement)
Path 4: P2.6 (Counter Output - Pulse Train) -> DUT (Device Under Test) -> P2.7 (Counter Input - Frequency Measurement)
where:
P2.0 = PFI8
P2.1 = PFI9
P2.2 = PFI10
P2.3 = PFI11
P2.4 = PFI12
P2.5 = PFI13
P2.6 = PFI14
P2.7 = PFI15
I have a LabVIEW VI which generates the "Counter Output" and reads the "Counter Input" frequency. I am seeing weird behavior from the PXI 6229 card. I can test "Path 1" and "Path 2" and the frequency I read is what I generated. No issue there. However, when I test "Path 3" and "Path 4" the frequency measurement is erratic. The readings are two different frequencies repeated over and over again and none of those frequencies are the expected frequency which was generated out of the "Counter Output." If I reset the card, and start by testing "Path 3" and "Path 4" the frequency readings are correct and the erratic behavior is gone. However, when I try to then test "Path 2" and "Path 1" now those lines have the erratic frequency issue. I can continue resetting the card and see same issue. The PFI lines that I test first will always pass.
To summarize:
Steps Taken:
1. Test Path 1 = SUCCESS
2. Test Path 2 = SUCCESS
3. Test Path 3 = Erratic Frequency (Two Frequencies repeated over and over again in my frequency results array)
4. Test Path 4 = Erratic Frequency (Two Frequencies repeated over and over again in my frequency results array)
5. Reset the PXI 6229 Card
6. Test Path 3 = SUCCESS
7. Test Path 4 = SUCCESS
8. Test Path 3 = Erratic Frequency (Two Frequencies repeated over and over again in my frequency results array)
9. Test Path 4 = Erratic Frequency (Two Frequencies repeated over and over again in my frequency results array)
I am wondering if Port 2 (P2.0-P2.7) on the 6229 card has certain dependecies and this is why I am seeing issues. I am trying to get around this issue so that I don't have to always reset the card.
Are P2.0-P2.3 (PFI8-PFI11) and P2.4-P2.7 (PFI12-PFI15) treated differently or require different setup? How do I resolve this issue?
Thanks so much!

I have a theory...
The DAQ card follows a policy called "lazy uncommit" wherein the terminal used for the output will continue to be connected to the counter even after the task has completed (until the terminal is needed for something else). So as you run more tests, the counter output will end up driving more lines. This behavior should be easy enough to confirm.
As the DAQ card drives more lines, I'd imagine this affects the actual signal. You could scope it to check, but it sounds like either the rise/fall times are becoming longer or some extra noise is being introduced on the line.
The readings are two different frequencies repeated over and over again and none of those frequencies are the expected frequency which was generated out of the "Counter Output."
This implies you are picking up an extra edge during transitions--this isn't too uncommon if the signal is noisy since there is no built-in hysteresis on the DAQ card. I would expect the measured frequencies to have periods that sum to either the full period or the semi-period of your actual signal (depending on how many duplicate edges are detected).
Suggestions are as follows:
To stop the DAQ card from driving multiple PFI lines, it would probably be easiest to just programmatically reset the device in between your tests (using DAQmx Reset Device). If you can't reset the device (e.g. because you are running some other task that can't be interrupted) then you can instead configure a dummy task that uses the PFI line in question as an input.
To stop the DAQ card from picking up multiple edges during transitions, you should configure a digital filter on the input terminals. If you reset the device it sounds like this might not be necessary... it's up to you if you want to configure this or not.
Best Regards,
John Passiak

How to Immediately Change Counter Output Rate?

I have a piece of code that largely works like this example: http://zone.ni.com/devzone/cda/epd/p/id/5493
In other words, I set up the Counter Output with some initial frequency and duty cycle, but then during the main loop of my program I continuously change the frequency to a new value based on other criteria.
I'm using an M-series PXI card and LabVIEW RT.
The problem I'm having is that the card waits for the next edge before changing the counter output rate. For instance, lets say it is going at a low frequency and I am upping to a high frequency. If the command arrives in the middle of the current pulse, it will wait to complete the low-rate pulse before starting the high frequency output. Is there a way to make it interrupt the current count and immediately start counting at the new rate?
Thanks,
Isaac

Hi Isaac,
I posted the code in LV 8.2 so you should be able to open it now (it sometimes takes several minutes to upload).
There are a few limitations to using the digital lines instead of the counters:
1. The digital lines are updated off of a sample clock which will be much slower than a timebase. For example, on the 6221 the maximum update rate is 1 MHz, while the counter output has a max timebase of 80 MHz. As a result, the number of frequencies you can generate are going to be more restricted (divide down from 1 MHz vs. 80 MHz).
2. On M series devices, the digital lines must be clocked from an external source. This could be generated from a counter
3. You have to build the digital waveform, which is a bit tricky (I think the example code should help out with that but I haven't had time to thoroughly test it).
4. If you are generating digital lines at fast rates, you will need to write quite a few samples at a time to the output buffer to ensure the data does not underflow. If the buffer includes multiple periods of the digital signal, you would have the case that using the counter output would still update more immediately.
Again, to determine the best course of action it would be useful to know what frequencies you want to generate and which exact hardware you are using. I just mentioned the digital lines as an alternative to the counters, but it might not be ideal for your situation.
-John
John Passiak

"loopback" counter output without wiring

Cross posted from another forum for more visibility:
Basically, I have a counter output being generated on a trigger line. It's just a pulse at defined intervals of 1 hz. The problem is, the card that is generating the output needs the trigger itself, but if it is using the trigger line to output the trigger itself, it can't read it. I know I can get around this with a timing and synch card, and possibly with external wiring, but is there any way to do this all in the backplane?
In summary, can I have a AO card generating a counter output on a trigger line use that output as a trigger for itself in some way, without extra wiring or a 6672 card?
CLA, LabVIEW Versions 2010-2013

Jeff·Þ·Bohrer wrote:
Greg,
What are you really triing to do? your post is a bit more cryptic than usual.
My instinct says "a single board RIO" would do the trick. but, that's a lot of capability to throw at a simple PFIO line. What did you get yourself into this time?
NO NO NO. No sbRIO. Did NI pay you to help market now?!
All I want to do is have a digital pulse, which I can use as a start trigger for ALL my AI and AO. Some tasks stop and restart while others keep running continuously. When the select tasks restart, they need to sync back up with the continuously running tasks, and they do so by using this start trigger again. This is not a clock sync, think of it like a "wait until next ms multiple." I resolve this by having a digital pulse happening every "x millseconds" which I use as my start trigger. If a task restarts, it will again wait for this pulse.
The problem is, if I am generating this trigger on PXI1Slot12/PXI_trig0, I cannot also trigger off of this trigger line in slot 12.
CLA, LabVIEW Versions 2010-2013

6602 Synchronize 4 outputs by matlab

Hello,
I am trying to use PCI-6602 counters to generate 4 pulses that start together. The width of these 4 pulses are ms level. However, the delay between channels is ms level too. So how to synchronize trigger the start and stop of 4 channels (with different duty cycle) by matlab?
I tried to use an external signal to trigger 4 channels together buy using 'addTriggerConnection', 'External' as source. But it didn't work. Matlab said Trigger and clock connections will not affect counter output channels.
And how to connect wires?
Thanks.

Hi Lindsay,
If you are using the MATLAB® Data Acquisition Toolbox™ to program the PCI-6602, please contact the MathWorks support team since they will be better suited to answer MATLAB programming questions.
To accomplish this in LabVIEW and our NI-DAQmx driver, you can use the information in these documents:
Using a Digital I/O Line as the Start Trigger with a PCI-6602 (you don't have to wire any external lines)
http://digital.ni.com/public.nsf/allkb/9052D691C228A56686256CFB00611D0D
Timing and Synchronization Features of NI-DAQmx (If you want to use an external line, take a look at Figure 4)
http://www.ni.com/white-paper/4322/en/
MATLAB® and Data Acquisition Toolbox™ is a registered trademark of The MathWorks, Inc.
Sincerely,
Aldo A
Applications Engineer
National Instruments

Counter output becomes unsnchronized when gated with an other counter

Dear all
i'm using a PCI-6602 to generate a range of different pulse trains / retriggered pulses. Ctr0 is running at the experiments base frequency (T0) and is configured like this:
Error = DAQmxCreateCOPulseChanTicks(T0TaskHandle, "Dev1/ctr0", "", "20MHzTimebase", DAQmx_Val_Low, 0, T0Low, T0High);
Error = DAQmxCfgImplicitTiming(T0TaskHandle, DAQmx_Val_ContSamps, 0);
A second counter (Ctr2) produces pulses synchronized with T0 but with n times longer period:
Error = DAQmxCreateCOPulseChanTicks(BlockTaskHandle, "Dev1/ctr2", "", "20MHzTimebase", DAQmx_Val_High, 0, BlockLow, BlockHigh);
Error = DAQmxCfgImplicitTiming(BlockTaskHandle, DAQmx_Val_ContSamps, 0);
Error = DAQmxCfgDigEdgeStartTrig(BlockTaskHandle, "/Dev1/Ctr0InternalOutput", DAQmx_Val_Rising);
A third counter (Ctr3) produces retriggered pulses from Ctr2 that will serve as a gate for the 4th counter output:
Error = DAQmxCreateCOPulseChanTicks(BlockEnableTaskHandle, "Dev1/ctr3", "", "20MHzTimebase", DAQmx_Val_Low, 0, BlockEnableLow, BlockEnableHigh);
Error = DAQmxCfgDigEdgeStartTrig(BlockEnableTaskHandle, "/Dev1/Ctr2InternalOutput", DAQmx_Val_Rising);
Error = DAQmxCfgImplicitTiming(BlockEnableTaskHandle, DAQmx_Val_FiniteSamps, 1);
Error = DAQmxSetStartTrigRetriggerable(BlockEnableTaskHandle, true);
Ctr4 should now output pulses at the frequency of Ctr0 but only when Ctr3Out is high. I tried along the lines of:
Error = DAQmxCreateCOPulseChanTicks(TriggerTaskHandle, "Dev1/ctr4", "", "20MHzTimebase", DAQmx_Val_Low, 0, TriggerLow, TriggerHigh);
Error = DAQmxCfgImplicitTiming(TriggerTaskHandle, DAQmx_Val_ContSamps, 0);
Error = DAQmxSetPauseTrigType(TriggerTaskHandle, DAQmx_Val_DigLvl);
Error = DAQmxSetDigLvlPauseTrigWhen(TriggerTaskHandle, DAQmx_Val_Low);
Error = DAQmxSetDigLvlPauseTrigSrc(TriggerTaskHandle, "/Dev1/Ctr3InternalOutput");
This works in terms of gating, but the gated pulses are no longer synchronized with the Ctr0 (they "move" through the gate when looking at it on an oscilloscope).
DAQmxCfgDigEdgeStartTrig does not work for Ctr4 as it is not possible to use start and pause in the same task (at least that's what the error message said).
I tried to synchronize using:
Error = DAQmxSetArmStartTrigType(TriggerTaskHandle, DAQmx_Val_DigEdge);
Error = DAQmxSetDigEdgeArmStartTrigSrc(TriggerTaskHandle, "/Dev1/Ctr0InternalOutput");
Error = DAQmxSetDigEdgeArmStartTrigEdge(TriggerTaskHandle, DAQmx_Val_Rising);
which works if i uncomment the three PauseTrig lines (no more drifting pulses, but no gating either). Using it all together produces no errors but the gated pulses still walk through the gating window.
Any help is deeply appreciated
Best regards
Christian

Hello Wolfgang
thank you for your reply. I finally managed to get the 6602 to do what i want it to. The key was to use
Error = DAQmxSetDigEdgeArmStartTrigSrc(TriggerTaskHandle, "/Dev1/Ctr2InternalOutput");
instead of
Error = DAQmxSetDigEdgeArmStartTrigSrc(TriggerTaskHandle, "/Dev1/Ctr0InternalOutput");
and to make sure that Ctr4s task was started after the tasks of Ctr0 and Ctr2.
Now Counter 4 is pulsing at the frequency of Ctr0 (even with selectable delay and pulse width) but only when Ctr3Out is high without the need for an external AND gate or other hardware.
Best regards
Christian

Pause the counter output in DAQmx

Hi~
I used two counters output on PCI-6602 card in LV7.1 to generate a PWM to control the velocity of two motors that control the position of mechanism.(Encoder was set on the motor.)
When I set the same duty cycle in two counters, the position of two mechanisms were different(Two mechanisms were the same),that means one velocity of motor was fast, the other was slow.
May I pause the counter output of the fast motor to wait the slow motor??
====================
●LV Version：LabVIEW7.1
●OS：WindowsXP(SP1)
●Hardware：PCI-7344, PCI-6602, PCMCIA 6024E

Assuming you're using DAQmx, you can set up a Pause Trigger for each of the counters. (A similar function can be done in traditional NI-DAQ too). You could, for example, configure 2 different digital bits to be used to pause the 2 PWM counters independently. The way 'Pause Triggering' works is that the counter's pulsetrain only goes to the output pin when the pause trigger signal is in the correct logic state. This can be set to be low or high by programming.
You may also want to characterize the speed difference of your actuators, and give them correspondingly proportional PWM duty cycles. That would do a better job of keeping them in sync throughout the motion.
A feedback signal would give you even better options for control.
-Kevin P.

Query to display multiple counts in the result

Hi,
I need to be able to display multiple counts for different items in the single result set:
Here is the simplified schema:
I have 2 tables:
STATEMENT table:
===============
statement_pk number,
department varchar2(20)
STATEMENT_INFO table:
===================
statement_info_pk number,
statement_fk number
is_statement_done varchar2(1)
is_statement_locked varchar2(1)
I need to display counts of how many records where done and how records where locked in the
single output:
Statement_PK Department NumberOfStatementsDone# NumberofStatementsLocked#
1          ABC_dept          3                    5
2          DEF_dept          4                    8
3          XYZ_dept          7                    2
The following does not work:
SELECT
s.statement_pk,
s.department,
COUNT(r.statement_info_pk ) NumberOfStatementsDone# ,
COUNT(rr.statement_info_pk ) NumberOfStatementsLocked#
FROM STATEMENT s ,
STATEMENT_INFO r,
STATEMENT_INFO rr
WHERE
     s.statement_pk = r.statement_fk
     AND     s.statement_pk = rr.statement_fk
     AND      is_statement_done = 'Y'      AND rr.is_statement_locked = 'Y'
GROUP BY statement_pk, s.department
I was trying to work with analytic function but could not figured it out either.
Please help
Thanks,
Ia.

this would be something like:
SQL> r
1 select statement_pk,
2         department,
3         sum(decode(is_statement_done, 'Y', 1, 0)) statement_done,
4         sum(decode(is_statement_locked, 'Y', 1, 0)) statement_locked
5 from   statement_info,
6         statement
7 where statement_fk = statement_pk
8* group by statement_pk, department
STATEMENT_PK DEPARTMENT           STATEMENT_DONE STATEMENT_LOCKED
           1 ABC_dept                          4                1
           2 DEF_dept                          6                2
           3 XYZ_dept                          1                2
SQL> Message was edited by:
Leo Mannhart
Craig you were faster

CMS crash with core files and multiple report output generation

Happy new year to everyone,
Our BOXIR3.1SP6FP2 env has recently started behaving weirdly by triggering multiple output to users inbox and email notification out of scheduled reports. Also we have noticed the CMS crash with core file (almost 4GB) generation at the time of multiple report output.
Most of the times, CMC crashes and recycles itself. At few times, CMS services alone went shut down.
OS details: RHEL 5.5, 32 GB RAM, 8 core processor on each of the clustered node, Oracle 10GR2.4 CMS DB server, 11GR2.4 oracle reporting DB server and oracle 11.1.0.6 client.
2015/01/21 23:54:37.946|>=| | |28123|1534131088|{|||||||||||||||DBQueue::Read
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2015/01/21 23:54:37.966|==| | |28123|1496451984| |||||||||||||||SResourceSource::LoadString Unknown exception in database thread
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2015/01/21 23:54:38.513|==| | |28123|1455592672| |||||||||||||||(sidaemon.cpp:552) SUNIXDaemon::run: in abort ...
2015/01/21 23:54:38.513|==| | |28123|1455592672| |||||||||||||||(sidaemon.cpp:555) SUNIXDaemon::run: doing the WithAbort case ...
2015/01/21 23:54:38.520|==| | |28123|1496185744| |||||||||||||||(dbq.cpp:1357) DBQ: Time required to read 1 objects: 20.000000 ms
Thank you,
Karthik

Hi Denis,
I'm trying my best for the last few weeks to understand the core issue along with SAP however it is still a mystery.
>Ulimit -a
core file size          (blocks, -c) 0
data seg size           (kbytes, -d) unlimited
scheduling priority             (-e) 0
file size               (blocks, -f) unlimited
pending signals                 (-i) 270335
max locked memory       (kbytes, -l) 32
max memory size         (kbytes, -m) unlimited
open files                      (-n) 1024
pipe size            (512 bytes, -p) 8
POSIX message queues     (bytes, -q) 819200
real-time priority              (-r) 0
stack size              (kbytes, -s) 10240
cpu time               (seconds, -t) unlimited
max user processes              (-u) 270335
virtual memory          (kbytes, -v) unlimited
file locks                      (-x) unlimited
Below is the observation as part of troubleshooting:
1. CMS breaks at threshold of 3.9 G.
2. CMS DB sits in a different Linux server than BOE server.
3. All core files were generated by boe_cmsd process and are almost 4GB in size (same as max threshold which it breaks).
4. Shell script which I've added in the BOE servers shows that the CMS DB is available/connecting at the time of CMS crash.
5. SAP analysed the Core files and skeptical about the below lines.
     #3 0x58687b80 in skgesigCrash ()
      from /opt/oracle/product/11.1.0/client_1/lib32/libclntsh.so
     #4 0x58687e0d in skgesig_sigactionHandler ()
I'll continue troubleshooting with a hope to fix it at the earliest.
Thanks,
Karthik

Is there a way to create multiple BQY output to one of the Job File ?

Hello,
I am using EPM11.1.2.3.501 version.
BQY report due to the large amount of data, it is difficult to use a WebClient.
So will share on a quarterly basis.
However,
If modifications are to occur,There are difficulties must modify each file.
For example,
Register 2014 1Q, 2014 2Q, 2014 3Q, 2014 4Q BQY Job file.
When you run the job, the output of the job file is created.
If the job file is changed, you must modify all four files.
This will be only grow ations.
Is there a way to create multiple BQY output to one of the Job File ??
Please help me.
Thanks

It is not possible to have multiple BQY outpu into a job file.
Thanks,
KK

How to get multiple html output file from an xml document via xslt?

Hi,
the purpose is to generate multiple html output file from one xml file
depending on special tag.
exp: i have an xml file which contains sevreral articles so how to get each article section in an independant html file
Thanks for help

Not a standard feature of XSLT. But Michael Kay's XSLT implementation, SAXON, provides that as an extension. Get it here:
http://saxon.sourceforge.net/

How to disable (turn off) a counter output

I have a similar question up on the the board but I thought I would ask it in another way to make it simple and straightforward.
Can an E-series counter output be disabled (and enabled) quickly through some software command? When I say " disabled" I mean switched off to a TTL low state. I have tried both the "disable" counter control command and gating the counter with a TTL signal. Both methods leave the output pin in whatever state the output happens to be in at the time of the command or gating. I need a disable function where "disabled" automatically sets an OFF or LOW on the output. I am using this to generate a pulse train where the pulse train switches off at certain times, and I cannot have the output remain high at these times.
I am using traditional DAQ but if there is a method in DAQmx that works I'd be willing to try it...

Have you tried using the following vi with a reset command (search in help, it works with the E series counters)
Counter Control
This VI controls groups of counters. Control operations include starting, stopping, and setting the state of active acquisitions. This VI works with DAQ-STC and NI-TIO-based devices.
Control code 1 (reset) reinitializes the counter back to the default settings.
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"It’s the questions that drive us.”
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6602 Multiple Counter Output

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