Differences in 1.4 over 1.3

Hi,
I am new to Java IDL and I probably do not even know what i am doing, but i am trying to learn. I followed the Java IDL tutorial over at the 1.3 release and am using 1.4.01 JDK. The 1.3 release tutorial says that when you run idlj -fall Hello.idl you should get the following file
_HelloImplBase.java
_HelloStub.java
Hello.java
HelloHelper.java
HelloHolder.java
HelloOperations.java
But when I run it I get this.... on 1.4
Hello.java
HelloOperations.java
HelloPOA.java
_HelloStub.java
HelloHelper.java
HelloHolder.java
Which of these is the server classes and which is the client classes. Please guide me.
Thanks in advance.
TP

Ok..
This is fast, posting a reply within 5 minutes of the previous post.
Used the option idlj -fall -oldImplBase Hello.idl
This gave me all the classes that were generated with 1.3.

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Hello lauralou1105,
Purchasing a new TV should be fun, exciting, and straightforward, and not be complicated by unclear signage and conflicting information. I very much regret that this was your experience at the Huntsville store.
I completely understand your conclusion that -- after the attempts to verify pricing that you made -- you should have had no questions and no surprises about the cost of the TV after purchase. Did Cedric give you any explanation as to why the TV you bought rang up at a different price or for his not honoring the display pricing?
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Anyways, first things first, you can get a copy of A64 Tweaker here: http://www.akiba-pc.com/download.php?view.40
Now that that's out of the way, I'll walk through all of the important settings, minus Tcl, Tras, Trcd, and Trp, as these are the typical RAM settings that everyone is always referring to when they go "CL2.5-3-3-7", so information on them is widely available, and everyone knows that for these settings, lower always = better. Note that for each setting, I will list the measured cange in my SiSoft Sandra memory bandwidth score over the default setting. If a setting produces a change of < 10 MB/sec, its effects will be listed as "negligible" (though note that it still adds up, and a setting that has a negligible impact on throughput may still have an important impact on memory latency, which is just as important). As for the rest of the settings (I'll do the important things on the left hand side first, then the things on the right hand side...the things at the bottom are HTT settings that I'm not going to muck with):
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Trfc - This setting offered the next largest improvement...I'm not sure exactly what this setting controls, but it is doubtless similar to the above setting. Again, lower would seem to be better, but although I was stable down to '12' for the setting, the sweet spot here for my RAM was '18'. Selecting '10' caused a spontaneous reboot. Benchmark change from the default setting of 24: +50 MB/sec
Trtw - This setting specifies how long the system must wait after it reads a value before it tries to overwrite the value. This is necessary due to various technical aspects related to the fact that we run superscalar, multiple-issues CPU's that I don't feel like getting into, but basically, smaller numbers are better here. I was stable at '2', selecting '1' resulted in a spontaneou reboot. Benchmark change from default setting of 4: +10 MB/sec
Twr - This specifies how much delay is applied after a write occurs before the new information can be accessed. Again, lower is better. I could run as low as 2, but didn't see a huge change in benchmark scores as a result. It is also not too likely that this setting affects memory latency in an appreciable way. Benchmark change from default setting of 3: negligible
Trrd - This controls the delay between a row address strobe (RAS) and a seccond row address strobe. Basically, think of memory as a two-dimensional grid...to access a location in a grid, you need both a row and column number. The way memory accesses work is that the system first asserts the column that is wants (the column address strobe, or CAS), and then asserts the row that it wants (row address strobe). Because of a number of factors (prefetching, block addressing, the way data gets laid out in memory), the system will often access multiple rows from the same column at once to improve performance (so you get one CAS, followed by several RAS strobes). I was able to run stably with a setting of 1 for this value, although I didn't get an appreciable increase in throughput. It is likely however that this setting has a significant impact on latency. Benchmark change from default setting of 2: negligible
Trc - I'm not completely sure what this setting controls, although I found it had very little impact on my benchmark score regardless of what values I specified. I would assume that lower is better, and I was stable down to 8 (lower than this caused a spontaneous reboot), and I was also stable at the max possible setting. It is possible that this setting has an effect on memory latency even though it doesn't seem to impact throughput. Benchmark change from default setting of 12: negligible
Dynamic Idle Cycle Counter - I'm not sure what this is, and although it sounds like a good thing, I actually post a better score when running with it disabled. No impact on stability either way. Benchmark change from default setting of enabled: +10 MB/sec
Idle Cycle Limit - Again, not sure exactly what this is, but testing showed that both extremely high and extremely low settings degrade performance by about 20 MB/sec. Values in the middle offer the best performance. I settled on 32 clks as my optimal setting, although the difference was fairly minimal over the default setting. This setting had no impact on stability. Benchmark change from default setting of 16 clks: negligible
Read Preamble - As I understand it, this is basically how much of a "grace period" is given to the RAM when a read is asserted before the results are expected. As such, lower values should offer better performance. I was stable down to 3.5 ns, lower than that and I would get freezes/crashes. This did not change my benchmark scores much, though in theory it should have a significant impact on latency. Benchmark change from default setting of 6.0 ns: negligible
Read Write Queue Bypass - Not sure what it does, although there are slight performance increases as the value gets higher. I was stable at 16x, though the change over the 8x default was small. It is possible, though I think unlikely, that this improves latency as well. Benchmark change from default setting of 8x: negligible
Bypass Max - Again not sure what this does, but as with the above setting, higher values perform slightly better. Again I feel that it is possible, though not likely, that this improves latency as well. I was stable at the max of 7x. Benchmark change from the default setting of 4x: negligible
Asynch latency - A complete mystery. Trying to run *any* setting other than default results in a spontaneous reboot for me. No idea how it affects anything, though presumably lower would be better, if you can select lower values without crashing.
...and there you have it. With the tweaks mentioned above, I was able to gain +160 MB/sec on my Sandra score, +50 on my PCMark score, and +400 on my 3dMark 2001 SE score. Like I said, not earth-shattering, but a solid performance boost, and it's free to boot. Settings what I felt had no use in tweaking the RAM for added performance, or which are self-explanatory, have been left out. The above tests were performed on Corsair XMS PC4000 RAM @ 264 MHz, CL2.5-3-4-6 1T.

Quote
Hm...I wonder which one is telling the truth, the BIOS or A64 tweaker.
I've wondered this myself. From my understanding it the next logic step from the WCREDIT programs. I understand how clock gen can misreport frequency because it's probably not measuring frequency itself but rather a mathmatical representation of a few numbers it's gathered and one clk frequency(HTT maybe?), and the non supported dividers messes up the math...but I think the tweaker just extracts hex values strait from the registers and displays in "English", I mean it could be wrong, but seeing how I watch the BIOS on The SLI Plat change the memory timings in the POST screen to values other then SPD when it Auto with agressive timings in disabled, I actually want to side with the A64 tweaker in this case.
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How to preset the order of rows in the outer query of a correlated query ?

Good morning,
I have the following simple query:
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select a.empno,
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         where b.empno <= a.empno
           and b.deptno = a.deptno) as running_diff
from emp a
where a.deptno = 10;but the result is
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      7839 KING             5000        -7450
      7934 MILLER           1300        -8750which is a long way from the original result. I've tried everything I could think of to order the rows before the running difference is calculated but, have been unsuccessful.
Is there a way to change this second query --(without using Oracle specific features)-- without using windowing features that would yield the same result as the first query ?
Rephrase of the above question:
Is there a way, using plain vanilla SQL (that is aggregate functions and set operations such as joins and unions) to create a query that yields the same result as the first one ?
Also, this is not for production code. This is simply an exercise in set manipulation that I'd like to see a solution for.
Thank you for your help,
John.
Edited by: 440bx - 11gR2 on Jul 18, 2010 12:50 AM - correct "ho w" to "How"
Edited by: 440bx - 11gR2 on Jul 18, 2010 1:42 AM - struck out all references to row_number and windowing features being Oracle specific features.
Edited by: 440bx - 11gR2 on Jul 18, 2010 3:51 AM - Noted that my try is woefully wrong and restated the objective to make it clearer.

Hi, John,
One way to get a running total (which is basically what you want) is to do a self-join. Join each row (let's call it the current row, or c) to itself and everything that came before it (let's call this the previous row, or p), and do a regular aggregate SUM, like this:
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,       c.empno
,       c.ename
,       c.sal
,       b.base_sal - SUM (p.sal)     AS running_diff
FROM       scott.emp     c
JOIN       scott.emp     p     ON     c.deptno     = p.deptno
                    AND     (     c.sal     > p.sal
                         OR     (     c.sal     = p.sal
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(2) You want the first item to count as positive instead of negative. That's not so trivial. The query above counts all sals as negative, but adds an offset so that it appears as if the first item had been counted as positive, not negative.
You didn't say what you want to do in case of a tie (two or more rows having the same sal). The query above uses empno as a tie-breaker, so that all sals are calculated as if they were distinct. This is similar to what analytic functions do when the windowing is based on rows. If you want something similar to windowing by range, that might actually be simpler.
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