Fpga PID require more than 16 bits for data type

Hi,
So i am using Fpga PID block for a control task taht needs to be run at 1000hz. The problem I am having is that the FPGA PID block only accepts data types of 16bit length. This does not give me the range and accuracy that i require for the task. At a minimum i feel i would need 32 bits.
Is there some way to achieve this; maybe dynamic scaling? custom blocks, some other operation? or a completely different control alternative?
Any suggestions would be most welcome.

In practice i know it matters a lot.  if you have a low value of an integrator and a high loop rate, then the integration accumulator never grows unless it has enough bits of resolution.  maybe this has not occured for you but it has happened with real use cases for me.
I know this because i use closed loop control all the time.  if your suggestions revolve around "you can scale it so it doesn't matter" i would suggest that using the appropriate PID algorithm is even easier to do than figuring out how to use a poor algorithm.
nathand wrote:
The input to the FPGA PID is a 16-bit fixed-point value. You can represent 20.5 exactly in fixed point. I don't remember the exact format (number of integer bits) of the PID input and don't have the FPGA toolkit on this computer, but you can scale as necessary to make the input range match the fixed-point range.
The coefficient (I assume you mean integral gain) has no bearing on whether or not it integrates, because the integration is done prior to multiplication by the gain. I understand your concern about the minimum you can integrate but I think in practice it turns out not to matter, if your input and output have the same precision (for example both 16-bit). You can pick your scaling and gains such that you need several counts of integrated error to get a one-count change in output if that's what you want.
Stu McFarlane
Viewpoint Systems, Inc.

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