Need urgent help with HSDIO hardware timing

Hi everyone,
I need urgent help regarding HSDIO hardware timing. I've been working in a project which generating serial ramp using HSDIO pxie device. 
I'm using clock rate 40MHz and generating 14 bit of boolean for each step of ramp. And I have to generate simply 256 steps ramp.
Which means, 256 (steps) x 14 (boolean array) x 25 ns (period of 1 boolean value) = 89,6 ns.
What I'm doing right now is with using index of FOR loop as my input data (converting the index into 14bit boolean), then write into pxie device in every iteration,
which means, my data is getting into output in every 1ms time, right? (I'm using windows)
And I want to be able to generate faster than that. 
How can I prewrite my 256 steps ramp, then write them all at once into pxie device. I'm really stuck here.
In the picture can you see how I do the write into device in every iteration of FOR Loop.
Regards,
Yan.

hi, thanks for responding.
with using example of dynamic generation with script, I can manage to generate the ramp with controllable delay (generate the whole waveform, including delay with script command, then write to the card).
But I still have 1 question, I can test the output of the generation using oscilloscope and cant see the start delay (I'm writing delay at the start, before generating the ramp). My signal generated at 0 sec.
How can I check this start delay? is there any good example delivered with Labview to check this generation? Somehow I cant use the "dynamic generation and acquisition" example to see my generation (cant figure out how to capture the generated signal).
regards,
Yan.

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