6251 AO sample clock

Hello All,
I am using a M6251 board for analog output. However, I have the problem that the board only allows discrete increments in the frequency of the Analog Output sample clock. The frequency step-size varies, depending on the sample-clock frequency, and reaches around 10kSa/s when the sample clock is running at 1MSa/s. Am I doing something really stupid, or is this a limitation of the board? The digital pulse-train generation does not seem to have this limitation. If this *is* a limitation of the board, is there some way of overcoming it? I have tried to re-route one of the counters into the AO sample clock, but, when I do so, I get an error message saying that resource is already in use.
Any help will be greatly appreciated.

There are two things that I can think of that could be causing the behavior that you're seeing. The first is that you are using the onboard Frequency Generator to generate the AO Sample Clock. If this is the case, you will notice that the Frequency Generator has limited capabilities in the frequencies it can generate. If this is the case, use the default AO Sample Clock as the clock for your AO application. M Series devices have a dedicated timing engine for AO applicatins, hence, no onboard subsystem (i.e. counters, PFI lines, etc.) will be used up if you use the AO Sample Clock default selection for timing your AO applications.
The second guess that I have is that you are not specifying your AO application correctly in order to get the generated waveform frequency you're expecting. Their are several parameters that you need to set in order to get an expected frequency with AO - rate and samples per channel. Have a look at How Can I Calculate the Output Frequency of my Analog Output. This knowledgebase might currently be written with Traditional NI-DAQ terminology, but it should still help. Also, remember that even though you specify a certain update rate on your analog output, the actual update rate will be slightly different because of limited resolution of the divide down.
Jared Aho

Similar Messages

Wait for Next Sample Clock error, or 'How do I put this VI on a diet'?

Hello!
In the attached VI I've been running since June, I have all the functionality I need. No questions there at all, thanks to much time and help from this board!
My nagging problem is that any time I use the PC for other minor tasks other than Labview, it will display the following error:
209802 occurred at DAQmx Wait For Next Sample Clock.vi:1
A search earlier in the month indicated that it could have been a result of my old and outdated PC; I've since replaced it with a brand-new dell dimension 1100. Celeron 2.53ghz with 1.00gb of ram. Should be enough to service Labview and other minor tasks (automatic antivirus updating and also maintenance tasks). However, any time any other program opens or even if the screen is scrolled around on Labview quickly, I get that same error.
Resource usage when idle, with nothing but this VI running is 5-10%, all labview. Upon scrolling the VI, it quickly jumps to the 58-60% and above mark and soon throws that error.
I know that there's a lot of code here that can be cleaner--I know that even though it's functioning correctly, there could be a less resource-hogging way to go about it. Can anyone give me any suggestions on how to make this VI a little 'lighter'?
Thanks so much in advance,
Ralph
Still confused after 8 years.
Attachments:
Currently Running 063006.vi ‏899 KB

Hi Ralph,
The wait.vi waits until the amount of time has passed. While the wait on next ms.vi uses some kind of quotient and remainder on the computer time until the remainder passed zero.
In this way you can synchronize 2 loops, and somehow it is less time-consuming. The only difference you will see is in the first run!
There you see a smaller amount of time:
Message Edited by TonP on 10-04-2006 04:21 PM
Free Code Capture Tool! Version 2.1.3 with comments, web-upload, back-save and snippets!
Nederlandse LabVIEW user groep www.lvug.nl
My LabVIEW Ideas
LabVIEW, programming like it should be!
Attachments:
Example_BD.png ‏2 KB

Buffered event counting. Why can't I explicitly sequence generating the Sample Clock Pulse and reading the counters?

At irregular occasions I need to grab counts from several counters, and buffering the counts must be done simultaneously for all counters. I'm modeling my approach after zone.ni.com/devzone/cda/tut/p/id/5404 which someone kindly pointed out in an earlier thread. However, that example only uses one counter, and you can't test the synchronization with only one counter, so I am using two counters configured the same way, and they're wired to a single benchtop signal generator (for example at 300 kHz).
What I want to do, I can test in a loop with a somewhat random wait in it. I want to drive a hardware digital output line high for a few ms and then low again. The hardware line is physically connected to terminals for my timing vi's Sample Clock Source and so will cause them to buffer their counts for later reading. After I pulse this line, when I know new good buffered counts await me, I want to read both my counters. If their bufferings are simultaneous, then each counter will have counted the same number of additional counts since the last loop iteration, which I can check by subtracting the last value sitting in a shift register and then subtracting the two "additional counts" values and displaying this difference as "Diff". It should always be 0, or occasionally +1 followed immediately by -1, or else the reverse, because buffering and a count could happen practically at the same moment.
When I do this using a flat sequence to control the relative timing of these steps, so the read happens after the pulse, the counters often time out and everything dies. The lengths of time before, during, and after the pulse, and the timeout value for the read vi, and the size of the buffer and various other things, don't seem to change this, even if I make things so long I could do the counting myself holding a clipboard as my buffer. I've attached AfterPulse.vi to illustrate this. If I get 3 or 10 or so iterations before it dies, I observe Diff = 0; at least that much is good.
When I use two flat sequences running in parallel inside my test loop, one to control the pulse timing, and the other to read the counters and do things with their results, it seems to work. In fact, Diff is always 0 or very occasionally the +/- 1 sequence. But in this case there is nothing controlling the relative timing such that the counters only get read after the pulse fires, though the results seem to show that this is true. I think the reads should be indeterminate with respect to the pulses, which would be unreliable. I don't know why it's working and can't expect it to work in other environments, can I? Moreover, if I set some of the pulse timing numbers to 1 or 2 or 5 ms, timeouts start happening again, too. So I think I have a workaround that I don't understand, shouldn't work, and shouldn't be trusted. See SeparateSequence.vi for this one.
I also tried other versions of the well-defined, single sequence vi, moving the counter reads to different sequence frames so that they occur with the Sample Clock Source's rising edge, or while it is high, or with the falling edge, and they also often time out. I'll post these if anyone likes but can't post now due to the attachment limit.
Here's an odd, unexpected observation: I have to sequence the reads of the counters to occur before I use the results I read, or else many of the cycles of this combine a new count from one counter with the one-back count from the other counter, and Diff takes on values like the number of counts in a loop. I though the dataflow principle would dictate that current values would get used, but apparently not so. Sequencing the calculations to happen after the reads fixes this. Any idea why?
So, why am I not succeeding in taking proper control of the sequence of these events?
Thanks!!!
Attachments:
AfterPulse.vi ‏51 KB
InSeparateSequence.vi ‏49 KB

Kevin, thanks for all the work.
>Have you run with the little execution highlighting lightbulb on? -Yes. In versions of this where there is no enforced timing between the counter and the digital line, and there's a delay inserted before the digital line, it works. There are nearly simultaneous starts on two tracks. Execution proceeds directly along the task wire to the counter. Meanwhile, the execution along the task wire to the digital high gets delayed. Then, when the digital high fires, the counter completes its task, and execution proceeds downstream from the counter. Note, I do have to set the timeout on the counter longer, because the vi runs so slowly when it's painting its progress along the wires. If there is any timing relationship enforced between the counter and the digital transition, it doesn't work. It appears to me that to read a counter, you have to ask it for a result, then drive the line high, and then receive the result, and execution inside the counter has to be ongoing during the rising line edge.
>from what I remember, there isn't much to it. There really aren't many candidate places for trouble. A pulse is generated with DIO, then a single sample is read from each counter. -Yup, you got it. This should be trivial.
>A timeout means either that the pulse isn't generated or that the counter tasks don't receive it. - Or it could mean that the counter task must be in the middle of executing when the rising edge of the pulse arrives. Certainly the highlighted execution indicates that. Making a broken vi run by cutting the error wires that sequence the counter read relative to the pulse also seems to support that.
>Have you verified that the digital pulse happens using a scope? -Verified in some versions by running another loop watching a digital input, and lighting an indicator, or recording how many times the line goes high, etc. Also, in your vi, with highlighting, if I delete the error wire from the last digital output to the first counter to allow parallel execution, I see the counter execution start before the rising edge, and complete when the line high vi executes. Also, if I use separate loops to drive the line high and to read the counter, it works (see TwoLoops.vi or see the screenshot of the block diagram attached below so you don't need a LV box). I could go sign out a scope, but think it's obvious the line is pulsing given that all these things work.
>Wait! I think that's it! If I recall correctly, you're generating the digital pulse on port0/line0... On a 6259, the lines of port 0 are only for correlated DIO and do not map to PFI. -But I'm not using internal connections, I actually physically wired P0L1 (pin 66) to PFI0 (pin 73). It was port0/line1, by the way. And when running some of these vi's, I also physically jumper this connection to port0/line2 as an analog input to watch it. And, again, the pulse does cause the counter to operate, so it clearly connects - it just doesn't operate the way I think it is described operating.
For what it's worth, there's another mystery. Some of the docs seem to say that the pulse has to be applied to the counter gate terminal, rather than to the line associated with the sample clock source on the timing vi. I have tried combinations of counter gate and or sample clock source and concluded it seems like the sample clock source is the terminal that matters, and it's what I'm using lately, but for example the document I cited, "Buffered Event Counting", from last September, says "It uses both the source and gate of a counter for its operation. The active edges on the gate of a counter is used to latch the current count register value in a hardware register which is then transferred via Direct Memory Access...". I may go a round of trying those combinations with the latest vi's we've discussed.
Attachments:
NestedSequences.png ‏26 KB

Number of samples read is not equal to number of AI Sample Clock pulses - why?

Dear Community,
I am using several PXI-4472s for acquisition and at the same time I am routing the AI Sample Clock signal to a PXI-6608 counter/timer card so that I can time stamp each sample.
Unfortunately I am finding that I always get more AI Sample Clock pulses than samples, so I don't know which time stamp corresponds to which sample. Why is that?
For acquisition I am using something very much like the following DAQmx Sync and Stream example:
Sync and Stream.vi
After stopping the tasks, I use DAQmx Read vi again to read whatever samples might be left in the buffer, but that request always comes back empty. I can't figure out if there are AI Sample Clock pulses at the beginning of the task that don't actually acquire any data, or if I have data left over in the buffer after I stop the task that I am not reading properly.
Any help would be greatly appreciated!
Cas

Cas,
DSA boards (like the 4472) differ from standard DAQ devices. While most DAQ devices use a relatively common type of ADC known as a sequential approximation ADC, a DSA device uses a more specialized ADC known as a Delta-Sigma ADC for its measurements. Delta-Sigma ADCs allow for very precise measurements, and this precision is accomplished by oversampling (frequently 128x or 256x the sampling rate that is being used).
The above is a very brief explanation of the DSA board's inner workings. It is discussed in more detail in the document linked below. If after reading that tutorial, you still have questions, please post back so that this forum can assist you.
Synchronization with Dynamic Signal Acquistion (DSA) Products with DAQmx
Best of luck with your application.
Regards,
Jed R.
Applications Engineer
National Instruments

Using a Counter to error-check External Sample Clock

Hi all,
I am newish to labview and am working on a data acquisition project. I've managed to get the basics under control, but here's my situation and question...
-- I am using the S-6123 card to capture and record data on two or more AI channels. I am using a rotary encoder to generate a pulsetrain that I am using via PFI0 as the sample clock for recording the AI data.
-- This rotary encoder gives 720 pulses per revolution and an index pulse once per revolution.
-- In my data acquisition, I am pulling 1440 samples at a time with the DAQmx "read" function.
I have been experimenting with counters and can get the RPM out of the pulse trains well enough, however I was wondering...
Is there some way to use the 2 counters on the card (and signal routing of the two pulse trains) to double-check that the 1440 samples I take correspond to two exact revolutions, and that I'm not getting ahead of or behind the rotation of the encoder due to missing clock pulses or reading false pulses. I have a couple of ideas on how to attempt to do it, but to me they don't seem very reliable or efficient, so I thought I'd put it to the experts to point out of there is a more obvious way of doing it.
I have attached a pdf of the specifications of the encoder family, the pulses that will be output are on the right hand side of page 2.
With many thanks in advance,
Peter
Message Edited by mumech on 07-22-2008 01:05 AM
Attachments:
REncoder Specs.pdf ‏312 KB

Thanks very much for your reply. I had come across the use of counters with angular encoders but hadn't quite thought of the concept in this way.
I will have to experiment a bit over the next day or to see what this is capable of, the examples seem quite comprehensive, however I'm not sure if I will run into issues due to the fact that I am using the rotary encoder as the sample clock for my analogue data.
Would I indeed be able to compare these values (ideally check the position of the encoder after each set of data acquisition) without a "third party" sample clock common to both? (which isn't appropriate for this application)
If I was only running at low speeds, I might be able to implement this by simply checking the position of the encoder after each read of the data. However, at higher speeds there might be synchronization issues due to the buffering of the analogue data. So when getting the measurement from the encoder counter chances are the analogue data was acquired at an earlier time.
I know I haven't worded this very well, but how might I synchronise this error checking method?

Can I use a substitute for the Sample Clock?

I have three different analog inputs coming from one device (PCI-6221). Two inputs are running at the same sample rate while the third needs a faster sample rate and a trigger. I have these seperated as two seperate tasks but my problem is they both use the sample clock. Can I use a substitute for the sample clock on the third channel?
I am running LabVIEW 8.2 on Windows XP.
Thanks in advance for your help.
Ron Deavers, CLD

Hi programmindragon,
I understand you are trying to
configure your PCI-6221 to sample on multiple channels, while having
different rates and triggers for the channels. Unfortunately, you can
only configure one analog input task to run at once and all the channels in
the task must share the same configurations, including the sample clock
and trigger. This is due to the fact that all the channels are
multiplexed to a single amplifier and ADC on the device. Thus, you will
not be able to configure the two inputs at one rate and use a different
clock rate and trigger for the third input. Is it possible to sample at the
maximum rate on all channels and decimate the data that you don't need on the certain
channels, as well as share the same type of triggering? Hopefully you will be able to run your application with the same configuration across multiple channels, otherwise you may need multiple DAQ devices. Please let me know if you have any further questions related to this issue.
Regards,
Daniel S.
National Instruments

External Sample Clock timeout

Hi,
I'm attempting to program up a Met One 010c cup anemometer which sends out 11V pulses whose frequency correlates to wind speed. I've written the following program Met One 010c-3b.vi which works when there's no sample clock and outputs data to the graph and to the write measurement to file VI.
However the timestamp on the file only occurs intermittently (every 130 recorded samples if i recall correctly) and i've been advised to put a sample clock in between the create virtual channel and start VI to make the timestamp occur every sample. However doing this i get errors that first tell me I have to use an external clock, making the clock external then gives the timeout error 200284 after the read function. I expect this is because the wrong source has been selected for the external clock on the timing function.
I don't fully understand how the external clock works and i assume i need to set up which ever port i select as an external clock?
I have read through the following
http://digital.ni.com/public.nsf/allkb/FEF778AD990D5BD886256DD700770103
           -> how do i verify that the start trigger is configured correctly? (i know my program doesn't have one)
           -> how do i verify the external timing is configured correctly?
http://zone.ni.com/devzone/cda/tut/p/id/2835
http://zone.ni.com/devzone/cda/tut/p/id/4322
I tried to implement some of the diagrams indicated in the last link (eg Figure 2 & 3) but when i went to select the source for the analogue output I was given no available options. I have the NI 9205,9213,9403,9423,9215 sitting on a cDAQ 9178, so none of these do analogue output. Does this mean i can't use an external clock?
Thanks for the help, i know this is a simple question but i'm getting nowhere fast.
Kind Regards
Orfeo
Attachments:
Met One 010c-3b.vi ‏90 KB

Thanks for your help Courtney,
I had a look at the Write to Text File.Vi you suggested and i tried to implement it in my program. It appears to be almost working. The formatting of the strings is stuffed up so that i'm getting an ever increasing number of columns in my data (see attached text file). Can you advise me where i've gone wrong?
An example of the file is below
24/11/2011 11:21:54 AM   2.32   2.14
2.62   2.11
1.81   1.49
24/11/2011 11:21:54 AM   2.36   2.32   2.14
2.62   2.62   2.11
1.82   1.81   1.49
24/11/2011 11:21:54 AM   2.40   2.36   2.32   2.14
2.59   2.62   2.62   2.11
1.76   1.82   1.81   1.49
24/11/2011 11:21:54 AM   2.43   2.40   2.36   2.32   2.14
2.55   2.59   2.62   2.62   2.11
1.73   1.76   1.82   1.81   1.49
24/11/2011 11:21:54 AM   2.53   2.43   2.40   2.36   2.32   2.14
2.48   2.55   2.59   2.62   2.62   2.11
1.69   1.73   1.76   1.82   1.81   1.49
I assume i've just not got my tab delimintors in the right place? or perhaps i need end of line qualifiers?
I would also like to have the timestamp more accurate, down to the milisecond. I see the format time string VI has an option to format the string %<digit>u which should do this but it appears to just paste the <digit>u in the string. We are wanting to sample data at 10-20 Hz and record the time of the samples. For one instrument these samples will be done simultaneously.
Thanks again
orfeo
Attachments:
Met One 010c-3c.vi ‏42 KB
TextFile.txt ‏550 KB

"External sample clock" and "Rate" for digital input acquisition

Dear all,
I want to acquire digital input (21 bits with external clock = 50 kHz) with a PCIe-6343 NI board. Using the DAQ assistant under Labview, I selected the advanced timing with the sample clock time parametrized as External. However, it is also possible to select the Rate of the acquisition. In my case, i want to get the data at the rising edge of the external clock signal, so at a frequency of 50 kHz. How can I do that ? I just need to put a Rate of 50 kHz ?
thanks for your help.
Cedric

Cedric,
dddsdsds wrote:
[...]In my case, i want to get the data at the rising edge of the external clock signal, so at a frequency of 50 kHz. How can I do that ?[...]
You answered your question already. If you want to use an external clock, you have to configure the timing source of your task to be external. In order of proper buffer configuration, you should enter 50kHz as rate in addition to the external configuration, but this will not influence the speed of the acquisition (since it is "clocked" externally!)
hope this helps,
Norbert
CEO: What exactly is stopping us from doing this?
Expert: Geometry
Marketing Manager: Just ignore it.

External sample clock encoder

hello,
my problem is very urgent, I have to sample 3 analog input synchronised to an encoder. How can use the channel from the encoder and use them to generate a external sample clock for acuiring the analog signals?how can I phisically attache the wire from the encoder to the digital line?and how the vi should be??my encoder has A, Anot,B,Bnot channel, but eventually with a circuit I can get just A and B. I have a PCI6221.
Please is very urgent!!

Hi orsogna,
see the example Cont Acq&Graph Volt-Ext clock in the Labview Example Finder.
About wirings, you have to connect our encoder signal (A signal is good) to a PFI input in order to correctly read the TTL signal.
Ciao!
Simone S.
Academic Field Engineer - Med Region

NI6602 pulse width measurement: Do I have to use an external sample clock?

Hi
In the .NET 4 example 'MeasPulseWidthBuf_SmplClk_Cont' it is stated in the comments that:
An external sample clock must be used.
Counters do not have an internal sample clock available. You can use
the Gen Dig Pulse Train-Continuous example to generate a pulse train on
another counter and connect it to the Sample Clock Source you are using
in this example.
I have an application running without specifying an external clock. The applications is running, but I'm not sure I can trust the recorded data. Here is the channel creation code:
   task.CIChannels.CreatePulseWidthChannel(readTaskCounter,
   "ReadPulswidthTask", 25e-9, 20e-6,
   CIPulseWidthStartingEdge.Rising,
CIPulseWidthUnits.Seconds);
task.CIChannels.All.DataTransferMechanism = CIDataTransferMechanism.Dma;
   task.Stream.Timeout = callbackTimeoutInMilliSeconds;
task.Stream.Buffer.InputBufferSize = 50000;
   task.SynchronizeCallbacks = true;
   task.Timing.ConfigureImplicit(SampleQuantityMode.ContinuousSamples);
   task.Control(TaskAction.Verify);
Note that I'm not specifying any external clock.
1) Which clock is the daq using? -It is obviously using some clock since I can collect data via this task.
2) Do I need to change the configuration to use an external clock to achieve reliable readings - as mentioned in the 'MeasPulseWidthBuf_SmplClk_Cont' example?
/mola
Solved!
Go to Solution.

Hi mola,
That specific example is for sample-clocked pulse width measurements. This type of measurement is only supported on newer hardware such as X Series boards and will not run on the 6602.
Your application that you linked uses Implicit timing, meaning that the signal itself serves as the sample clock. That is, at the end of each pulse width that you measure, the sample is deterministically latched in. So, you end up with a buffered array of every pulse width that is seen by the counter.
Best Regards,
John Passiak

Using an internal sample clock with a digital input

I am using an encoder to measure angle and velocity. The example that I have started with is here. https://decibel.ni.com/content/docs/DOC-6834. The problem I am having is with the Sample clock, I get a timeout at the DAQmx read. If I remove the sample clock the VI runs fine, but I have no idea of my sample rate. Below is the the problem setup with the Sample clock inline.
Attachments:
encoder with timer.JPG ‏50 KB

Hi there, a couple suggestions: first , this is a post that it is suppose to be on the DAQ board. Second, you are not being clear about the error, try to include the error code, description and its location, is it coming out of the channel node or the timing VI? Also what hardware are you using?
Now, If you open the example called "Measure Angular Position.vi" from the NI example finder, drill the DAQmx Create Channel, you will see that you are missing a couple terminals for the task configuration, I wonder if this is part of the error.
Alejandro | Academic Program Engineer | National Instruments

Using AI Sample Clock to Trigger Counter Samples

My basic question is: Is the ai\SampleClock signal only active while an analog input task is running?
The details are:
I have an X-series PCIe-6321 multifunction DAQ card. It is controlling a SCXI chassis and has a SCXI-1180 and SCXI-1302 so I can control analog inputs of the chassis as well as access the 4 counter on the card. My application requires that I use all 4 counters to measure a frequency input signal and synchronize the samples to the analog input signals. I have created 5 tasks, 1 for the AI and 1 for each counter.
I am using LabVIEW 8.6.1 with the latest NI-DAQ drivers on and 64-bit Vista OS
1. Are there any driver or hardware restrictions that would cause this solution not to work?
2. Can I use the ai\SampleClock as in input sample clock for each of the frequency tasks? If I do this will the sampling start be syncronized? I.e. if I start each of the frequency tasks first, will they wait until the AI task is started before they start sampling?
3. If that doesn't work, do I need to route the sample clock from the AI task to a PFI line (PFI1) and then use that as input to the frequency task sample clock?
I usually do option 3 when synchronizing two cards in PXI chassis and only use the software task start in stead of of synchronizing on a digital start, since the sample clock will control the samples anyway. I need to know if the same behaviour works with the scenario above.
Thanks,
Bob
Prolucid Technolgies Inc.
Solved!
Go to Solution.

Hi Bob,
I can confirm that the ai/SampleClock will only be active while the AI task is running. As far as the other questions go:
1. You'd have to provide more information about what you looking to do exactly, but there is no problem with routing the sample clock of the Analog Input task to be used with the Counters. I would read through the section of the X Series User Manual that discusses sample-clocked frequency measurements (starting on page 7-16) for some more information about what is actually going on during this configuration to make sure it suits your requirements.
The frequency of the signal to be measured should be at least twice as fast as the sample clock of your AI task.
2. You can indeed route the signal to all four tasks at the same time (you can refer to the Device Routes page in MAX to double-check routing restrictions). The sampling will be synchronized provided the four counters are started before the AI task, but the counters will be armed at different times unless you configure an Arm Start Trigger (see page 7-45 of the X Series User Manual). I would consider using the ai/StartTrigger if you wish to do this.
The effect of not arming the counters at the same time would be a different number of periods to average on each counter for the very first sample (assuming averaging is enabled). This might not be a big concern but I just wanted to point it out.
3. The routes are available internal to the board so external routing isn't necessary, you can just specify to use the AI Sample clock for the clock of each counter and the routes will be made for you. If you prefer to export the signal on a PFI line and route it back in on a different PFI line this option is also available to you but shouldn't be necessary.
I hope this helps you get started. I'd make sure to take a look at chapter 7 of the X Series User Manual if you get a chance since it describes how all of the counter configurations work in more detail. If you have any related questions don't hesitate to post back.
Best Regards,
John
Message Edited by John P on 12-01-2009 07:52 PM
John Passiak

NI 5772 acceptible external sample clock

Hello support forum,
Is it possible to use the NI 5772 adapter module with an external sample clock that does not have a constant frequency (it is still within the 400-800MHz range though), and is not always on?
An illustration of the clock signal may be more useful. Here is a link to a PDF containing a description of the instrument that is generating the clock signal. The plot of the clock signal is shown on page 7, it is the purple waveform (refered to as '(3) DAQ k-clock signals' in the text below the figures).
http://www.thorlabs.com/thorcat/22700/SL1310V1-10048-Manual.pdf
I've attached a screenshot of page 7 to this post in case the PDF is inconvienent.
Page 7 contains two figures. The top figure illustrates what I mean when I say the clock is not 'always on'.
The clock signal is supposed to be close to 500MHz, but it is not necessarily always that frequency. The frequency is dependent on the device. The device is a swept source laser. Each 'sweep' may result in a slightly different clock frequency, even within one sweep.
I can provide a lot more detail on my application if required.
Thank you for your help.
Solved!
Go to Solution.

The CLIP that we ship with the 5772 requires a persistent clock that maintains relatively stable frequency. If you need to use a 5772 with a variable frequency clock that is not persistent then you will need a custom CLIP. Depending on your application requirements this may or may not be possible. You will need to open a service request for more information.
National Instruments
FlexRIO Product Support Engineer

Sharing an external sample clock between PCI-6722 and PCI-6602

I need PCI-6602 work with PCI-6722。6602 shares 6722’s ao/SampleClock as external clock and triggered by 6722’s ao/StartTrigger。The master device is 6722, which refered as Dev1, and the slave device is 6602, which refered as Dev2. A RTSI line is used to connect the two devices correctly.
I use C API to finish my program and my code is as follows:
//config 6722 analog out task
1、DAQmxCreateTask("NI6672", &hAOTask);
2、DAQmxCreateAOVoltageChan(hAOTask, "Dev1/ao0", "", -10.0, 10.0, DAQmx_Val_Volts, "" );
3、DAQmxCfgSampClkTiming(hAOTask, "", 1000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 1000);
4、DAQmxWriteAnalogF64(hAOTask, 1000, 0, 10.0, DAQmx_Val_GroupByChannel, data, NULL, NULL);
//config 6602 counter task
5、DAQmxCreateTask("NI6602", &hCounterTask);
6、DAQmxCreateCICountEdgesChan(hCounterTask, "Dev2/ctr0", "", DAQmx_Val_Rising, 0, DAQmx_Val_CountUp);
//use /Dev1/ao/SampleClock for external clock
7、DAQmxCfgSampClkTiming(hCounterTask, "/Dev1/ao/SampleClock", 1000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 1000);
//use /Dev1/ao/StartTrigger
8、DAQmxSetTrigAttribute (hCounterTask, DAQmx_ArmStartTrig_Type, DAQmx_Val_DigEdge);
9、DAQmxSetTrigAttribute (hCounterTask, DAQmx_DigEdge_ArmStartTrig_Src, "/Dev1/ao/StartTrigger");
10、DAQmxSetTrigAttribute (hCounterTask, DAQmx_DigEdge_ArmStartTrig_Edge, DAQmx_Val_Rising);
//start counter task first
11、DAQmxStartTask(hCounterTask);
//start 6722 task
12、DAQmxStartTask(hAOTask);
I run it on the MAX virtual Device, and the Step 11always returned -89120。
I try to slove this problem, so I change the Step 7, use /Dev2/PFI9 to instead of /Dev1/ao/SampleClock.
7、DAQmxCfgSampClkTiming(hCounterTask, "/Dev2/PFI9", 1000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 1000);
The code runs well, but I don’t know which terminal is connected by /Dev2/PFI9. Does it connect to /Dev1/ao/SampleClock？
I use another API DAQmxConnectTerms to ensure that, I add a Step before Step 11.
DAQmxConnectTerms( "/Dev1/ao/SampleClock", "/Dev2/PFI9", DAQmx_Val_DoNotInvertPolarity );
The program also run well. But I am still not sure that 6602 is sharing /Dev1/ao/SampleClock。If not, which terminal of Dev1 is connected by /Dev2/PFI9?
Is my code right? If not, hwo to fix my code or supply some example for me? Thanks.

Hello Shokey,
From looking over your post, it looks like you want to program in C, using simulated instruments, a master/slave design with a PCI-6602 and PCI-6722. The PCI-6722 is the master device and the PCI-6602 is the slave device. In order to implement this with the real cards, you would need a RTSI cable between the 2 cards in order to pass the triggers and the sample clock. Unfortunately with simulated devices you can't implement this so parts of your code won't be able to work exactly like if you had the instrument.
If you did have the instrument, you can implement this by performing the following steps:
Master Device:
1.) Export the ao/SampleClock and ao/StartTrigger to a RTSI Line. (See DAQmx C Reference help for DAQmxExportSignal to export these)
Slave Device:
1.) Set the Sample clock and the trigger to the RTSI.
There is another forum that I think will help you out to implement this correctly. In this forum, the customer was trying to export a trigger through a RTSI and the problem he was experiencing was a broken RTSI cable. His code, he states, works. I hope this helps you with this and if you have any more questions, feel free to post.
Jim St
National Instruments
RF Product Support Engineer

PXI-5122 External Sample Clock

PXI-1031 Chassis
PXI-8106 PC
PXI-5122 14bit 100MS/s Digitizer
Labview 8.5
I am driving X-Y mirrors steering a laser.
I am measuring the reflected light
to develop a raster image of a sample.
I have a pixel clock running at 60MHz that
I want to clock the acquistion and external
trigger that defines the 'line valid' or sampling
across the mirrors during their constant velocity
range.
I am using [PFI0 with 'READY for START EVENT'] as
a start pulse to run my x-y mirror scan.
CH0: Analog signal
SMA TRIG: line valid
AUX: PFI0 with 'READY for START EVENT'
In the property node 'niScope'
when I add the following elements:
Sample Clock Timebase Source = VAL_NO_SOURCE
Sample Clock Timebase Rate = 60000000
Sample Clock Timebase Divisor = 1
I get the following message:
Error -1074118614 occurred at Error occurred at: niScope Fetch Binary 16.vi:2
Possible reason(s):
Driver Status: (Hex 0xBFFA402A)
An acquisition has not been initiated.
Error -1074134971 occurred at Property Node (arg 4) in CSKB-4X_VID.vi
Possible reason(s):
The channel or repeated capability name is not allowed.
Attribute: NISCOPE_ATTR_SAMP_CLK_TIMEBASE_SRC, Channel: 0
Attached are the VIs with the elements added to the niScope property node
and without.
I get the above errors even when I set the 'Sample Clock Timebase Source'
to 'VAL_NO_SOURCE'
It appears, by just adding the elements, it gives me the error(s).
How can I get the external sampling clock to work along with external trigger?
Solved!
Go to Solution.
Attachments:
CSKB-4_VID.vi ‏148 KB
CSKB-4X_VID.vi ‏146 KB

Hi csk,
I was wondering if you could clarify how many
samples you wish to take. Am I correct that you wish to take 30,000
sets of 150 samples each, or do you mean you want to take 150 sets of
30,000 samples each (since 30,000 periods of the 60 MHz clock fits
within 90% of a 1.8kHz signal)? In either case, the current method you
are using is only going to acquire a single record each time through
the loop, and so you will be limited by how fast you can retrigger in
software.
For your application, it sounds like you will
need to perform a multi-record acquisition, as this will allow you to
specify what condition to trigger off of and how many samples to
acquire each time the trigger occurs. In this way, each "transition" of the sawtooth wave is considered a single record, and you are acquiring multiple different records corresponding to each time a rising edge trigger occurs. I believe that you can accomplish
exactly what you need with only a slight modification to the niScope
shipping example "niScope EX Multi Record Fetch More Than Available
Memory.vi" (found at Start » Programs » National Instruments » NI-SCOPE
» Examples). With this VI, you can specify that you wish each record to
have a min record length of 30,000 samples (or 150 samples if this is
the case) and that you wish to acquire 150 records (or 30,000 if this
is the case). The only major change that you would need to make is to
change the Configure Trigger VI to be a Digital Edge trigger rather
than an analog trigger. With this and a few other modifications (ie -
configuring the external clock) you should be able to accomplish what
you need. Please let me know if I explained this alright and if my
assumptions are correct. Thanks, and best of luck!
Daniel S.
National Instruments

6251 AO sample clock

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