C3120 trunk timing issue on HP B460G1 ?

hello
customer encoured issue of trunking timing issue between
C3120 and HP blade server, unable to get ip from DHCP
server when server is booting up
seems issue resolved in .53SE but i didnt find either
on CCO or HP Web ?
any advice welcomed
JYP

Did you put the trunk in portfast mode ?
regards,
Geert

Similar Messages

[svn:bz-trunk] 17102: Rewrite all ImageSnapShot tests to avoid any timing issue on various app server .

Revision: 17102
Revision: 17102
Author:   [email protected]
Date:     2010-07-28 11:48:20 -0700 (Wed, 28 Jul 2010)
Log Message:
Rewrite all ImageSnapShot tests to avoid any timing issue on various app server.
Modified Paths:
    blazeds/trunk/qa/apps/qa-regress/testsuites/mxunit/tests/remotingService/dataTypes/ImageS napshot/testCaptureBitmapData.mxml
    blazeds/trunk/qa/apps/qa-regress/testsuites/mxunit/tests/remotingService/dataTypes/ImageS napshot/testCaptureImage.mxml
    blazeds/trunk/qa/apps/qa-regress/testsuites/mxunit/tests/remotingService/dataTypes/ImageS napshot/testCaptureImageJPEG.mxml
    blazeds/trunk/qa/apps/qa-regress/testsuites/mxunit/tests/remotingService/dataTypes/ImageS napshot/testCaptureImageScaleLimitedFalse.mxml
    blazeds/trunk/qa/apps/qa-regress/testsuites/mxunit/tests/remotingService/dataTypes/ImageS napshot/testCaptureImageScaleLimitedFalseJPEG.mxml
    blazeds/trunk/qa/apps/qa-regress/testsuites/mxunit/tests/remotingService/dataTypes/ImageS napshot/testCaptureImageScaleLimitedTrue.mxml
    blazeds/trunk/qa/apps/qa-regress/testsuites/mxunit/tests/remotingService/dataTypes/ImageS napshot/testCaptureImageScaleLimitedTrueJPEG.mxml
    blazeds/trunk/qa/apps/qa-regress/testsuites/mxunit/tests/remotingService/dataTypes/ImageS napshot/testEncodeImageAsBase64.mxml

I am modifying the correct httpd.conf file on the server, it just doesn't seem to work. - If I put the rewrite rules in the <Directory /> the rewrite works but it adds /Library/WebServer/Documents to the URL.
I also tried putting the rewrite rules in <IfModule mod_rewrite.c> but that did not work either.
mod_rewrite is enabled and running on the server.
I will post the rewrite rules again in the code brackets. Sorry for the long post. - If some one can try them out on their Leopard Server to see if they can get them to work, it would be much appreciated. Again, these work on my Leopard Client but I can't get them to work on Server.
-- The httpd.conf file posted above is just the default conf file found in /private/etc/apache2/
<code>
RewriteEngine On
Options +FollowSymLinks
RewriteRule ^(.+)/$ http://%{HTTP_HOST}$1 [R=301, L]
RewriteCond %{THE_REQUEST} ^GET\ ([^\?]+)\.php(.*)\ HTTP
RewriteRule (.+)\.php(.*)$ $1$2 [R, L]]
RewriteCond %{THE_REQUEST} ^GET\ ([^\?]+)\.asp(.*)\ HTTP
RewriteRule (.+)\.asp(.*)$ $1$2 [R, L]]
RewriteCond %{THE_REQUEST} ^GET\ ([^\?]+)\.aspx(.*)\ HTTP
RewriteRule (.+)\.aspx(.*)$ $1$2 [R, L]]
RewriteCond %{THE_REQUEST} ^GET\ ([^\?]+)\.htm.(.)\ HTTP
RewriteRule (.+)\.htm.(.)$ $1$2 [R, L]]
RewriteCond %{THE_REQUEST} ^GET\ ([^\?]+)\.cfm(.*)\ HTTP
RewriteRule (.+)\.cfm(.*)$ $1$2 [R, L]]
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RewriteRule (.+)\.bak(.*)$ $1$2 [R, L]]
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RewriteCond %{THE_REQUEST} ^GET\ ([^\?]+)\..(.)\ HTTP
RewriteRule (.+)\..(.)$ $1$2 [R, L]]
<code>

How to fix the Timing issue in Discoverer reports

Hi,
While running the discoverer report in Discoverer plus is taking more than 1 hour to complete( Gen.time + Extract to excel)
where as the same report completes quickly in discoverer desktop.
how to fix the timing issue in discoverer plus
Thanks
Srinivas

Timo Hahn wrote:
There is a problem with autoHeightRows and columnStretching used together in 11gR1.
Have you tried without columnStretching?
Or have you tried if it works in 11gr2?
TimoHi Timo, Thank you very much for taking time to respond to my question.. :)
Back to my question...
I tried removing the columnStretching although my requirement really requires this but no effect really happens even if I remove this.
Based on my investigation on the generated HTML, I notice the following items:
1. A table is being wrapped in a div that is being set at a fixed height.
2. On first load, if your autoheight rows is set to 6, the framework is setting a height of 96px to the div. This height would almost cut the last row of the table.
3. If you try to refresh the page or try to re-PPR the component, the framework resets it to 102px which causes the last row to be fully displayed.
My only concern is that IE is perfectly displaying this while Chrome and FF are having problem.
Based on my understanding, the framework is messing up the height only on first load. Not sure but this is how I see it. I am really not confident also on my findings
and I would most likely hear other's comment.
Thanks.

[svn] 4859: -Fix packaging timing issue that was caused by the rebuilding of the air applicationupdater .

Revision: 4859
Author: [email protected]
Date: 2009-02-05 10:15:22 -0800 (Thu, 05 Feb 2009)
Log Message:
-Fix packaging timing issue that was caused by the rebuilding of the air applicationupdater. The recompiled files would get laid down properly only to have the old files put back down on top of them. I also made sure the build directory was removed after updateAIR ran so it would not be included in the package
-removed bundles.properties from the wireframe project
bug:SDK-19128
qa:yes
doc:no
checkintests:pass
Ticket Links:
http://bugs.adobe.com/jira/browse/SDK-19128
Modified Paths:
flex/sdk/branches/i10/build.xml
flex/sdk/branches/i10/frameworks/build.xml
Removed Paths:
flex/sdk/branches/i10/frameworks/projects/wireframe/bundles.properties

Hi Chris,
I have confirmed this is an AIR SDK 13.0.0.83 bug.
I have reported this bug to Adobe Bugbase, and I also included the workaround:
https://bugbase.adobe.com/index.cfm?event=bug&id=3750892
The workaround is:
Simply comment the <externalSwfs> tag in your -app.xml will solve this bug, like this: 
DarkStone
2014-04-28

VISA Read timing issues

I am using an RS232 to control an older model Power Supply (OXFORD PS 120-10).
I have successfully written several VI's that all work, the only problem is that VISA Read takes WAY too long. I'm talking 10's of seconds to refresh. I need it have it refreshing in milliseconds or at least tens of seconds for the measurements we need. All of the VI's I have written have the same timing issue.
Attached is the most basic Serial Read/Write VI. Is there any way to improve the Read rate? Or might this just be an instrumentation issue. The strange thing is the Write commands work almost instantaneously (I can seem them on the instruments display).
Please help if you can, I've only been working with LabVIEW for a few weeks and am very must still in the learning process.
Thanks!
Solved!
Go to Solution.
Attachments:
READandWRITE timing test.vi ‏14 KB
READandWRITE timing test.vi ‏14 KB

Do you have the communications protocol for the power supply? If you do not have everything right, you will have problems with communications.
Tens of seconds is a clue that you may be getting timeout errors because the default timeout is 10 seconds. Try placing an inidicator on the error out wire inside the loop (after Read) to see if an error occurs on any iteration. The way you have the VI set up you only see the error on the last iteration of the loop.
You are writing a carriage return to the instrument. If it requires that, it almost certainly sends a carriage return with the response. (This is why I asked about the protocol). If the instrument sends a carriage return (or other termination character), then you should Enable Termination Character on the Configuration VI and set the termination character to the correct value. The default is line feed (hex A or decimal 10). A carriage return is hex D or decimal 13. You must wire the numeric value to the termination character input for any value other than the default. Then change the byte count value (at the Read input) to a number larger than the longest message the instrument will ever send, perhaps 100 or 500. The Read will end as soon as the termination character is received, regardless of the number of characters.
I suspect that this is the problem - the instrument sends fewer than 10 characters in most messages but does send a termination character.
Lynn

Questions about phase difference (possible timing issue) RC circuit

Hello,
Below is the program I am using to measure the phase difference in an RC circuit. Simply put I generate a 2kHz sine wave in LabView and send it to the circuit using an Analog output. Then I measure the output sine wave using an analog output.I also measure this using n oscilliscope. I cna clearly measure the phase difference with the oscilliscope and know it to be approximately 1.4 radians.
Issues with the program:
Different phase difference measured each time the program is run for the circuit. It is also never correct.
Possible causes:
You will notice by looking at the vi I measure the phase from the signal generator. Should I be using a second analog input to measure the sine wave as it is outputted at the start of the circuit?
I mainly think that it is a timing issue. While the phase difference is constant each time the program it varies each on run. So the time each tone measurement begins its first measurement seems to be different each time and causes this different phase reading.
The card I am using is a PCI 6221, is there a timing issue related from switching to input and output acquistion or are they seperate.
Is there anyway to ensure that both tone measurements are measuring phase at the same point in (actual) time?
I would really appreciate any advice or alterations on the program anyone could offer me (I am a college student and LabVIEW is not on our curriculum so I have no support, yet I am using it for my project (D'oh!))
Solved!
Go to Solution.
Attachments:
RC Circuit Test.vi ‏271 KB

I would certainly acquire two signals. Feed the analog output right back into an analog input and then your filtered signals in another.
Initially, I would feed the analog output into both analog inputs and measure the phase delay due to the multiplexed A/D on the card. Once you have that measurement, you can feed in the filtered signal and then measure the phase difference of that signal.
Randall Pursley

Unity Express voice mail timing issue.

Hi,
I have installed one uc520 at one of our customer. i configured voice mail but there is one issue with the voice mail timing. Suppose i retrive the voice mail the voice mail prompt is giving the wrong time. Suppose I send a voice mail to a subscriber at 3pm, the voice mail prompt is saying 'message send at 4 pm'.
I checked both cme and cue clock settings and both are showing the correct time.
Can anybody help me on this issue
Regards
Thejas

Are the calls to CUE getting dropped when you dial from an IP Phone at site 1 (callmanager) ?
How is the CME router setup in Callmanager ? Is it added as a regular H323 gateway or a H225 trunk ? Either ways, make sure the gateway registers with the correct IP that is used in Callmanager.
So if CME has a wan ip (a.a.a.a) and a lan ip (b.b.b.b), if you add b.b.b.b as the CME gateway's ip address in Callmanager, then you need to bind the H323 ip address as follows.
interface fa0/0
ip add b.b.b.b
h323-gateway voip bind srcaddr b.b.b.b
Most likely the CME gateway is sending calls to Callmanager using ip address a.a.a.a which is the wan ip, through which it has the default route to Callmanager.
Hope that makes sense!

Timing Issue in BADI MSTO_PROCESS_ITEM PO

In ECC 6.0 some logic has been added to BADI MSTO_PROCESS_ITEM, method check. Two non rfc function modules have been used to update custom fields. MEPO_DOC_HEADER_PROCESS and MEPO_DOC_ITEM_PROCESS. Every once in awhile the custom fields are not updated. When we take the purchase order and go in change mode, it updates the fields correctly. When we go through debug, same thing updates correctly, and create also. it only happens sometimes. Could there be a timing update issue in the badi? Buffer issue? If yes, what are some solutions. Could we put a wait command in the badi?

Hi,
IM_item is itself an object, it contains methods. check the assosiate type IF_PURCHASE_ORDER_ITEM_MM.
check the sample code it willhelp you.
sudheer.A

4402 WLC Trunk/STP Issue

Hello,
We have a few WLC's on our Network. The last WLC we deployed is having issues with connectivity. Persistent PING tests are showing drops every 20 packets or so. We noticed that the Mgt VLAN is flapping in STP.
The WLC is connected to a 4506 Switch 10/100/1000 mode. Auto negotiation is on and the port on both sides is 1000/Full. Having no issues with the others controllers.
4506 port config:
interface GigabitEthernet3/42
description Trunk to nyc1-32-wlc-02
switchport trunk encapsulation dot1q
switchport trunk allowed vlan 1,50-52
switchport mode trunk
VLAN 52 is the Mgt VLAN associated with the WLC. Any help would be appreciated. Thank you.
John

I connected Port 2 to 4506-2 and we're still having the same issue. It appears that the Mgt VLAN is being dropped from Spanning Tree.
ICMP packets are OK:
nyc1-32-4506-1#sh spanning-tree int gi3/42
Vlan Role Sts Cost Prio.Nbr Type
VLAN0001 Desg FWD 4 128.170 Edge P2p
VLAN0050 Desg FWD 4 128.170 Edge P2p
VLAN0051 Desg FWD 4 128.170 Edge P2p
VLAN0052 Desg FWD 4 128.170 Edge P2p
ICMP Packets time out:
nyc1-32-4506-1#sh spanning-tree int gi3/42
no spanning tree info available for GigabitEthernet3/42
After 4 time outs, the SPT on the interface comes back up.
nyc1-32-4506-1#sh spanning-tree int gi3/42
Vlan Role Sts Cost Prio.Nbr Type
VLAN0001 Desg FWD 4 128.170 Edge P2p
VLAN0050 Desg FWD 4 128.170 Edge P2p
VLAN0051 Desg FWD 4 128.170 Edge P2p
VLAN0052 Desg FWD 4 128.170 Edge P2p
nyc1-32-4506-1#
Before we enabled spanning-tree trunk fast, we got several time-outs (7 - 9), now we only get 4 (with it enabled).
Any idea? Thank you.

ITSP SIP Trunk audio issue

Hi Guys,
call flow:
external caller > service provider SIP Trunk >CUBE VG>CUCM>User ip phone.
no firewall between
we are not facing this audio issue for all the calls but also for few calls , i can say 3 out of 10 calls.
under VG bind media and control command recently added by TAC guys instruction but no use.
recently we changed our office but no changes for device or configuration
also attached debug log for the issue call.
ONE THING I NOTICE 2 HOUR TIME DIFFERENCE IN VOICE GATEWAY than actual time.
Voice gateway show run: ---------
aaa session-id common
memory-size iomem 10
clock timezone CET 1 0
clock summer-time CEST recurring last Sun Mar 2:00 last Sun Oct 2:00
network-clock-participate wic 0
dot11 syslog
ip source-route
ip traffic-export profile tac mode capture
ip traffic-export profile sniffer mode capture
bidirectional
ip traffic-export profile Test mode capture
bidirectional
ip cef
no ip dhcp use vrf connected
ip dhcp excluded-address 172.18.122.1 172.18.122.50
ip dhcp pool PHONES
   network 172.18.122.0 255.255.255.0
   domain-name ldhenergy.net
   option 150 ip 172.18.122.10
   default-router 172.18.122.8
no ip domain lookup
ip domain name ldhenergy.com
ip host ld-lsn-cm-01 172.18.122.10
no ipv6 cef
multilink bundle-name authenticated
isdn switch-type primary-net5
voice call send-alert
voice call convert-discpi-to-prog
voice call carrier capacity active
voice rtp send-recv
voice service voip
ip address trusted list
ipv4 172.18.122.11 255.255.255.255
dtmf-interworking rtp-nte
allow-connections h323 to h323
allow-connections h323 to sip
allow-connections sip to h323
allow-connections sip to sip
redirect ip2ip
h323
sip
bind control source-interface FastEthernet0/0
bind media source-interface FastEthernet0/0
voice class codec 1
codec preference 1 g711alaw
codec preference 2 g711ulaw
voice translation-rule 20
rule 1 /044578$....$$/ /\1/ type any unknown plan any unknown
voice translation-rule 30
rule 1 /021343$....$$/ /\1/ type any unknown plan any unknown
voice translation-rule 40
rule 1 /^$.*$/ /0\1/
voice translation-profile SIPIN
translate called 30
voice-card 0
dspfarm
dsp services dspfarm
crypto pki token default removal timeout 0
controller E1 0/0/0
interface FastEthernet0/0
ip address 172.18.122.3 255.255.255.0
ip helper-address 193.73.102.255
duplex auto
speed auto
interface FastEthernet0/1
ip address 10.128.18.9 255.255.255.0
duplex auto
speed auto
interface Integrated-Service-Engine1/0
ip unnumbered FastEthernet0/0
service-module ip address 172.18.122.11 255.255.255.0
!Application: CUE Running on NME
service-module ip default-gateway 172.18.122.8
no keepalive
router ospf 1005
network 172.18.122.0 0.0.0.255 area 0.0.0.1
ip forward-protocol nd
no ip http server
no ip http secure-server
ip route 0.0.0.0 0.0.0.0 172.18.122.8
ip route 10.20.0.0 255.255.0.0 172.18.122.8
ip route 172.18.122.11 255.255.255.255 Integrated-Service-Engine1/0
ip tacacs source-interface FastEthernet0/0
control-plane
ccm-manager fallback-mgcp
ccm-manager mgcp
no ccm-manager fax protocol cisco
ccm-manager music-on-hold
ccm-manager config server 172.18.122.10
ccm-manager config
mgcp call-agent 172.18.122.10 2427 service-type mgcp version 0.1
mgcp dtmf-relay voip codec all mode out-of-band
mgcp rtp unreachable timeout 1000 action notify
mgcp modem passthrough voip mode nse
mgcp package-capability rtp-package
mgcp package-capability sst-package
mgcp package-capability pre-package
no mgcp package-capability res-package
no mgcp package-capability fxr-package
no mgcp timer receive-rtcp
mgcp sdp simple
mgcp fax t38 inhibit
mgcp rtp payload-type g726r16 static
mgcp profile default
sccp local FastEthernet0/0
sccp ccm 172.18.122.10 identifier 1 version 5.0.1
sccp
sccp ccm group 1
associate ccm 1 priority 1
associate profile 10 register HW-MTP
associate profile 20 register TRANSCODE
dspfarm profile 20 transcode
codec g711ulaw
codec g711alaw
codec g729ar8
codec g729abr8
maximum sessions 4
associate application SCCP
dspfarm profile 10 mtp
codec g711alaw
maximum sessions hardware 24
associate application SCCP
dial-peer voice 343 voip
translation-profile incoming SIPIN
session protocol sipv2
incoming called-number .
voice-class sip bind control source-interface FastEthernet0/0
voice-class sip bind media source-interface FastEthernet0/0
dtmf-relay rtp-nte sip-notify sip-kpml cisco-rtp h245-signal h245-alphanumeric
codec g711alaw
no vad
dial-peer voice 344 voip
destination-pattern 0T
session protocol sipv2
session target ipv4:62.2.46.4
voice-class sip bind control source-interface FastEthernet0/0
voice-class sip bind media source-interface FastEthernet0/0
dtmf-relay rtp-nte sip-notify sip-kpml cisco-rtp h245-signal h245-alphanumeric
codec g711alaw
no vad
dial-peer voice 1600 voip
destination-pattern 16..
session protocol sipv2
session target ipv4:172.18.122.10
voice-class sip bind control source-interface FastEthernet0/0
voice-class sip bind media source-interface FastEthernet0/0
dtmf-relay sip-notify
codec g711alaw
no vad
dial-peer voice 1616 voip
destination-pattern 1616
session protocol sipv2
session target ipv4:172.18.122.10
dtmf-relay rtp-nte sip-notify sip-kpml cisco-rtp h245-signal h245-alphanumeric
codec g711alaw
no vad
dial-peer voice 1699 voip
destination-pattern 1699
session protocol sipv2
session target ipv4:172.18.122.10
voice-class sip bind control source-interface FastEthernet0/0
voice-class sip bind media source-interface FastEthernet0/0
dtmf-relay sip-notify
codec g711alaw
no vad
sip-ua
call-manager-fallback
max-conferences 4 gain -6
transfer-system full-consult
ip source-address 172.18.122.3 port 2000
max-ephones 42
max-dn 144
Regards
Vigeesh

I suggest do a network capture or enable debug ccsip mesages.
look for conneciion ip address inside sdp field and check that are recheacble.
regards

Timing issues in implemented design

Hello everyone,
I have been reading in these forums for a long time now, but have never posted. Possibly because I have never had such a design-specific issue that was above my knowledge...I wish my problem was more "friendly" for a first post.
Anywho, my problem is as follows: I've been working on a design for a few months now and everything was working fine up until recently (apart from logic errors of course that I would run into and fix here and there). I recently integrated a module that I did not design myself. My behavioral simulations work fine and all of my previous functionality seems to be working as well when the design is implemented. However, the functionality based on the "foreign" module has introduced problems.
What I am using: Spartan 6-XC6SLX16 and therefore ISE
Here are some of the functional symptoms I have recorded so far:
- The functionality always produces the same output after the design is implemented and uploaded
- The functionality can differ if I change something (no matter how small or where) in the design itself
- The same applies for changing constraints
- After some implementations+uploading the functionality works correctly, and in other cases it fails by either producing erroneous results or just "getting" stuck (i.e. one of my FSMs)
- The critical path w.r.t. my system clock is in the module that seems to be the source of the problems
This leads me to believe that there is some timing-related issue. The only timing related constraint I have used is for my system clock period. The timing report does not show any errors regarding this constraint.
My guess so far would be that I have an unconstrained path problem, possibly in combination with insufficient account for system and input jitter, as the design does take up around 40-50% of FPGA. The problem is that I have no experience in tracking such an issue down, so I could definitely use some pointers in the right direction.
Things I have tried:
- Basic logic debugging of the input-output behavior of the problematic functionality using chipscope
- Post-PAR simulation of the module that includes "foreign" components: Works fine with a 100MHz constraint
- Increasing the frequency constraint for the entire design from 100 to 120 MHz but that was just out of lack for better ideas, it did not help.
- Looking at the unconstrained paths that the timing analysis can provide. I was hoping to find something related to the component that seems to be causing the problems, but no luck. Mainly just entries related to all of the ring oscillators that I am using, which it seems to be interpreting as a clock domain crossing case. These, however, have nothing to do with the problematic portion of the design.
I have a few questions at this point:
-Can one problem lead to a totally uncontrollable landslide of other seemingly independent problems?
-Also, how do I make sure that I get ALL of the unconstrained paths and not just a subset?
-Could it even be an unconstrained path issue if nothing in the report indicates that there is an unconstrained path in the problematic region?
I hope I have described my problem thoroughly enough for you to make some educated assumptions about what could be going wrong. I'm interested in learning what typically causes such problems. I am aware of synchronizing between clock domains, or the de-assertions of asynchronous resets, the standard problems...but I missed something critical here and I don't want it to happen again. Perhaps somebody has a pointer for me where I could do a little more digging?
I will set up a timing simulation of the entire design, but as this is a rather lengthy process it will be some time until I get some results.
Cheers,
Shibby

Hello,
Thank you for the quick replies so far.
austin wrote:
So, my questions to you are:
Did you review the entire (verbose) timing report?
What is your smallest positive slack number?
What is your system jitter? Your clofck source jitter?
How well is the device bypassed on the board you are using (is it one of ours, or one from our distributors)?
- Yes, I went over the entire verbose timing report that DIDN't cover unconstrained paths. However, when I did have the timing analyzer output unconstrained paths as well, there were a lot of timing errors. I assume this is due to the fact that unconstrained = period requirement of 0 and the slack is therefore always negative? I had a look at these and none of them really indicate a problem to me.
- The smallest positive slack in the case of the standard verbose timing report was 0.304ns.
- The system jitter is (the default?...I did not specify it in my UCF) 0.070ns. The other jitter values (TIJ and DJ) are both set to zero. So the resulting clock uncertainty is very small...possibly too small.
- The board is a Nexys 3 from Digilent. I assume they know their stuff when it comes to capacitive bypassing of ICs. How would this play a role? If I've understood correctly then this is correlated to the system jitter. Bypassing problems would lead to larger/more frequent voltage dips (especially for larger designs) and therefore a clock that exhibits more/larger uncertainty (i.e. jitter)?
I think my lack of knowledge in correctly constraining larger designs might be causing the problems here. But perhaps also not, so just to be sure, I want to ask the following (possibly stupid) questions:
- Instead of increasing parameters related to jitter of a certain clock, wouldn't increasing the period constraint of that clock have the same effect? As I wrote, increasing for example the system clock constraint to 120MHz rather than 100MHz showed no improvement of the problem...I'm not sure what this tells me...if anything at all.
- I do have another clock domain and I do synchronize signals (there is nothing big going on, mainly just handshaking) between the two domains. What could the effect be if I removed the period constraint for one of the clocks apart from possible timing problems in that clock domain?
- The ring oscillators that I have clock certain FFs if oscillators enabled, however I do not know their exact frequencies. Would it suffice to just use a known upper bound?
The latter two questions concern parts of the design that habe been there for a long time and have no functional connection to what was added that seems to be causing the problem, though.
austin wrote:
ISE ignores clock domain crossing (Vivado does not, but Vivado only supports 7 series and later devices). Do you have any unidentifed clock crossings that require synchronizers?
Yes, I do. As mentioned above I synchronize my handshake signals between clock domains using simple level synhronizers (since I'm not doing anything fancy like transforming pulses). I am also synchronizing the de-assert of my asynchronous system reset in both clock domains using standard reset bridges, which are basically just level synchronizers.
Interestingly, the timing report containing unconstrained path info tells me that one constraint was not met whereas the other one does not. It also concludes that the maximum frequency is lower than 100MHz, but gives the same result for the system clock. If I've understood correctly, this is due to the fact that there is an unconstrained path with maximum combinational path delay larger than 10ns. I had a look at this path (there are a few of the same type) and it is a path that I don't think needs to be constrained, so I wouldn't see this as the issue.
Albeit having looked at the timing reports, I wouldn't exclude that I've missed something, simply because I haven't dealt with such problems until now. So, I'm not sure whether or not it would be helpful to attach both the standard verbose timing report and the one including unconstrained paths...but perhaps someone could point me to something that might seem fishy..?
One thing I will do is continue to try and isolate the location of the problem using timing simulations or possibly stripping the logic of certain components and checking the behavior of the implemented design.
Best regards,
Shibby

Weird Timing Issue with Custom Javascript Files

I have attached a static javascript file to my application using the Shared Components...Static Files facility in APEX. This is working. I can call methods in my JavaScript file and they work as expected.
The issue is that if I ever want to have JavaScript run when the page is loaded, it is as if the javascript is not in place yet when the method is called. For example, I want to set some some style characteristics of a few common fields that occur on more than one page, if I add a button to the page that I click to call the method (and don't select "Fire on Page Load"), this works fine. However, if I do select "Fire on Page Load", the javascript is invalid.
I have tried After Refresh of the region which seems like it would work but, this event fires before* the javascript is available.
How can I load the page, including the javascript reference, and then call the javascript method?
-Joe
Edited by: Joe Upshaw on Apr 3, 2012 12:49 PM

WR,
I think the latter, adding it to the template, sounds like the better solution. (I am using Application Express 4.1.1.00.23 BTW).
Now for the newbie questions...
I am trying to figure out exactly where to make this change. So, I had a couple of questions.
1. I went into Shared Components>Templates. Then, I scrolled down to the section labelled Page. I see that the default checkmark is beside "No Tabs - Right Sidebar" so, I click this and I do indeed find a <HEAD> section defined. Is this where I need to add the reference to the javascript file?
2. I assume I need to upload the static file to the server. Right now, I have uploaded it via the Shared Components>Static Files selection. When I add it now, I am doing this:
var headElement = document.getElementsByTagName("head")[0];
var currentCommonRiskPos = currentHeadHTML.indexOf( 'commonRisk.js', 0 );
if ( currentCommonRiskPos == -1 )
   var jsRiskCommon = document.createElement( 'script' );
   jsRiskCommon.id = 'commonRisk.js';
   jsRiskCommon.setAttribute( "type","text/javascript" );
   jsRiskCommon.setAttribute("src", "#APP_IMAGES#commonRisk.js" );
   headElement.appendChild(jsRiskCommon);
}See how I used "#APP_IMAGES#"? I am assuming that this would not work from the page template, correct? For example, in the template currently, I see:
<script src="#IMAGE_PREFIX#themes/theme_24/js/4_1.js"></script>I am assuimng that I should upload my JS file somewhere in the images folder and reference it in the same way, right? For example:
<script src="#IMAGE_PREFIX#JoesStuff/js/HellowWorld.js"></script>Does all of this sound correct?
Thanks,
-Joe

Subject: Timing issues in LabVIEW 6.0

Hi all!
I am running LabVIEW 6.0 on Win 2k Professional and am baffled
by the following:
Using the GPIB Read .vi, I read from a couple of virtually
identical Solartron/Schlumberger 7150 Digital Multimeters at
a set time intervall and subsequently write the data to file.
The test routine performs only elementary arithmetic besides
GPIB reading and writing to file.
Using the Get Time/Date In Seconds .vi to time the read-store
loop reveals that the GPIB Read operation is excessively slow.
As the GPIB Read .vi's timeout defaults to 10000ms (488.2
global timeout), I tried out a number of different timeout
values and found that timing only begins to approach the
value I set without GPIB read errors when timeout is set at
>=1000ms and th
e read-store intervall is at least 440ms(!)
I cannot understand why the GPIB read operation should
require as much as 440ms when the CPU is otherwise minimally
loaded...
Isn't there a way to GPIB read at a rate faster than once
every 440ms?
Thanks in advance.
Best regards,
Andrew

I did a quick search of the instrument driver network and found a CVI driver for your instrument and a LabVIEW driver for a model 7151. You can convert the CVI driver to LabVIEW and the 7151 might be close to what you need. The drivers can be found here: Solartron 7150 LabWindows/CVI Certified Plug and Play Instrument Driver.
Also, there could be a lot of reasons that your readings are slow. See if Solartron has some example code that you can look at. It probably won't be in LabVIEW but you should be able to use the same GPIB commands.Message Edited by Molly K on 02-18-2005 11:38 PM

Timing Issue - Running sqlplus for each script in a list of scripts

I have a large number of folders with sql scripts that I need to run from windows with sqlplus. The problem is the scripts must be run in order. When I loop through the scripts and run sqlplus for each one, they sometimes fail because things in the prior script are not yet available.
So I added a jdbc client that checks a table for when the data is available from the prior sqlplus script. It says yes the data is visible in the table so the script can launch the next SQLPlus process but it fails unless I put a 2 second sleep in.
Because sqlplus doesn't have a "CD" command and there are limitations with SQL_PATH and relative imported child scripts, I'm afraid I'm stuck with running multiple sqlplus sessions.

I should clarify that I'm looking for a way to run scripts in sequence with sqlplus. There is an issue where one sqlplus session commits and exits and the next starts but the commit is not yet available to the new sqlplus session. To me this is a bug with sqlplus but maybe someone can explain how this is a "feature".

Weird timing issues when playing back a recorded sound file and with synths

Hello there,
I'm having a couple of strange issues with playing back files that I have recorded using MIDI data which is then used to play an external synth which then gets recorded to an audio track which at the time is perfectly synced to a click track.
The problem is (and I really dont get why this is happening) when it comes to playing back the recorded audio file that sometimes it is either behind or ahead of the beat.
This makes absolutely no sense because sometimes it IS in time with the beat and other times when I play through my piece it is obviously out! I haven't moved the audio file in the arrange window and it is a permanent .aiff file that is stored on my hard-drive...what on Earth is going on?
On a side note, the same problem happens with any of Logic's synths when I use an LFO that is supposed to be synced to the beat. Sometimes when I play back the MIDI data it is perfectly synced and in time and other times it is horribly out. It really is just pot luck!
Anyone got any ideas?

Thank you supermacmom!
I have the LifeProof case for the iPhone5, and I remember the instructions saying that any protective screen cover should be removed before enclosing the phone into the case, but I left mine on with no ill effects.
But I should have taken off the back protective film, which was covering the video mic!

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