DRC warnings in LV FPGA-Modul

Hi,
I am using LV 7.1.1 with FPGA-Modul 1.1.
Last week, I started to get DRC warnings in the compiler-log:
Running DRC.
mytop_n_133762400_resVI_n_139936640_uut/B5 is not connected.
mytop_n_133762400_resVI_n_139936640_uut/B5 is not connected.
mytop_n_133763768_resVI_n_139792112_uut/B5 is not connected.
mytop_n_133763768_resVI_n_139792112_uut/B5 is not connected.
mytop_n_117965800_resVI_n_132097136_uut/B5 is not connected.
mytop_n_117965800_resVI_n_132097136_uut/B5 is not connected.
mytop_n_133765136_resVI_n_135911624_uut/B5 is not connected.
mytop_n_133765136_resVI_n_135911624_uut/B5 is not connected.
DRC detected 0 errors and 8 warnings.
Are they something I should worry about?
Any hints about how I can fix things to get rid of them?

These warnings are normal for the compile process. They indicate signals that are left unconnected within the FPGA, but that does not affect the operation or performance of your VI on the FPGA.
Christian Loew, CLA
Principal Systems Engineer, National Instruments
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