EDT tutorial issue

Question

Hello,
Have anyone got below issue doing the tutorial (UG1165 page 38, item 30)? The logical port should be constrained.
If so, what did you do to resolve it? Thank for any feedback.
[DRC 23-20] Rule violation (UCIO-1) Unconstrained Logical Port - 2 out of 132 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined.  To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.  Problem ports: gpio_0_tri_io[0], dip_switches_4bits_tri_io[0].

Answer 1

Hello,
Have anyone got below issue doing the tutorial (UG1165 page 38, item 30)? The logical port should be constrained.
If so, what did you do to resolve it? Thank for any feedback.
[DRC 23-20] Rule violation (UCIO-1) Unconstrained Logical Port - 2 out of 132 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined.  To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.  Problem ports: gpio_0_tri_io[0], dip_switches_4bits_tri_io[0].