Errors in the "Getting Started with the FPGA Module" examples

We have LabView 8.0, the NI-5640R, and the LabView FPGA module installed on a computer with the IF-RIO board, and we are trying to compile the provided NI examples (NI-5640R documentation), but we receive errors that say "sub VI is not executable" and "you have connected terminals of two different types"  Why are the existing NI VI's not compiling properly?  We are guessing that we have some configuration error, though we aren't sure.

The run error is broken and gives the option to list and locate errors, though these errors are found everywhere in the files that are provided in the NI-5640R.  Several wires have red x's that say that different types are attempting to be wired, and multiple blocks are highlighted that list errors that say that the blocks cannot be activated.  It seems like there is a problem with how the software and board has been installed.  The group that used the board before us had a functioning project, although they but the IF-RIO in their own computers, so they might not have put everything back together properly.  Their old VI's produce the same errors on our computer.  Do you have any suggestions on what to do? 

Similar Messages

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    I'm sure there is a key step I'm missing or misunderstanding, but I have not been able to figure it out myself yet. I've attached my modulator diagram as well as two different attempts at host VIs. I can share other information, but I'm not sure what is most relevant.
    2. I am also trying to test a simple wrapper VI for the Xilinx FFT block, and I am having trouble accessing FIFOs inside the host VI. I thought this would be relatively straightforward, but when I tried to change the "method" on an "invoke method" block, there were no options for accessing FIFOs, as I understood there should be. This is a total roadblock for me. These two diagrams are also attached, the test diagram shows the options available to me for the "invoke method" block.
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    I had to combine the diagram images; in case they are hard to follow this way, see the individual images here: http://imgur.com/a/oB6OD .
    Thanks in advance for any suggestions.
    Attachments:
    mod_all.png ‏68 KB
    fft_all.png ‏52 KB

    Hello Monguin61
    If you are having problems reading from DMA FIFO's you should test them using a very simple code to understand their behavior. First, you could start taking a look to the linked documents:
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    VisualCafe (21:54:20):
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    CafeEE\Java\Lib\servlet.jar;D:\VisualCafeEE\Java\Lib\webserver.jar;D:\Visual
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    VisualCafe (21:54:20):
    a\Lib\xml.jar;D:\VisualCafeEE\Java\Lib\symtools.jar;D:\VisualCafeEE\Bin\Comp
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    D:\WebGainStudio\Documentation\LibraryExample\BusinessLogic\Book\com\webgain
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    VisualCafe (21:54:20):
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