External clocking on 6711 card

Hi all,
I just read the manual of the card PCI6711, it supports the external clock. So does it mean we can change the update rate by using different external clock rate?

chris88 wrote:
HI dragondriver
They are both correct, the PCI 6711 supports external clocking for the analog output tasks, but for Digital I/O tasks the timing can only be set to software timed, meaning that you cannot use external clock for digital tasks.
The main difference between RTSI and PFI is the physical connection, PFI lines conects through the connector block you are using and the RTSI is connected through a RTSI bus cable used to synchronize several DAQ cards.
You can choose any PFI <0 to 9> and this article show how to select which PFI line is the source of sampling.
Regards
Thanks for the clarification . I only one doubt. Someone told me that 6711 only supports software-based digital pulse input/output but it supports external-clock-driving counter output. So when you said softwarebased digital I/O task, do you mean all digitals output including counter output? Thanks.

Similar Messages

DAQ Card is inducing noise on an external clock signal resulting in false triggering

I am using an optical encoder as an external clock source for analog measurements with a PCI 6036 card. The optical encoder signal is "filtered" using a Schmitt Trigger circuit and proper shielding practices are used on the encoder cable. I am using a recent version of Labview.
When the TTL square wave signal from the encoder is viewed on an oscilliscope (without the DAQ attached) it is a picture perfect square wave, nothing that would cause any problems.
When I then connect the encoder output to my PFI line (with or without the oscilliscope) I get false triggering due to intermittent (seemingly random...) high frequency noise "blips". Out of 360 expected samples, I will typically get between 2 and 6 "bonus" samples... When captured on a scope, the noise looks like a decaying sine wave and lasts for only a few us. the peak magnitude is tyically around 2 V or so as shown on the scope, which is apparently just enough to make my card grab a sample.
Since the noise is only present when the encoder signal is attached to the DAQ, it seems that the DAQ is somehow inducing noise into the signal.
I have been fighting this problem for a while now and tried the following:
1) I first tried the raw encoder signal, but then added the Schmitt trigger, increased the signal strength of the encoder lines by adding resistors to ground, double checked my shielding, etc...
2) I verified that my ground potential between my card and my conditioning circuit were not causing problems. The conditioning circuit and encoder is now powered of the card itself, which should resolve any possible problem with grounds.
3) Cursed at various inanimate objects (made me feel better but didn't help the situation)
4) Checked if I could set a minimum pulse width required to trigger off of an exernal scan clock (I can't with my hardware.)
5) Swapped my card with a card of a different type (problem is still there)
If anybody out there has some recomendations, I am open to anything.

Hello OSU_Mech_Eng,
I'm not quite sure how the DAQ card could be inducing glitches into
your digital signal. Digital signals from mechanical devices like
quadrature encoders can often be glitchy or bouncy, but your schmitt
trigger should act as a debouncing filter to clean up that digital
signal. It sounds like you have thoroughly troubleshooted this
problem, and I would recommend moving on and trying to use a counter on
your DAQ board to generate the digital signal, rathar than using the
raw signal from your encoder/schmitt trigger.
You were correct when you stated that the best way to do this is by
configuring your counter to perform retriggerable pulse
generation. You can use the signal of from your encoder to gate
the internal clock on your DAQ card, creating a clean digital
signal. By setting the minimum pulse width of the signal, you
will be able to ignore the small glitches in your signal. Here is
a link to some Knowledgebases describing how to do this:
How Do I Remove Glitches or Add a Debounce Filter to My Digital Signal?
How Do I Define the Parameters for Pulse Generation in NI-DAQmx?
For further reference, on all of NI's new M-Series DAQ cards (PCI
625x), the PFI circuitry contains built in debouncing filters to
protect against small glitches in digital signals. If you have an
M-Series card lying around, it might be helpful to give that a try.
I hope this helps,
Travis Gorkin
Applications Engineering
National Instruments
www.ni.com/support

Using external clock on a 6062E DAQ card

In my application I need to use an external clock (2 MHZ) to sample 10 channels at 40 KHz each. I connected the external clock to PFI_7/Startscan, enabled the ND_IN_CHANNEL_CLOCK_TIMEBASE and ND_IN_SCAN_CLOCK_TIMEBASE using The Select_signal function. If I use only two channels (instead of 10) everything works fine. If I try to increase the number of channels to more than 2 I get a digitized waveform with points missing (one every 2). I tried to decrease the sampling rate to 4 KHz per channel, but the problem persisted. For 2 channels everything is always fine, but for more than 2 I get the same error in the digitization pattern.
The relevant lines of my codes are attached
Thank you for your help
Enrico Gratt
on
Attachments:
Sample_code.pas ‏3 KB

Enrico,
I have a couple of questions. Do you see the same amount of missing data regardless of how many channels (more than 2) you are acquiring? If you use the internal 20 MHz timebase, can you successfully acquire all 10 channels at 40 kHz?
Spencer S.

Where is RTSI trigger lines in 6711 card

Hi there,
I have a PCI-6711 card. The manual said it supports the RTSI trigger line to connect the external clock as the timing source. I try to find the pin associate with the RTSI in the layout for PCI 6711 but I didn't see any. I only see PFI8/GPCTR0_SOURCE. Is it the same thing? I am pretty confusing how to use external clock to replace the internal software-based clock. Thanks.
Solved!
Go to Solution.

TheRealMichaelJordan wrote:
Hi dragondriver,
Refer to this KnowledgeBase article for information on the RTSI trigger lines on PCI cards. The RTSI bus will allow allow synchronization between DAQ devices on the computer.
Regards,
Jordan G.
Thanks you. I didn't realize that there are some pin on the top of the card. But then cause my doubts. I have a 6711 card. Many posts said that it only support softwared based clock, I cannot use the external or hardware clock to drive the digital output. Ok, so my question is, can I connect the external clock to the RTSI pin so as a hardware clock and use it to drive the analog ouput and counter output? The manual said I can use the external clock connected to the PFI or RTSI, so are they the same. It is so confusing since I don't see any example to do that on 6711 card and I don't know which PFI pin I should go to ?

Should external clock be pulse or sinusodial wave?

Hi there,
I am going to connect an external clock source to 6711 card. But I wonder if the source should be pulse trains (squre wave) or could be sinusodial wave. When we say the frequency of the clock, does it mean the occurence of the rising edge or fall edge but not the pulse, right? And what's the voltage range for the clock signal?
Solved!
Go to Solution.

Hi dragondriver
The external clock should be a pulse train, not a sine wave.
When we talk about frequency, as you stated it means the occurrence of rising or falling edges within a specified time.
The voltage range should be from 0 to 5V.
Regards
Chris S.

Simultaneous updation of sine wave using 2 PXI-6711 cards using RTSI Trigger

Hi ,
How to generate continuous sine wave using two pxi-6711 cards at same time without any phase shift using traditional nidaq functions.
Regards,
satya

In LabVIEW, go to Help>>Find Examples. Navigate to Hardware Input and Output>>Traditional DAQ>>Multiple Device. There is an example there called "Two E Series Shared Scan Clock". That example is for analog input, but you should be able to modify it to be for analog output. Basically you will just have to share the scan clock from one board(master) and use it as an 'external' clock for the other board(slave).
-Alan A.

How can I use external clock to implement a delay?

Hi all,
I am testing to use external clock to drive dev/PFI0 (on device 6711) which is used as the clock for the analog ouput. I have thinking two applications by using the external clock but I don't have much idea on the implementation yet.
First of all, I have a sequence of data (array) with each sample being sent at the interval of 1us. I use an external clock (10MHz) driving the PFI0 so it is pretty easy to achieve that goal. I am thinking what happen if I want each sampel being sent at different time. For example, if I have 5 samples, I want the first one sent 1us after the task start and wait 2us to send the 2nd sample, wait 5us to send the 3rd sample and wait 11 us to send the 4th sample, and wait 1us to send the last sample. Is it possible to achieve that based on the external clock?
Second question is about the delay. My code require ciritcal timing and the builtin delay doesn't behave very well because I am running in windows. I can increase the priority of the vi to highest, it helps a bit but still not perfect. I am thinking if it is possible to implement hardward delay based on the external clock. Any idea?

Hello dragondriver,
To answer your first question, yes you could send data in that fashion. You would have to programmatically build a pulse train and use that to trigger the sending of data. The answer to the second question is essentially the same. You should be able to programmatically build a pulse train with a delay and use it as trigger to begin whatever operation you have.
Jonathan L.
Applications Engineer
National Instruments

How do I use a quadrature encoder as an external clock (PCI 6229)

Hello, ( a similar post has been placed on DAQ forum apologies as I did not know best place)
I have a PCI 6229 M Series data acquisition card. I want to use a quadrature encoder to be the external clock driving the acquisition of a number of signals. I have set up reading 24 signals each time a clock pulse is received using the DAQ assistant and set my external clock to pin pfi8 (I think) this is then connected to an encoder output. This works well enough until the encoder is run too fast when it appears I am either missing pulses or getting bounce.
How can I set up to clock using a quadrature encoder? I have seen a number of questions on this forum regarding quadrature encoders and reverse counting but not on using them as an external clock.
Basically I want to have the stability and "bounceless" nature of using two outputs from a quadrature encoder whilst still using an external clock. Is this just a case of configuring controls to certain pfi's? If so how is it done?
Any help or pointers would be helpful. So far I have managed very nicely by simply using the DAQ assistant and the interface it has would suggest that if configured for a certain pfi pin I could actually still use it.
Thanks in advance.
Kevin

Hi,
Well I've had alook into this for you and I'm not quite sure I understand what you are looking for.
Is it possible for you to phone back in to support?
The reason you are seeing bounce at high speeds, or indeed loss of points, is due to the sampling rate that you have set up.
What you will find is that the trigger will start an aquisition of a number of points at a certain rate. If your sampling rate is too low then you will not finish that sample batch before the next set of samples is recorded.
It is possible to use an external clock into a trigger or digital line, however this will limit the number of samples you can take to the speed of your encoder.
If you increase your sampling rates, and then configure a start trigger from a single input from the encoder you will be able to record a number of samples after a rising/falling edge. (Set the clock as an internal clock)
Hope this helps
AdamB
Applications Engineering Team Leader | National Instruments | UK & Ireland

Is the PXIe-PCIe8361 adequate for this system? And external clock questions...

Hi all,
I have spent some time piecing together a system and I'd like a sanity check before pulling the trigger on this purchase. The system will contain the following hardware:
1. Chassis: PXIe-1078
2. Controller: PXIe-PCIe8361
3. 3 x PXIe-6363 (16 analog inputs each card, 32 digital inputs each card, all internally clocked @ 10kHz)
4. 2 x PXI-6224 (32 digital inputs on one, 8 digital inputs on the other, externally clocked in "bursts" of 62.5khz)
5. Labview software
The three PXI-6363 cards will be responsible for a mix of analog and digital measurements made @ 10 kHz, timed continuously by the onboard clock.
One PXI-6224 will be clocked externally @ 62.5 kHz and will be used to collect digital data on a 32-bit port. These clock pulses will not be continuous, but will occur in bursts lasting for 2ms every 20ms.
The other PXI-6224 will be clocked externally @ 62.5kHz as well and will be used to collect digital data on an 8-bit port. These clock pulses will not be continuous, but will occur in bursts lasting for 2 ms at random intervals.
My questions are:
1. Am I planning anything that looks unreasonable for this hardware?
2. Should I expect issues with data transfer rates with the PXIe-PCIe8361? I will be operating well within the advertised 110MB/s throughput of the device. I plan to stream this method... NI Fast TDMS data streaming
3. I have only ever used NI cards for continuous measurements made by an onboard clock. When I set up a task to collect data that is externally-timed, will the DAQ be expecting a "continuous" clock pulse, or will the system wait patiently for clock pulses to arrive at any rate (any rate within the spec of the card, of course)?
Thanks, any input is appreciated.

Hello LucasH0011
1-As long as you put the PXI-6224 and the PXIe-6363 cards in the corresponding slots, meaning the express(PXIe-6363) in the express and the hybrid(PXI-6224) in the hybrid.
2-I think you would not have issues with the transfer rate.
3-Your timing specifications sound reasonable to me, I think you will be fine.
Here is a document that has useful concepts for the use of cards:
http://www.ni.com/white-paper/3615/en/
It is for the M-Series, but the concepts apply to the X-Series as well.
Regards
Ernesto

Is it possible to read digital data using an external clock (PCI-6259 M)?

I’m using a NI PCI-6259 M Series card and trying to write my program in VC++6.0 using the functions in the DAQmx driver.
Question1: Not all functions listed in the NI-DAQmx C Reference Help seems to be supported by my NI-card, where can I find information about which of the functions that are supported?
Question2: I want to read data from a device that clock out data on the falling edge of a clock signal. The clock signal and the data signal are routed to two DIO terminals on the NI-card. The question is if it is possible to read data using the clock as a sample clock? See two code examples below that doesn’t work. In both cases 10 samples are read at once, even if the external clock is not present.
Example 1
// Create tasks
Status = DAQmxCreateTask("", &m_ReadTrimTask);
// Set up read task
status = DAQmxCreateDIChan(m_ReadTrimTask, "Dev1/port2/line0", "", DAQmx_Val_ChanPerLine);
status = DAQmxCfgChangeDetectionTiming(m_ReadTrimTask,"Dev1/port2/line6","Dev1/port2/line6",DAQmx_Val_FiniteSamps, 10);
// Read data
int32 sampsPerChanRead, numBytesPerSamp;
status = DAQmxReadDigitalLines(m_ReadTrimTask, 10, 10.0, DAQmx_Val_GroupByChannel, result, 10, &sampsPerChanRead, &numBytesPerSamp ,NULL);
Example 2
// Create tasks
Status = DAQmxCreateTask("", &m_ReadTrimTask);
// Set up read task
status = DAQmxCreateDIChan(m_ReadTrimTask, "Dev1/port2/line0", "", DAQmx_Val_ChanPerLine);
status = DAQmxSetSampTimingType(m_ReadTrimTask, DAQmx_Val_SampClk);
status = DAQmxSetSampClkRate(m_ReadTrimTask, 1000.0);
status = DAQmxSetSampClkActiveEdge(m_ReadTrimTask, DAQmx_Val_Falling);
status = DAQmxSetSampClkSrc(m_ReadTrimTask, " Dev1/port2/line6");
// Read data
int32 sampsPerChanRead, numBytesPerSamp;
status = DAQmxReadDigitalLines(m_ReadTrimTask, 10, 10.0, DAQmx_Val_GroupByChannel, result, 10, &sampsPerChanRead, &numBytesPerSamp ,NULL);

Hello Magnus,
Thank you for contacting National Instruments.
"Question1: Not all functions listed in the NI-DAQmx C Reference Help seems to be supported by my NI-card, where can I find information about which of the functions that are supported?"
The best place to look for this information would be the M Series Help Manual. There you can find the features of your PCI-6259 and what operations it supports.
"Question2: I want to read data from a device that clock out data on the falling edge of a clock signal. The clock signal and the data signal are routed to two DIO terminals on the NI-card. The question is if it is possible to read data using the clock as a sample clock? See two code examples below that doesn’t work. In both cases 10 samples are read at once, even if the external clock is not present."
Look at the "ContReadDigChan-ExtClk_Fn.c" example project which ships with the NI-DAQ driver. This is located at: C:\Program Files\National Instruments\NI-DAQ\Examples\DAQmx ANSI C\Digital\Read Values\Cont Read Dig Chan-Ext Clk.
You will have to make some minor modifications to convert this to a finite acquisition, but that is simply a matter of changing the "sampleMode" parameter of the DAQmxCfgSampClkTiming() function. You will also have to route your clock signal to a PFI line and specify which line in your code.
I hope this helps.
Sean C.
Applications Engineering
National Instruments

5122 External Clock Questions

I am working on a project that requires the ext. clock (100Ms/s on a
5122) and a signal hand-off. Signal 1 is 32MHz, and Signal 2 is
32MHz +- 100,000Hz. If I am feeding in Signal 1, what is the
minimum and maximum times I have to kill signal 1 and input Signal 2 so
that the card doesn't crash. In other words, the jitter
parameters on the PXI 5122 clock. I cannot find this information
anywhere. If I had to guess, the minimum time would be 1/105MHz =
9.5ns and the max would be 1/30MHz = 33.3ns. The 30MHz and 105MHz
comes from the PXI 5122 data sheet.
Also, if the hand-off were made smoothly withing the jitter
specification times, would the clock crash due to the change in
frequency between the 2 signals?
Thank you for your time,
Austin McElroy

*I have posted the answer on all 3 of the forums that you queried, but please continue the thread here, in the appropriate section:*
Good morning Austin,
Thanks for contacting National Instruments with your issue, we'll try our best to solve it for you as quickly and efficiently as possible.
I'm going to have to contact R&D about this specification. There are some that might get us close, such as the fact that the PLL Reference Frequency has to be accurate to +/-50 ppm (page 14 of (http://digital.ni.com/manuals.nsf/websearch/5D8BAB258130779686256FA800691AAA)) and that the sample clock delay range is 1 sample clock period (Page 13), that I could postulate on, but I'd rather get the definitive answer.
One point of helpful clarification would be whether you're using the external clock for the reference clock or sample-clock timebase.
I will let you know as soon as I hear anything from R&D.
Sincerely,
Minh Tran
Applications Engineering
National Instruments

Single Pulse Width with External Clock

I am trying to setup a 6602 counter for a single (non-buffered) pulse width measurement with an external clock. Under normal testing, the unit under test will provide the pulses, I need to measure the number of pulses during different time periods (1, 60, and 300 seconds). I want to do a pulse width measurement and I'll supply the gate signal pulse to the counter for the specific time needed.
Under normal operation, the unit under test is wired into the counter's source and the pulse is wired into the gate. For testing purposes I am using a BNC-2121. I have the counter's source wired to the Adjustable Square Wave Output and the gate wired to the Trigger output.
Here is my C++ code. I am getting a timeout error on the read and I don't know why. Any help would be appreciated.
   //Create Task
   DAQmxCreateTask( "task1", taskHandle );
   //Create Pulse Width Channel
   DAQmxCreateCIPulseWidthChan( taskHandle,             // TaskHandle
                                                   szCtrName.c_str(),     // Counter Name
                                                   "",                             // Channel Name
                                                  dMin,                          // Min Value
                                                  dMax,                         // Max Value
                                                  DAQmx_Val_Ticks,     // Units
                                                  DAQmx_Val_Rising,    // Gate Edge
                                                  "" );                            // Scale Name
   //Set the Pulse Width Terminal to the gate signal
   DAQmxSetCIPulseWidthTerm( taskHandle,     // TaskHandle
                                                 "",                       // Channel
                                                 "/CTR2/PFI38" ); // Terminal
   //Set the Timebase Src to the counter's source
   DAQmxSetCICtrTimebaseSrc( taskHandle,         // TaskHandle
                                                "",                       // Channel
                                                "/CTR2/PFI39" );   // Terminal
   //Start Task
   DAQmxStartTask( taskHandle );
//***Send pulse to gate counter***
   //Read Counter
   DAQmxReadCounterU32( taskHandle,                      // Task Handle
                                          DAQmx_Val_Auto,           // Num Samps to Read
                                          10,                          // Timeout
                                          ulBuffer,                           // Read Buffer
                                          1000,                               // Buffer Size
                                          &lSampsRead,                 // Num Samps Read
                                          NULL );                            // Reserved

I've setup a pulse width task in NI-MAX using the onboard clock and everything worked fine, so I know the hardware is working.
My unit under test is providing the pulses (from gyros) I need to measure. The pulses indicate the position of the unit so there are X, Y and Z axis gyros. I need to measure these pulses for specific periods of time (1, 60, and 300 seconds). For example during the 1 second measurement, the X and Y gyros should measure zero pulses and the Z axis should measure 515 gyros. During a 300 second measurement the X and Y gyros should measure < 60 and the Z axis should measure 30800.
So the gyro pulses are wired to the counter input and I am using a DIO channel from NI-6508 to provide the gate pulse. The gate signal will be high for either 1, 60, or 300 seconds depending on the test. The gyro pulses are essentially the external clock to the counter. I want to count the gyro pulses during the pulse of the gate (DIO).
To simplify the setup, I connected to BNC-2121 directly to the card. I have the adjustable clock output going to the counter input of ctr0 and the trigger signal going to the gate of ctr0. Once the task has been started and before the read ( I had a breakpoint set in the code), I would press the trigger button on the BNC-2121 and hold for approx. 1 second. I then execute the Read statement, and I always get a timeout. From my experience working with NI, I'm guessing I don't have a channel property set correctly, but its not obvious to me and I can't find an example to do exactly what I'm trying to do.
The CTR2 designation in the code was the object name of the card. I have two 6602 cards in my chassis. I was using ctr0 of the second counter card, so PFI38/39 was correct.
Again, any help would be appreciated.

External clock

Hi,
when Using the Cont Acq&Graph Voltage-Ext Clk.vi i have Rate and Samples to read controls.
Is that means that evry time my external clock rise (for example) the Acq is done by a sorce clock inside the daq card
at the sample rate value is what Rate controller have?

Barak,
When using an external clock, LabVIEW asks for those two parameters as data points for setting up a properly sized data buffer. You should set your rate to the maximum value that you would expect from your external clock. For example, if you're external clock varies from 34Hz to 40kHz you would set it for 40kHz but the acquisition will be done at your external clock frequency. The DAQ board will be using your external clock exclusively and will NOT be using an internal clock. The 'samples to read' will tell LabVIEW how many samples to pull from the buffer each time the DAQmx Read function is called (every while loop iteration). If that many samples are not present, the DAQmx Read will wait until that many samples are present. If you want the function to read all available samples, wire in a '-1.'
Patrick Barrett
PBear
NI RF

Can I acquire waveform at faster sampling rate using external clock?

I am trying to acquire waveform at a sampling rate of 1MHz. My 6036E card is maxed out at 200KHz. Is there a way to achieve a sampling rate of 1MHz using an external sample clock? Your PFI pin can take external clock as an AI sample clock, right?

Hi,
I remember I asked the similar question before in the NI forum, they reply me:
the max sample rate (scan/s/channel) cannot be greater than your board max sample rate, even you use external scan clcok. So the answer is no for your case.

External Clock PCI-6110

Hello / Bonjour
I am using Labview 6.1 / Window 2000 and a NI PCI-6110 card.
The system that I develop uses an external clock (connected to the PFI7) to sample a signal in channel 0, a trigger connected to TRIG 1 starts an acquisition. The program controlling the DAQ is a modified version of “Acquire N Scans ExtScanClk D-Trig.vi” example, I have removed from this example the two sub-vi “AI Clock Config”. The program uses then the STARTSCAN signal as an external clock.
I have three questions:
1 How do you configure STARTSCAN to either the rising or falling edge polarity as it is stipulated in the pci-6110 user manual?
2 What is the purpose of the two sub-vi “AI Clock Config” in the “Acquire
N Scans ExtScanClk D-Trig.vi” as it seems the PCI-6110 card doesn’t need them to run properly with an external clock?
3 Should I configure the CONVERT* signal if I would like to sample the channel 0 signal immediately when a STARTSCAN pulse appears?
Thank you

Thank you rgharrison for your answer
I tried to make some modifications and tests following your comments.
I have incorporated the �AI Clock Config� in my application (which is now very similar to �Acquire N Scans ExtScanClk D-trig.vi� except that there is only one �AI Clock Config� VI) and I have these questions and comments:
As the PCI-6110 samples each channel simultaneously (and I want to sample only one channel), should I set the channel clock as you mentioned?
Given that my external clock is connected to PFI7 and I have specified �PFI pin, high to low� in �clock source code�, it doesn�t matter for the board if I set any PFI as �clock source string�: my board still find an external clock. But if I leave �clock source string� blank I�ve got
an error. I noticed also that the parameters of the �actual clock rate specification� cluster are still equal to zero. Is it normal or I misunderstand something?
I don�t understand why I should set up the �clock source� as fastest as possible, as I want to use an external clock and sampling my signal one time per external clock period. Also, in the �Acquire N Scans ExtScanClk D-trig.vi� exemple, after set the clock as fast as possible, the following VI �Ai Start� disable the internal clock, so again why set up the clock and disable it just after?
If I set the �clock source� at the maximum rate and if the scan clock (my actual external clock) is slower than the �clock source�, can the board acquire more than one sample by external clock period?
Regards

External clocking on 6711 card

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