FPGA Code Generation fails with error codes 7 and -1

Question

Hi all,
I have been having a weird issue with my LV FPGA compilation in the last couple of days, no matter what I try to compile LV fails to generate the FPGA code files and returns with errors 7 and -1 and complains that the file is not found. This happens no matter what I am trying to compile even a VI with just a while loop. I followed the discussion forum here without any luck, also followed the NI article here and that did not help either. The error codes always get generated at the start of the Generating Intermediate files step #7 (out of 7).
Attached to this post is a screenshot of the error I am getting (error -1 just says internal error and to contact NI support), bellow is basically the error I get for error code 7
An internal software error has occurred. Please contact National Instruments technical support at ni.com/support with the following information:
Error 7 occurred at Read from Text File in nirviGetInstantiation_cRIO-IDSel_Timer.vi->nirviGetInstantiation_cRIO-IDSel_Timer.vi.ProxyCaller
Possible reason(s):
LabVIEW: File not found. The file might have been moved or deleted, or the file path might be incorrectly formatted for the operating system. For example, use \ as path separators on Windows, : on Mac OS X, and / on Linux. Verify that the path is correct using the command prompt or file explorer.
=========================
NI-488: Nonexistent GPIB interface.
C:\NIFPGA\compilation\cRioController_8-SlotFPGA_FPGA-TriggerTest_C06156E2\IDSel_Timer.vhd
I tried to do some digging to see what could possibly be happening, and I noticed that LV is looking for the vhdl files in the wrong folder (see the line highlighted in red above), when generating the vhdl files, LV will place them inside the "source_files" folder under the compilation project, but for some reason it is trying to find them under the root folder not inside the source_files folder!!!
Does anyone have any idea why LV would be looking for these files in the wrong subfolder? 
Thank you,
Aws
Attachments:
Code Generation Errors.png ‏35 KB

Answer 1

Hi Aws_Khudhair,
What version of LabVIEW are you using? And what version of the FPGA module? From what I found, it seems as though this is primarily an issue with LabVIEW 8.6 and 8.6.1.
http://digital.ni.com/public.nsf/allkb/A711119FE89E39E78625754E00075E92
This forum also discusses a similar issue:
 http://forums.ni.com/t5/Real-Time-Measurement-and/FPGA-compile-errors-after-generating-intemediate-f...
It may also be worth repairing/reinstalling the FPGA Module and the Xilinx compile tools.
Catherine B.
Applications Engineer
National Instruments