GTX IP core simulation error IS_*_INVERTED

Question

Please see the below -
I've upgraded to vivado 2015.1 and GTwizard core v 3.5
and still get the below error when using _funcsim.v or .vhd , only work around is to use the verilog and comment stuff out...
http://forums.xilinx.com/t5/Simulation-and-Verification/1000BASE-X-PCS-PMA-or-SGMII-v14-2-funcsim-won-t-simulated-IS/m-p/589975#M12690
 Loading unisims_ver.GTXE2_CHANNEL
# ** Error: (vsim-3584) ..xxxxxx/gtwizard_gtx_sfp_funcsim.v(958): Module parameter 'IS_CPLLLOCKDETCLK_INVERTED' not found for override.
... and many others like this for each IS_**_INVERTED term in the funcsim file......

Answer 1

fyi - if attempting to simulate without the funcsim but compile source code directly I get similar error which I don't have a work around for:
# Loading work.gtwizard_gtx_sfp_multi_gt(rtl)
# Refreshing ...../sim/work.gtwizard_gtx_sfp_gt(rtl)
# Loading work.gtwizard_gtx_sfp_gt(rtl)
# Loading unisim.gtxe2_channel(gtxe2_channel_v)
# ** Error: (vsim-3733) ../ip/gtwizard_gtx_sfp/gtwizard_gtx_sfp_gt.vhd(821): No default binding for component instance 'gtxe2_i'.
#    The following component generics are not on the entity:
#           IS_TXUSRCLK_INVERTED
#           IS_TXUSRCLK2_INVERTED
#           IS_TXPHDLYTSTCLK_INVERTED
#           IS_RXUSRCLK_INVERTED
#           IS_RXUSRCLK2_INVERTED
#           IS_GTGREFCLK_INVERTED
#           IS_DRPCLK_INVERTED
#           IS_CPLLLOCKDETCLK_INVERTED
#         Region: /tb_rlp_transition/dut/gtwizard_gtx_sfp_i/U0/gtwizard_gtx_sfp_i/gt0_gtwizard_gtx_sfp_i/gtxe2_i
# Loading secureip.GTXE2_CHANNEL_WRAP
# Refreshing ............../sim/work.gtwizard_gtx_sfp_cpll_railing(rtl)
# Loading work.gtwizard_gtx_sfp_cpll_railing(rtl)
thanks!