How do I output a finite pulse train through multiple counters?

Hello,
I have used LabView examples to create a VI to use with my TIO 6602 that generates a finite pulse train with varying duty cycle, frequency, number of pulse, and initial delay.  I can also have it output the pulses through multiple counter channels, but all the channels have the same delay, and are output at the same time.  I need each channel to have a specific delay from the first one.
In my VI, I use DAQmx to create a retriggerable finite pulse train by gating a counter with another counter.  I have all the neccessary controls over the pulse train, but I can not seem to find an easy way to just copy this waveform and output delayed versions of it to other channels.  The delay is very important because these signals will be used to drive ultrasound transducers in a linear array, and for the waveforms to focus at one point, the signal driving the transducers with a shorter distance from the focal point need a larger delay, so that the same waveform arrives from each transducer at the same time.
Any help with how I might do this would be much appreciated.
Thanks!

Hey Sneaky,
Here's a screenshot of the code I put together on how to use multiple counters.  Also, take a look here for more information on how to sync multiple counters. 
Message Edited by Knights Who Say NI on 02-02-2009 10:36 AM
Message Edited by Knights Who Say NI on 02-02-2009 10:36 AM
Message Edited by Knights Who Say NI on 02-02-2009 10:38 AM
-John Sullivan
Analog Engineer
Attachments:
4xcount.jpg ‏67 KB

Similar Messages

  • How do I generate two finite pulse trains using counters on PXI-6251

    I'm trying to use Counter 0 and Counter 1 on the PXI-6251 to generate two finite pulse trains.  But, I get this error:   "The specified resource is reserved. The operation could not be completed as specified."  See attached example.
    Inside the disabled box is what I'd like to run on both counters.  I stripped things down to creating the task, starting, and stopping.  I then started to add things to see what my problem was.  The timing VI seems to be what causes me issues but I don't know why. 
    My end objective is two identical pulse trains with one delayed by 5us, which I figured would be easy to do in the initial delay.  I tried both in a single task and as separate tasks with no avail.
    Attachments:
    2_counter_outputs.vi ‏32 KB

    Hi SirMutt,
    Creating a finite pulse train requires
    two counters. What’s really happening is that one counter is creating a
    continuous pulse train while the other counter applies a finite pulse to “window”
    the pulse.
    What you want to do is correlated DIO. I’ve
    done a search on our website for “correlated DIO” and have come up with a few
    resources. Hopefully that will help you get started.
    Digital Output and Pulse Generation
    Performing Correlated Digital IO with an M Series Device in LabVIEW
    M Series Hardware-Time DIO with Counter Clock Generation
    Mark E.
    Precision DC Product Support Engineer
    National Instruments
    Digital Multimeters (DMMs) and LCR Meters
    Programmable Power Supplies and Source Measure Units

  • How do you create a finite pulse train using a FP-CTR-502?

    I have recently replaced my FP-PG-522 module with a FP-CTR-502 module, to achieve higher output frequencies (FP-PG-522 max output freq is 5kHz, wheras the FP-CTR-502 max output freq is 16 kHz).
    I need to be able to generate a finite pulse train. Has anybody created a finite pulse train using a FP-CTR-502 module before? I have started to look into it, but my ideas so far have been complicated (compared to doing it in a PG module).
    Any tips on this would be much appreciated.
    Christopher Farmer
    Certified LabVIEW Architect
    Certified TestStand Developer
    http://wiredinsoftware.com.au
    Solved!
    Go to Solution.

    I can answer this question myself!
    The answer is in the *OLD* version (July 2000) of the operator's manual for the FP-CTR-502. For some reason, this has been removed from the latest version (June 2003).
    See page 11 of this link for more information:
    http://www.ni.com/pdf/manuals/322660a.pdf
    Christopher Farmer
    Certified LabVIEW Architect
    Certified TestStand Developer
    http://wiredinsoftware.com.au

  • Inverting and outputing a finite pulse train

    I am using a PCI-6602 card and labview to generate 4 digital finite pulse trains (2MHz to 6MHz range) to be sent to a amplifiing circuit that will drive transducers.  I have a VI based on a finite pulse train sample VI I found, but the driver requires both the signal, and the inverted version of the signal.  I tired using XOR gates to do this before, but because of rise and fall times, the signals end up overlapping a slight bit, which causes a short between +V and -V supplied to the amplifier.  Is there a easy way to have Labview invert my signals while having no overlap?  I have access to another PCI-6602 if needed.
     I tagged a jpeg of what my VI looks like at the bottom.  Any help in this matter would be much appreciated.
     Thanks
    Attachments:
    4xcount.jpg ‏67 KB

    You could write out the same signals to the 4 more lines and invert the logic on those lines using a channel property node»digital output»invert lines.
    Doug Farrell
    Product Manager - Condition Monitoring
    National Instruments
    National Instruments Condition Monitoring

  • How do program 3 independent finite pulse train generators from 3 counter pairs

    I need to drive a 3-axis piezo leadscrew friction type motor by finite train of pulses from a PCI-6602.How do I specify the counter pairs in my code with out any one counter conflicting with the others?
    Bernardino Jerez Buenaobra
    Senior Test and Systems Development Engineer
    Test and Systems Development Group
    Integrated Microelectronics Inc.- Philippines
    Telephone:+632772-4941-43
    Fax/Data: +632772-4944
    URL: http://www.imiphil.com/our_location.html
    email: [email protected]

    This scheme (and the examples) works fine when you want finite generation done in sequence, but seems not to work with when they are done independently and in synchronously run in parallel fashion.
    Berns B.
    Bernardino Jerez Buenaobra
    Senior Test and Systems Development Engineer
    Test and Systems Development Group
    Integrated Microelectronics Inc.- Philippines
    Telephone:+632772-4941-43
    Fax/Data: +632772-4944
    URL: http://www.imiphil.com/our_location.html
    email: [email protected]
    Attachments:
    Mutliaxis_test_drive_version_0.vi ‏85 KB
    NF8096Exercise.vi ‏206 KB

  • How to change the frequency of a finite pulse train?

    Hi all? I Know I’ve asked once a similar question, but I need a better answer. I would like some ideas or examples on how to modify the example in LV; "Finite Pulse Train Generation - Intermediate for AM9513-Based Devices",so that the frequency can be changed while the VI is executing.
    Will i have any problem with I use this VI in a DAQ-STC-Based Devices(E-series)?

    Tiano,
    I will try to better explain the paragraph on LabVIEW. The original paragraph reads ...
    "While in a loop for continuous pulse train generation, make two calls to Counter Set Attribute.vi to set the values for "pulse spec 1" (constant 14) and "pulse spec 2" (constant 15). Following these calls you would make a call to Counter Control.vi with the control code set to "switch cycle" (constant 7). The attached LabVIEW programs demonstrate this flow."
    You can make two calls to Counter Set Attribute or you can make a call to Set Pulse Specs which, if you open this VI, you will see that it is just making two calls to Counter Set Attribute. What you are doing with the Counter Set Attribute VIs is setting two registers called "pulse s
    pec 1" and "pulse spec 2". These two registers are used to configure the frequency and duty cycle of your output frequency.
    The example program which is attached to this Knowledge Base demonstrates how to change the frequency of a continuous generation on the fly. Why continuous? Because changing the frequency of a finite train would be easy. When the train completes it's finite generation you would just change the frequency and run a finite train again. You would not care about the time delay due to reconfiguration of the counter.
    If you would like to change the frequency of the pulse train using a knob, this functionality will have to be added in the while loop. The while loop will be continuously checking for the new value of the knob and using the knob value to set the pulse specs.
    LabVIEW is a language, and as with learning all new languages (spoken or programatic) there is a lot of learning to be accomplished. The great thing is that LabVIEW is much easier than mo
    st languages and the learning curve should be much smaller. Don't fret, you'll be an expert before you know it. Especially since you're tackling a challenging first project.
    Regards,
    Justin Britten

  • Finite pulse train Output

    Hi,
    I am using a 6602 board and would like to generate a finite pulse train. I have used the example code from Labview (Finite Pulse Train NT-IO) and cannot see both outputs.
    I mean I can see the enveloppe on counter +1 (gating counter +0) but cannot see the finite pulse train on Counter +0.
    Thanks
    W.

    Hi
    Could you just post you LabVIEW code please
    Thanks
    Nick

  • Finite pulse train generation​... how to count number of pulses?

    hi guys,
    this has probably been solved a hundred times but i just couldnt find it!!
    i have a pulse train generation happening on my ni usb-6211... using FREQ OUT, using a divisor on this, and routing it to PFI4.
    id like to update my VI so i can specify the number of pulses....
    im pretty much a noob at this stuff so any help would be greatly appreciated!! thanks!
    dan
    Attachments:
    pulse train generation.vi ‏25 KB

    Hi,
    No problem at all, we are here to help. What I’m going to do first is to point you to a bunch of examples for that might give you a better insight of the capabilities of the card in terms of finite pulse generation. What you should be looking at is called retriggerable pulse generation and here are some examples to look at: Retriggerable Finite Pause Trigger Digital Pulse Train Generation, Creating a Delayed, Retriggerable and Finite Pulse Generator, DAQmx - Retriggerable Pulse Train Generation - LabVIEW - CVI - ANSI C - VB.NET - C#.NET and Retriggerable Finite Pulse Train with Changing Pulse Specs.
    Let me know it helps
    Jaime Hoffiz
    National Instruments
    Product Expert
    Digital Multimeters and LCR Meters

  • How to change the frequency of pulse train on the fly using an array of values?

    Hi all!
    First I want to thank U for the great job you are doing for this forum.
    Iam still busy trying to control a stepper motor, by sending pulses from my E-series 6024 to a compumotor s6- stepper Driver. I've managed to get it working. I desperately need to control the motor using the values from an array. I believe we can use two approaches for that:
    1st - I can get an array of the "numbers of pulses". Each element must run for 10 milliseconds. Using that we can calculate the array of frequencies to send the number of pulses within 10 milliseconds for each specific element. Could we use the arrays of "number of pulses" and frequencies in a "finite pulse train " and up
    date with each element every 10 millisecond?
    2nd - Or Could we use of the frequency array in a "continuous pulse train vi" and update it every 10 milliseconds?
    Please note that I must use the values as they are.
    Can someone please built a good example for me? Your help will be appreciated.
    Regards
    Chris
    Attachments:
    number_of_steps.txt ‏17 KB
    frequency.txt ‏15 KB

    Tiano,
    I will try to better explain the paragraph on LabVIEW. The original paragraph reads ...
    "While in a loop for continuous pulse train generation, make two calls to Counter Set Attribute.vi to set the values for "pulse spec 1" (constant 14) and "pulse spec 2" (constant 15). Following these calls you would make a call to Counter Control.vi with the control code set to "switch cycle" (constant 7). The attached LabVIEW programs demonstrate this flow."
    You can make two calls to Counter Set Attribute or you can make a call to Set Pulse Specs which, if you open this VI, you will see that it is just making two calls to Counter Set Attribute. What you are doing with the Counter Set Attribute VIs is setting two registers called "pulse s
    pec 1" and "pulse spec 2". These two registers are used to configure the frequency and duty cycle of your output frequency.
    The example program which is attached to this Knowledge Base demonstrates how to change the frequency of a continuous generation on the fly. Why continuous? Because changing the frequency of a finite train would be easy. When the train completes it's finite generation you would just change the frequency and run a finite train again. You would not care about the time delay due to reconfiguration of the counter.
    If you would like to change the frequency of the pulse train using a knob, this functionality will have to be added in the while loop. The while loop will be continuously checking for the new value of the knob and using the knob value to set the pulse specs.
    LabVIEW is a language, and as with learning all new languages (spoken or programatic) there is a lot of learning to be accomplished. The great thing is that LabVIEW is much easier than mo
    st languages and the learning curve should be much smaller. Don't fret, you'll be an expert before you know it. Especially since you're tackling a challenging first project.
    Regards,
    Justin Britten

  • What sets no.of pulses in 'finite pulse train' intermediate vi

    I want to know how the 'finite pulse train' intermediate vi works. from the VI info I find that counter n generates a continuous clock pulse and is gated by a gating signal coming from counetr n-1. but when I actually run this vi, I find that the counter 2 does not generate a continuous clock pulse and the gating signal is also not used at all for this vi.
    I also find that the 'no. of pulses' input does not linearly correspond to the no. of pulses but to the speed of the motor as well. ( I am using the counter to generate a clock train that is used to drive a motor). Nevertheless, when I measure the freq from the output of the counter n , I still find it be to the same as the clock freq that I input thro
    ugh my program (and hence independant of step pulses). This is surprising because the speed of the motor changes at constant freq clock trian from counter n.
    can anyone tell me whats going on here ?
    thanks very much,
    Lalitha.

    Hello Filipe,
    well, here's what I find when I run the vi. I am using a PC-TIO-10 board- so I have given the signals with ref to the pin outputs of this board as well.
    I do not get a continuous clock pulse at the output of counter 'n' when I run the program with the gate of counter 'n' tied high all the time.
    for instance, I tied gate 2 (pin 5) to high all the time and ran the program. I would have expected a continuous clock pulse to be generated at out 2 (pin 6 ). but only a finite clock pulse whose freq corresponded to the input clock freq was output at OUT 2.
    then I tied gate 2 to low and repeated the run- again a finite clock pulse was obtained at OUT 2. It behaved as if the gating signal at gate 2 did not matter at all. All this was while
    keeping the gate mode at 'count while high' and the pulse polarity at high (default values).
    finally, I also wired out 1 (3) to gate 2 (5) and ran the vi. this is exactly the way the I/O connections should be made as per the vi info. but there was no output at OUT 2 (6) even though the gating signal was observed at OUT 1 and therfore tied to gate 2.
    thus my VI is not generating a continous clock pulse at the counter 'n' OUT pin - I always get only a finite clock train and this is regardless of whether the gate of the counter 'n' is tied to high/ low/ OUT of previous counter.
    why does this happen ?
    thank you
    Lalitha.

  • Learn the number of pulses created in a finite pulse train

    Hello
    I am using the PCI-6602 Board to produce a finite number of pulses with counter0.
    I want to know how many pulses that are already created by the counter, while my program is running and show this number on an indicator on the front panel of my VI.
    What is the best way to do this with LabVIEW?
    Of course I can use another counter to count the pules and route the output of counter0 to its input.
    However I wonder if it is possible to solve the problem without using another counter, because DAQmx internally already uses a second counter to produce the finite pulse train so it should be possible to read this counter, isn't it?
    Thanks for every help.

    However, I wonder where I can get such detailed Information about the internal functionallity of the DAQ-devices and the DAQmx driver?  Please let me know where you get this information from. (So that I can avoid using this forum in the future)
    Speaking just for myself --- the source has been generally the school of hard knocks. I started doing a lot of special timer/counter work right around the Y2K timeframe. The legacy driver now known as traditional NI-DAQ was then the only game in town.   The programming and terminology under trad. NI-DAQ tends to require you to understand the hardware at a lower level.  The programming used more counter-specific terminology like Gate and Source signals.
    So for a lot of this stuff, I came into DAQmx with a good understanding of the low-level hardware capabilities, and I just needed to tromp around a bit to find the right syntax.  Consequently, I'm not much help for pointing you toward info sources as I haven't relied on them much.  Meanwhile, good luck with the self-teaching but don't feel compelled to "avoid using this forum in the future."
    -Kevin P.
    Message Edited by Kevin Price on 11-01-2007 10:04 AM

  • Finite pulse train, stop and count

    Hi, i'm using Labview 8.2 with a DaqCard-6063E on Windows Vista. I generate a finite pulse train with a possibility to stop when ever I want, but how do I do to count the number of pulses?
    (The application going to drive a stepper motor forward/backward so I need the number of pulses)
    /Pelle

    I think you probably mean the 6036e, right?  I've got 2 basic ideas for you:
    1. Always generate continuous pulses and always count on using your software to decide when to stop.  This is *probably* not the solution you want, but it would make life simpler if you can live with it.  The reason is that continuous pulse trains only require 1 counter so you can just count those pulses with the 2nd counter.  Finite pulsetrains use up both counters.   I suspect you need the finite pulsetrain though to define a nominal exact distance, but in case your software decides you must stop prematurely, you'd like to know where you are.
    2. Configure an AI task or an AO task that uses your counter output as its sampling clock.  Then you can query the AI/AO task for a property like "Total Samples Acquired" or "...Generated" to get your step count.   You would do the query with a DAQmx property node -- either a Read or Write property node if I recall correctly (not presently near LV to check).   Note also that you should start your AI or AO task before starting the Counter task, and if you stop the counter task, do your query before stopping the AI / AO.
    -Kevin P.

  • Delayed retriggera​ble finite pulse train

    Hi there,
    I'm trying to create a delayed retriggerable finite pulse train on a USB-6251 (2 counters). I just read an old thread on this problem and I got it to work.
    However, I'm having this one small annoying issue:
    I want to send a finite pulse train (3 pulses) at 1Hz
    The trigger has a period of 3seconds (0.333333Hz)
    My initial delay is 0.1s
    This results in the following :
    first 3 seconds : perfect 0.1s delay, 3 pulses at 1Hz
    second 3 sec   : nothing
    third 3 sec        : perfect 0.1s delay, 3 pulses at 1Hz
    and so on
    I reckon this is because the counter that is gating the continuous pulses is not finished yet with his pulse and therefore does not "see" the new rising edge of the trigger.
    Is there a way I could solve this?
    I know I could just use the first trigger and send 150 pulses or so at 1Hz. That's what I would do if I was very confident in the accuracy of the 3s period of the trigger, but I'm not. And since it is very important the timing is accurate after that trigger, I think I will induce to much error in the timing that way.
    Any ideas?
    Cheers,
    Tom

    Sorry for boosting this thread, but I just noticed something in the program Alan suggested : Delayed_Retriggerable_Finite_Pulse_Train.vi while checking its output on a scope:
    If you set an initial delay, the pulse train actually starts after 2 times that delay time after the initial trigger. I can't seem to find where this factor 2 is coming from.

  • Retriggerable finite pulse train

    I have a problem using a retriggerable finite pulse train as in the NI example Retriggerable_Finite_Pulse_Train. I use ACTOUT to gate the first re-triggerable pulse control and the second pulse control generates the continueous pulse train which is gated by the first retriggerable pulse control. The ACTOUT signal is generated by an AI control which senses a crank trigger (Hall Sensor). The re-triggerable pulse train is used to modulate a fuel injector in sync with ignition timing and RPM.  If the period of the ACTOUT signal changes due to a change in RPM, the pulse train is recalculated. It works OK with one hitch. Even at constant RPM, after about 15 re-triggerer pulse trains the final pulse of the train does not complete. This leaves the signal high in-between successive re-triggerer pulse trains. This incorrect high signal between re-triggerer pulse trains means that the fuel injector is incorrectly left on between pulse trains, when it should be turned off. This incorrect high signal goes on for about 10 pulse train events and then returns to normal. I use the ActualPeriod of the first re-triggerable pulse to ensure the pulse train ends correctly within window of the first re-triggerable pulse, but it seem to wander. Is there another way to create a different type of re-triggerable pulse train that overcomes this problem. I may have to use a single re-triggerable pulse instead of a re-triggerable pulse train as this work correctly every time. However, multiple pulses creates a finer mist from a fuel injector and is the correct why to modulate a fuel injector. The

    CORRECTION TO PREVIOUS POSTING THERE WAS AN ERROR IN HOW I DESCRIBED THE PROBLEM:
    I have a problem using a retriggerable finite pulse train as in the NI example Retriggerable_Finite_Pulse_Train. I use ACTOUT to gate the first re-triggerable pulse control and the second pulse control generates the continuous pulse train which is gated by the first retriggerable pulse control. The ACTOUT signal is generated by an AI control which senses a crank trigger (Hall Sensor). The re-triggerable pulse train is used to modulate a fuel injector in sync with ignition timing and RPM.  If the period of the ACTOUT signal changes due to a change in RPM, the pulse train is recalculated. It works OK with one hitch. Even at constant RPM, after about 15 re-triggerer pulse trains the final pulse of the train does not complete. This leaves the signal high in-between successive re-triggerer pulse trains. This incorrect high signal between re-triggerer pulse trains means that the fuel injector is incorrectly left on in-between pulse trains. This incorrect high signal goes on for about 10 pulse train events and then returns to normal. This pattern repeats. I use the ActualPeriod of the second control's continuous pulse train to ensure the pulse train ends correctly within window of the first re-triggerable pulse. This work but with time this pulse train seem to shift slightly. Is there another way to create a different type of re-triggerable pulse train that overcomes this problem?

  • Finite pulse train with variable pulse widths

    Greetings LabVIEW developers,
    Does anyone have code that can show me how to use E-series counters to generate a finite pulse train where the individual pulse widths vary? I need to generate a series of 20 pulses with the high time for each pulse randomly varying between 50 and 1000 microseconds. The low time for each pulse needs to be constant (around 50 microseconds).
    Thanks,
    Ryan Wright

    Ryan,
    Sorry, but this isn't possible with the counter/timers. I've been wanting this capability myself for about 6 years now.
    Personally, I think it's an unfortunate "hole" in product capability. The other major data acq hw allows you to capture and later replicate a signal of interest. You can capture an analog waveform with AI and later play it back with AO. You can capture a digital pattern and later play it back with timed DIO. You can capture buffered semi-periods with a counter -- but you can't play play them back later. So for your app, you'll need to generate the variable freq using timed DIO. The new M-series boards ought to work for this, or a dedicated high-speed digital board.
    There's another product that I think is even better for timed DIO though and it's put out by one of NI's "Alliance partners" -- Viewpoint systems. Here's an example of why I like it. Let's say you need to generate 20 pulses within 60 seconds. The times of the pulses need to be precise to within 1 usec, and they have no common divisors. The NI method will require you to use an update rate of 1 MHz and you'll create a buffer of 60 MB to represent the digital pattern at every usec. The Viewpoint method needs a buffer of 40 entries. Each entry is a combination of a timestamp and a pattern to generate at that timestamp. That pattern will just stay there until the next defined timestamp. So all you do is define the digital pattern at the instants when one or more bits will change. It works analogously for digital input - if you capture with 1 usec resolution for 1 minute but there are only 20 pulses (40 digital transitions), you only capture the 40 relevant timestamps & patterns instead of a full 60 MB.
    If interested, look for the PCI-DIO64 at Viewpoint's website.
    -Kevin P.

Maybe you are looking for

  • Problem with creating 12.1.1 installation staging

    I have the virtualization setup using VirtualBox 4.1.6: Host: windows 7 64bit; Guest: OL5.7 x86 64bit(oracle linux) I have the virtual CD-Rom setup for the linux guest. I can eject the CD from the linux guest. The DVDs will be used for the installati

  • Previewing clips in Events pane do not play correctly in Preview Pane

    Overall I like iMovie '08 very much, but I have one issue that it really annoying. Basically all of my footage was shot with Casio or Fuji digicams and lives in my iPhoto library. When iMovie imported these clips to the events pane, it looked as if a

  • ITunes Freezes on Windows XP Pro

    My iTunes application freezes after I import music. I tried to uninstall and re-install (Including clean up of all preference files etc.) no change. After it freezes I have to "End Application" at that point iTunes goes away and I loose Internet conn

  • In-App Purchases: Freemium model. How to do in DPS?

    I have a multi folio (ipad/iphone) "recipe" app in iTunes priced at .99 - a price which still seems to be a big leap for getting a consistent number of downloads/installs. Most other recipe apps in the app store that I download are of the "freemium"

  • Passing values in Subreport

    Hi, In GH1: i have one subreport In GH2: i have two or three subreport My question is, i have to pass the GH2 sureport values to GH1 Report Header. can any one explain?