How to design block diagram for axi tpg and axi vdma on zedboard using vivado 2014.4 and sdk c application

Hi,
I am working in image processing project ,but currently i want to use tpg ip and vdma ip to write frame data in ddr3 on zedboard,please provide me vivado block design and sdk c application for that
 

Please don't post the same thing multiple times. This one is fine:
http://forums.xilinx.com/t5/New-Users-Forum/how-use-axi-tpg-and-axi-vdma/m-p/638588

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