How to lock sample frequency for 5673 and 5663

Hello,
In general I'm trying to lock transmitter and receiver together.  It seems easy to lock the carrier frequency, however no matter what I do, I seem to have a drift in my sampling frequency (on the order of 1ppm). 
Is the sampling clock in the 5663 digitizer tied to the same clock reference as the LO?  ... I didn't think I would need the TClk mechanism here since I don't care about delay ... 
Any thoughts are greatly apreciated.  Below are a few specifics. 
I'm using the 5673 as transitter and 5663 as receiver.  I've noticed the folowing:
1. When each are using a 'Reference Clock Source' = OnboardClock I have a noticeable carrier offset at the receiver (eg 5.8 GHz carrier has  ~7 KHz offset) and this is fine. 
2. When each are using a 'Reference Clock Source' = PXI Clock, with the chassis physically tied, I see no noticeable carrier offset at the receiver. 
3. When 5673 is using 'Reference Clock Source' = OnboardClock, 5663 using 'Reference Clock Source' = ClkIn (ClkIn/Out physically tied), I see no noticeable carrier offset at the receiver. 

Not sure if this is the proper forum.  I created a post in the 'NI Support' area and LabVIEW is were it got placed.  ... arg ...
I'm going to try and move this to a more apropriate forum:  ... 'High Speed Digitizers' I guess.

Similar Messages

  • How to lock sampling frequency for 5673 and 5663

    Hello,
    In general I'm trying to lock transmitter and receiver together.  It seems easy to lock the carrier frequency, however no matter what I do, I seem to have a drift in my sampling frequency (on the order of 1ppm).
    Is the sampling clock in the 5663 digitizer tied to the same clock reference as the LO?  ... I didn't think I would need the TClk mechanism here since I don't care about delay ...
    Any thoughts are greatly apreciated.  Below are a few specifics.
    I'm using the 5673 as transitter and 5663 as receiver.  I've noticed the folowing:
    1. When each are using a 'Reference Clock Source' = OnboardClock I have a noticeable carrier offset at the receiver (eg 5.8 GHz carrier has  ~7 KHz offset) and this is fine.
    2. When each are using a 'Reference Clock Source' = PXI Clock, with the chassis physically tied, I see no noticeable carrier offset at the receiver.
    3. When 5673 is using 'Reference Clock Source' = OnboardClock, 5663 using 'Reference Clock Source' = ClkIn (ClkIn/Out physically tied), I see no noticeable carrier offset at the receiver.
    Solved!
    Go to Solution.

    Hi Clayton, 
    The digitizer sample clock time base source is different from the Reference Clock source. I've copied  a description below of the difference between the two from the digitizers help. 
    Clocking:Reference (Input) Clock Source:
    Specifies the input source for the PLL reference clock.
    Clocking: Sample Clock Timebase Source:
    Specifies the source of the sample clock timebase, which is the timebase used to control waveform sampling.
    Yes, the default configuration of the NI 5663 is for the NI 5652 to export its internal 10 MHz reference to the NI 5622 so that the NI 5622 and the NI 5652 devices are frequency-locked. The NI 5663 can also be configured to lock to an external (10MHz only) reference source. The NI 5663 can also be configured to lock to the PXI 10 MHz backplane clock. Locking to the PXI 10 MHz reference does not require a cable, but this configuration does not provide the same frequency and phase noise performance as the NI 5652 internal Reference clock. All of this information is provided in detail in the NI RF VSA Help. See the directory below:
    Regards,
    Travis Ann
    Customer Education Product Marketing Manager
    National Instruments

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