IBIS model for Kintex config pins

Question

Hi,
we still have problems with IBIS generation regarding the voltage level of bank0 and configuration pins of bank14 and bank15 for Kintex (xc7k325tffg900-2).
On our board these banks are used with 1V8 I/O voltage, but the default voltage in the IBIS is 2V5.
How can I constrain the configuration pins in UCF using Planahead 14.5 ??
The pins are not used in our VHDL design!
What I have already: CONFIG CONFIG_MODE = BPI16;
Thanks and best regards!

Answer 1

From implementation project you only can generate IBIS model as per your device part and design. You need to use that IBIS model to do Signal Integrity (SI) simulations in separate SI tools (Ex: http://www.mentor.com/pcb/hyperlynx )
During IBIS SI simulations you need to choose corresponding IO standard from IBIS model. For example if you choose LVCMOS18 then it will perform simulations as per - LVCMOS1.8V device model.
There is power supply selection option is there in SI tools (Ex: Mentor Graphics), you can use that for passive components and other terminations.
Please visit the below links for more information about SI information
http://www.xilinx.com/products/technology/signal-integrity.html
http://www.xilinx.com/support/documentation/white_papers/wp323.pdf
You can find many tutorials about IBIS simulations by google search or corresponding SI tools vendor’s web sites