Ideal adc

Hi all,
I'm trying to find some ideal ADC to run the simulation. I want to add jitter to the sample signal. However, the analog to digital.vi cannot use sample signal. It's helpful to tell me what should I do.
Best Regards,
Laffer

Duplicate and wrong board.
http://forums.ni.com/t5/Circuit-Design-Suite-Multisim/Ideal-ADC/m-p/2769232

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ADC DDR source synchronous timing constraints help

Hi all,
I am using a virtex 5 xc5fx200T-1ff1738 with ISE 12.4 to capture data from an ADC (KAD5512p-50 http://www.intersil.com/content/dam/Intersil/documents/kad5/kad5512p-50.pdf).
I calculate my timing constraints as follows:
TIMEGRP "ADC_1_DP_TIM_GRP" OFFSET = IN 1.713ns VALID 1.487ns BEFORE ADC_1_CLK_P_IN RISING;
TIMEGRP "ADC_1_DP_TIM_GRP" OFFSET = IN 1.823ns VALID 1.629ns BEFORE ADC_1_CLK_P_IN FALLING;
ADC clock period (DDR) = 2ns
ADC clk->q rising max = 0.120ns
ADC clk->q rising min = -0.260ns
ADC clk->q falling max = 0.230ns
ADC clk->q falling min = -0.160ns
The board latency of the ADC clock to the FPGA is 0.424ns.
Each ADC data pin is trace matched between N and P, but sadly not between each bit.
Bit     Delay           Clk->Data delay (0.424ns - data delay)
0        0.481ns       0.057ns
1        0.480ns       0.056ns
2        0.481ns     0.057ns
3        0.479ns     0.055ns
4        0.481ns       0.057ns
5        0.390ns      -0.034ns
6        0.480ns       0.056ns
7        0.479ns       0.055ns
8        0.430ns       0.006ns
9        0.473ns       0.049ns
10    0.481ns       0.057ns
11      0.480ns        0.056ns
Delta of the minimum and maximum clk->data board latency = ( 0.057ns - -0.034ns ) = 0.023ns    (Right?)
From this I calculate:
Rising edge offset by:
ADC clock period - clk->q falling max - max board clk->q delay
    = 2ns - 0.230ns - 0.057ns = 1.713ns
Rising edge valid time:
ADC clock period - clk->q falling max - clk->q rising min - ( Delta of the minimum and maximum clk->data board latency )
    = 2ns - 0.230ns - 0.260ns - 0.023ns = 1.487ns
Falling edge offset by:
ADC clock period - clk->q rising max - max board clk->q delay
    = 2ns - 0.120ns - 0.057ns = 1.823ns
Falling edge valid time:
ADC clock period - clk->q rising max - clk->q falling min - ( Delta of the minimum and maximum clk->data board latency )
    = 2ns - 0.120ns - 0.160ns - 0.023ns = 1.629ns
The FPGA needs a window of 1.77ns( 1.55ns setup time + 0.16ns hold time according to the data sheet DS202 v.5.4 table 93, Tpsdcm0/Tphdcm0), which I obviously do not have given these constraints. Am I calculating this wrong?
I want to use the phase shift of the DCM to move to the clock to the "data eye." Are my constraints caluclated properly?

I haven't analyzed your numbers carefully, but at first glance, this looks more or less correct. There appears to be a simple math error in calculating your data skew : (0.057ns - -0.034ns ) = 0.023ns ; it looks like you added the negative number instead of subtracting it (which makes things worse).
Thus your overall window is small - probably around 1.419ns (correcting for your error above). This is too small to capture with global clock capture using the DCM (yes, you are interpreting Tpsdcm_0/Tphdcm_0 correctly)
The only option for static capture is to use ChipSync; bring the clock in on a CCIO and use a BUFIO to capture the data. Done this way your timing is Tpscs/Tphcs, which requires a data window of only 1.370ns (leaving a whopping 49ps of margin). Of course, this is best case - if you have duty cycle errors or other board/signal integrity issues, it will come out of this margin.
There are a few things that make this better. The Tpscs/Tphcs is measured with LVCMOS25 - using LVDS will probably make it better, but we can't really quantify how much.
Also, the board delay is mostly PVT independent - you could compensate for the static error using the IDELAY. In particular you could add one tap of delay to to data bit 5, which will add approximately 78ps to that one bit - bringing it more in line with the rest. Your overall skew would the be 57-6 = 49ps, instead of 57--34 = 91ps.
To center the data eye, you would put IDELAYs on both the clock and the data. Keep the data delays as small as possible (ideally 0 on all bits except bit 5 which is 1), and then delay the IDELAY on the clock to make the data window work. You may need to adjust your OFFSET IN constraints to match the fact that you are pushing the clock forward (subtract 2ns from the OFFSET IN to indicate that the data window comes after the clock edge, not before) - thus your commands will be of the format
TIMEGRP "ADC_1_DP_TIM_GRP" OFFSET = IN <x> ns VALID <y>ns BEFORE ADC_1_CLK_P_IN RISING;
Where <x> will be a small negative number - on the order of 1.172-2.000.
However, this will all only work if the clock is on a CC pair, not a GC pair (on Virtex-5 these were different), and that all LVDS pairs are in the same I/O bank as the clock pair. If your board is already designed, then you probably can't change this.
If you can't use chip-sync (and even at that, timing is really tight), then you will have to use some sort of dynamic calibration.
Avrum

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Greetings folks,
I have an Apple DVI to ADC adapter going to a Formac 17" ADC display or alternatively an Apple 17" LCD ADC display. The displays do not function with either my MacBook Pro or my MacBook. I can't figure out which the Macs are having a problem with, the displays or the adapter. It all works fine with my PowerBook G4 and both of my PowerMac G4's. Also, regular DVI and VGA displays work fine with the MacBook Pro and the MacBook.
I have talked with tech support and they have not been able to find a solution. I will bring the adapter to my Apple store to see if they can determine the problem.

Okay, here's an update: the DVI to ADC adapter does work with the Apple displays that I have tried, but it won't work with the Formac. I have tried multiple time to contact them, but to no avail... they don't even respond to threats of posting my opinion of them, which is this:
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I just received the masters for a new SD DVD. I would like to author a "widescreen anamorphic" SD DVD horizontally squeezed widescreen image stored in a standard 4:3 aspect ratio DVD image frame. (On 4:3 displays, mattes should preserve the original aspect ratio. On 16:9 displays the image will fill the screen at the highest possible resolution.)
Below I've listed the specs of the Digi Beta master tapes the producers have sent to me for digitizing. I'd like to know this: What are the ideal specs for a DigiBeta master tape when authoring a widescreen anamorphic SD DVD, using material with an original aspect ratio of 14:9?
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Original Aspect Ratio: 1.55 (14:9)
Vid Rate: 29.97 fps
Pixel Aspect: NTSC - CCIR 601
Frame Size: 720 x 480
Anamorphic: Full-Height Anamorphic (16:9 image displayed in letterboxed, non-distored 4:3)
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Original Aspect Ratio: 1.55 (14:9)
Vid Rate: 29.97 fps
Pixel Aspect: Square
Frame Size: 720 x 540
Anamorphic: YES
Display Format: 16:9 Anamorphic (horizontally squeezed widescreen image)
Please feel free to ask for clarification or further information you need to answer my question.
Thank you so much in advance for your help!
Best, Noetical.
BTW, I can't wait for the day when everything has gone digital and we get digital intermediates instead of tapes to digitize!

Hi Nick...thanks for taking the time to reply to my question.
Nick Holmes wrote:
What you have there is a mess.
NTSC pixels are never square.
NTSC is 720x486, even when it is Anamorphic.
You shouldn't be using an already letterboxed master to make an Anamorphic version. Get the master that was made before the letterboxing stage.
When you make an Anamorphic DVD it should display as 16:9 full screen automatically on widescreen TVs.
The same DVD will automatically letterbox on 4:3 TVs.
Um yeah...duh. That's exactly what I was trying to explain in the preface of my question. I'm sorry if I didn't make it clear...all these things you mention are the reasons I'm putting together a list of the technical specs of the DigiBeta I need so I can have them send that instead of the stupid letterboxed version.
Look, I'm sending this request to some intern at their offices in England, asking for a master with which I can make an Anamorphic DVD. They already sent me this master, which as you and I both agree is an idiotic asset to use for these purposes. As such, I was hoping for advice on a more precise way of requesting the master that I need than asking for "the master that was made before the letterboxing stage." Upon reflection, perhaps I'll just do that. If you or anyone else has a suggestion about something I should add to my request that would improve the odds of them sending the tape I need, please repond. Thank you!
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Thank you for your input.
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We are trying to use an anolog input signal from a DAQ card to control the motion contol axis. For now, we want the motor speed to follow a sinusoidal voltage waveform, and later on, we will be using a more complex velocity profile.
In order to accomplish this task, we have searched the user forum, and found information suggesting to operate the servo motor in 'slave' mode under the 'gearing' option. Therefore, we have set the Gear Master to 'ADC Channel-1', Mode set to 'absolute', Gear ratio 1:1, and provided the sinusoidal voltage (+/- 5V, 3 Hz) to the AIN1 connector on the MID-7654 controller. When using the 1-D Interacitve 'single axis' control panel, the motor runs at constant speed in one direction only. It does not react to the sinusoidal speed profile request as we expected.
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you can configure and enablethe Gearing mode in MAX and it should be activated after saving the settings and initializing the board. In 1D-Interactive you can't use Gearing. For better flexibility I recommend not using MAX for configuring and enbling Gearing. You better should do this in your application.
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I hope this helps,
Jochen Klier
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Message Edited by Jochen on 10-02-2007 08:37 AM
Attachments:
gearing.jpg ‏162 KB

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DVI to ADC Adapter question

I've got a Quicksilver 933 (2002) and want to get the ATI Radeon 9600 Pro PC & Mac Video Card. I have a 17" Apple Cinema Display and want to add the new 20" Apple Display for an extended desktop. The ATI card has 2 DVI outs. I will need a DVI to ADC adapter. My question is, the adapters (see below) say they are good for connecting to DVI-D out and the 9600 card is DVI-I. Does this make a difference? Does anyone out there have experience running a set-up like this? I would hate to spend $200. on this card and $80. on the adapter only to find out I couldn't use the 17" Display.
My other choice is the 64MB ATI 9000 Pro Mac edition. (This has both a DVI out and an ADC out so I would save ~$200.) I will not be doing any gameing, just extended desktop work with Photoshop, Flash and Dreamweaver. Would there be any noticeable difference between the 9000 and 9600 in these activities? As always, thanks for your input.
AddLogix DVI - ADC Video Adapter
Addlogix's DVI-D to ADC adapter allows Apple ADC LCD monitors to be connected to virtually any DVI computer systems and retain the USB hub feature as well. The adapter combines the DVI and the USB signals from your computer and provides DC Power to the Apple Display.
http://eshop.macsales.com/item/AddLogix/MCADVIADC/
Dr. Bott's
DVIator, DVI to ADC adapter
http://www.drbott.com/prod/db.lasso?code=0111-DVAD

Hi Justin,
Can I further the questioning instead of starting my
own new thread?
No, worries, Mate!
I am in a similar situation.
I have a 2003 Quicksilver 933 with dual display
currently running.
(Using a 17" Apple Display & a 17" Sony CRT).
I eventually wish to either upgrade to a 20+ cinema
display and use the 17" Apple display as my extended
desktop, but that may still be down the road a bit.
Until then, Im looking to ditch the CRT for a 15 (or
so) LCD to dave on desktop space and make an attempt
to match the 17'' Apple Display.
Ok, on to the question.
I purchased a ATI Raedon 9800Pro Mac Edition and then
noticed it only have two DVI connections. This won't
be a problem for the eventual LCD upgrade (which has
DVI connection), but I need to purchase a DVI to ADC
convertor for the 17" Apple display.
The Radeon 9800 has DVI and VGA and S-Video output, I believe. If you want to run 2 LCD monitors, one of them will have to have a VGA input (which you can't get on Apple monitors).
1) Can I expect any loss in quality/performace due to
the conversion between DVI and ADC?
No, if the adaptor funcftions properly, there is no loss from DVI to ADC.
2) I believe there are mulitple brands out there
doing this conversion. (Apple, Geffen, etc..) Any
brand looking to be more preferred over the other?
The Geffen adaptor is presently the only one which will support the 17" ADC CRT studio monitor (as well as the ADC LCD monitors).
3) With the convertor will I still be able to power
my mac on and off with the use of the display power
button?
You can power the Mac on, however, some adaptors don't allow you to power it off.
Thanks for any help.
Justin
Cheers!
Karl

Does anyone know how to connect an older 20" cinema display with the (ADC) adapter end and connect it to a MacBook Pro 17" 2008 model (DVI) ?????

Does anyone know how to connect an older 20" cinema display with the (ADC) adapter end and connect it to a MacBook Pro 17" 2008 model (DVI) ?????

I believe you naeed the Apple ADC to DVI adapter.

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You need a Mini DisplayPort to DVI adapter
<http://store.apple.com/be-fr/product/MB570Z/A?fnode=MTY1NDA5OQ&mco=MTEwMjYzNzQ>
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<http://store.apple.com/be-fr/product/M8661Z/B?fnode=MTY1NDA5OQ&mco=MTE0ODUyODQ& s=topSellers>

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I found one here for $139:
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Ideal adc

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