INVALID VALUE FOUND FOR VENDOR_SITE_CODE (Purchaing)

HI ALL
while creating requisition i cant find supplier site in LOV. i already have defined sites for the supplier.
does any body has an idea about this.
regards,
naveen

ok i got it
all supplier sites had been checked as RFQ only.
i unchecked this.working fine.
regards
naveen

Similar Messages

  • INVALID VALUE FOUND FOR VENDOR_SITE_CODE

    HI ALL
    while approving supplier i cant find supplier site in LOV. i already have defined sites for the supplier.do i need to give site access to an org.
    does any body has an idea about this.
    regards,
    naveen

    hi
    i m sure that i have defined thr site for the supplier in the particular org.
    and my structure is not multi org.
    for my case
    business grp/legal entity/operating unit/ are all one and the same.
    i feel that there are some setup issues.
    tell me if u know some setups issues related to this.
    naveen

  • ORA-48108: invalid value given for the diagnostic_dest init.ora parameter

    Hi All,
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    Regards,
    Sunil

    sunil907 wrote:
    Hi,
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    SQL> startup
    ORACLE instance started.
    Total System Global Area 1068937216 bytes
    Fixed Size                  2182592 bytes
    Variable Size             616563264 bytes
    Database Buffers          444596224 bytes
    Redo Buffers                5595136 bytes
    ORA-00205: error in identifying control file, check alert log for more info
    Please help
    What does your own research of 'ORA-00205' indicate?
    the text of the error message is pretty self explanatory .. it couldn't find the control file.
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    oracle:fubar$ sqlplus / as sysdba
    SQL*Plus: Release 11.2.0.1.0 Production on Tue Jul 16 12:51:37 2013
    Copyright (c) 1982, 2009, Oracle.  All rights reserved.
    Connected to an idle instance.
    SQL> startup
    ORACLE instance started.
    Total System Global Area  835104768 bytes
    Fixed Size                  2217952 bytes
    Variable Size             490735648 bytes
    Database Buffers          339738624 bytes
    Redo Buffers                2412544 bytes
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    NAME                                 TYPE        VALUE
    control_file_record_keep_time        integer     7
    control_files                        string      /u01/app/oracle/oradata/FUBAR/
                                                     controlfile/o1_mf_8ybx4t7w_.ct
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  • No value found for text variable ZZCALQTR in "&ZZCALQTR&"

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    Hi San,
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  • No value found for Text Variable

    Hi All,
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    Hi,
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  • DRG-10705: invalid value 149 for attribute TYPE_ID

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    Regards,
    Pierre

    Thanks a lot for the answer, I have been under pression because of deadlines but I'll focus on this problem next week.
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    That's why I wanted the ctx_report.analyze_index but it fails (even when the base table is truncated, so you might be right, there could be a leftover from a previous index). I'll set-up a test case with a freshly created database.
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  • Vivado 2013.4 ERROR: [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order

    Hello,
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    [HDL 9-1061] Parsing VHDL file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/sinegen_demo.vhd" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/sinegen_demo.vhd":1]
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    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [HDL 9-1061] Parsing VHDL file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/sinegen.vhd" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/sinegen.vhd":1]
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    set_property target_language Verilog [current_project]
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    sources_1[IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [HDL 9-1061] Parsing VHDL file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/sinegen_demo.vhd" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/sinegen_demo.vhd":1]
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    update_compile_order -fileset sim_1
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [HDL 9-1061] Parsing VHDL file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/fsm.vhd" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/fsm.vhd":1]
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [HDL 9-1061] Parsing VHDL file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/fsm.vhd" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/fsm.vhd":1]
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [HDL 9-1654] Analyzing Verilog file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sim/testbench.v" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sim/testbench.v":1]
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [HDL 9-1061] Parsing VHDL file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/debounce.vhd" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/debounce.vhd":1]
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2013.4/data/ip'.
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [IP_Flow 19-1704] No user IP repositories specified
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    Vivado Commands[Project 1-11] Changing the constrs_type of fileset 'constrs_1' to 'XDC'.
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    sim_1[IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [HDL 9-1654] Analyzing Verilog file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sim/testbench.v" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sim/testbench.v":1]
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [IP_Flow 19-234] Refreshing IP repositories
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [IP_Flow 19-395] Problem validating against XML schema: Invalid value format for this type spirit:order
    [IP_Flow 19-193] Failed to save BOM file '/home/jmassol/.Xil/Vivado-2683-ubuntu/coregen/dds_compiler_0/dds_compiler_0.xml'.
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [HDL 9-1061] Parsing VHDL file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/debounce.vhd" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/debounce.vhd":1]
    [IP_Flow 19-3378] Failed to create IP instance 'dds_compiler_0'. Error saving IP file.
    [IP_Flow 19-194] Failed to save IP instance 'dds_compiler_0'.
    [HDL 9-1061] Parsing VHDL file "/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/sinegen.vhd" into library work ["/home/jmassol/Desktop/Vivado/vivado_debug/ug937/project_xsim/project_xsim.srcs/sources_1/imports/ug937/sources/sinegen.vhd":1]
    set_property constrs_type XDC [current_fileset -constrset]
     

    We had the same problem when switching to Ubuntu 14.04, and there actually is a solution for it: make sure your locales are set to English.
    $> env | grep LC_*
    should only show english (or C) locales, all others are known to cause parsing errors in some numbers, usually caused by wrong string-to-float conversions (e.g. 18,29 in german is 18.29 in english). You can change the locales in the file /etc/default/localesThis is not the first time we had problems with the locale settings, Xilinx does not seem to test their software with anything else than en_US, causing obscure bugs like this one.
    HTH
    Philipp

  • No value found for Organizational Unit BILL_ORG

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  • Invalid value 0 for parameter login/password_chang

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    Hi,
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  • 2EETW169 no connect possible: "invalid values set for DIR_LIBRARY

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  • Office 365 API, error: The token has invalid value 'roles' for the claim type ''

    Hi guys,
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    "nbf": 1415982933,
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    Hi Manu,
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