K9ND Speedster 2 sata speed limit?

Hi everyone 
I just bought a SSD for one of my pc's.
pc specs:
K9ND speedster 2
2x Opteron 2380
4x2GB reg ecc pc-5300
XFX ATI 4890BE
SSD: OCZ Agility 2 60GB
I see a lot of people who reach 250MB/s read and write with this SSD, but I get stuck at 150MB/s read and write.
Is this a known issue? Should i get myself a SATA controller to fix this problem or is there another way?
Thnx for the support 

But don expect too much anyway, it's software controller and not a real hardware controller.
If you want real speed, get a controller with PCI-e 4x, own CPU and memory, those controllers will knock you off your feed.
But they are € 300 and up in price.
If you want RAID speed, get a real controller.
To give you an idea: http://www.lsi.com/storage_home/products_home/internal_raid/megaraid_sas/value_line/megaraid_sas_9261-8i/index.html
And go SAS drives instead, SATA is simply slow compared to SAS and SAS is just as expensive as a Raptor but twice the speed.

Similar Messages

  • Speed limit

    Hi!
    My turn to ask a question. I read some- and everywhere the Athlon XP has a MHz limit of 2500. It seems to be so, but is it? I tried on my own to find an answer, and below is a result of that, but...
    Why I don't ask AMD?! Before asking well-paid and intelligent people, I thought I should try the forum.  
    Speed limit
    Athlon XP and Sempron reached a speed limit
    The main difference between the socket A processor nowadays seems to be in the architecture of the cache memories. The speed does not pass 2500 MHz. Why is that?
    The first Athlons came in 1999. Their advantages compared to their competitor are/were the number of pipelines and calculation units:
    - Three decoders for translating the complex but fundamental CISC-instructions into RISC-instructions. The processor has no problem working with the short and simple RISC-instructions.
    - Athlon can have 72 instructions simultaneously, (Pentium III 40, and the earlier K6 only 24).
    - Very competent FPU:s, three of them, and as FPU is better at calculating decimal numbers than the main ALU, it makes Athlons good at 3D graphics – where there are lots of that kind of mathematics when producing polygons.
    In the beginning Athlons had external Level 2 cache. The cache sat on a slot beside the processor, and the architecture was called slot 1. With XP this changed, both Level 1 and Level 2 cache were built into the processor, and we got the socket A kind. Athlon XP was also built with thinner lines connecting the transistors, and got the ability to handle new instructions, got a better data pre-fetch technology, and an overheating protection.
    So what’s the problem? Speed it up!
    Well, one bottleneck lies between the processor and the RAM memory, the Front Side Bus (FSB). The processor is much faster than the RAM and process data as they come by. To keep the processor busy mainly Intel invented a sort of pipeline, or ladder. The processor is working on every step.
    Data is sent from hardware, like sound data or network data over the PCI-bus, graphics data over the AGP-bus, hard-disk data over the IDE (PCI-/SATA) bus, etc. The data comes in ones and zeroes in little packages, which make up complex instructions. For the processor to be able to efficiently perform the instructions they need to be sized down to simpler instructions, from CISC to RISC. (CISC codes is such a fundamental part of the PC history they must remain.) The sizing down is done in the very beginning of each pipeline. In later steps of the pipeline, the instructions are interpreted further and performed.
    Early processors needed one clock-cycle per step in the pipeline, but Athlons can manage 2,5 steps, as can for example Pentium 4. With the pipelines, as said, Athlon XP can do 72 instructions at the same time. Pentium 4 however has longer pipelines – with 20 steps – and can process 126 instructions. But the efficiency of a Pentium 4 is lower, which is why Athlons are quicker at the same MHz. Apple’s (Motorola’s) G4 processor is yet more efficient.
    Athlon XP has 10 steps in each pipeline for the “main” ALU processor and 15 for the FPU. The reason why there are not more pipelines is that the processor is not kept busy with the slower RAM, and a lot of clock-cycles would be wasted. What is more, there will be too many erroneous instructions, when the processor has to start over, filling the pipelines with correct instructions.
    RAM is slower
    This was not the case in the beginning. All ran at the same speed, say 20 MHz: Processor, FSB, RAM-memory, PCI-bus etc. By separating the PCI-bus, which had hardware connected that couldn’t work at higher frequencies, things could start moving.
    In 1989 came a Pentium with clock doubling. To compensate for the not ‘doubled RAM, L1 cache was invented. But processors kept getting faster. Next thing to be pushed forward was the FSB, which for socket A boards now is increased to 200 MHz x 2 (DDR). Intel increased it even further, but as the efficiency rate isn’t increasing at the same rats, Intel has backed down from the megahertz spiral, and has followed AMD in other ways of thinking.
    So is this the simple basic calculation?
    Athlon XP:s can do 2,5 instruction per clock-cycle in 10 steps per pipeline x the number of pipelines. The number of pipelines is limited by the number of instructions sent and their quality, 72 instructions at the same time. Can this be the reason for 2500 MHz limit?

    Ok, reality check people...
    Sharp, nice explanation, but you are wrong.
    the x86 instruction set (including those nice MUL, ADD and other instructions) is a CISC instruction set.
    The difference? A MUL takes 12 cycles, a DIV 40 or something...
    RISC was a new computing architecture. Each instruction is simpler to allow higher execution frequency.
    The efficiency of a computer is judge by the work done. W= IPC x Freq
    Frequency is the well known number that we can find on our beloved processors. IPC is the instructions per clock. Why is the athlon more efficient than a P4 at the same frequency? higher IPC.
    How do the chip manufacturer choose those factors?
    Well, the problem is that the instruction set is FIXED. x86 (or i386), the instruction set, has been defined years ago as CISC and to maintain compatibility, you have to keep it. They then included internal decoders to change those instructions to streams of RISC instructions, each simpler. Those are the ones really implemented.
    How does that influence the speed of the processor? Each instruction is executed by a unit (integer unit, floating point, MMX...), the more that unit has to do for that imstruction, the more time it takes (and the more transistor). This has 2 problems:
     - one is that it will limit the overall speed as the more complex the unit, the less speedy.
     - The second is that it ties down the unit. If you do a div in 40+ clocks, your integer unit is tied during this time.
    The answer to this problem? Pipelines.
    Pipelines are splitting the tasks in simpler tasks and executing each as independant as possible.
    Example: laundry. You need washer and dryer. However, some of your clothes cannot go to the dryer.
    Now, you have 2 loads. If you have a combined unit that takes 1.5h for wash + dry, it will take 3h total.
    If you have a washer (.5h) and a dryer (1h), you load the first load (.5h) then transfer it to the dryer (1h). While the drier works, you load the next washer (0.5h). If you need it to perform also the drier, total time is 2.5h instead of 3h. If you dont need it, it is even faster 1.5h.
    This is the way intel followed. Prescott has a 25+ pipeline. The problem comes from branches. If you misspredict your branch, you have to flush the pipe.
    All that to say that with its manufacturing and its architecture, AMD could not release a AXP even close to 2.5GHz. Can you overclock a good unit over that limit? Sure. Intel did not release a 4GHz and yet you can overclock some P4 up to 5GHz (with appropriate cooling).
    Oh, and the technology used is 90nm or 0.09um. Athlon XP is not even that small, it was still on 130nm.
    This is the smallest critical dimention (smallest trace. Usually smallest transistor width).

  • Warranty service for K9ND Speedster

    Hello Good People of the World!
      I seem to have a problem and need some input if anyone can offer any.
    I sold a K9ND Speedster to a man in Canada. Within a week of its arrival, he writes and says its defective. He contacted MSI Canada and they go over the issue and say it needs an RMA, to contact the seller (Me) and get an RMA and send it back. I contacted MSI and ordered another board for the customer (I aim to please). When the defective item arrived, I shipped the replacement. I shipped the replacement to MSI in California. I was contacted and was told the unit was not defective. They will be shipping it back to me. 5 days ago, the guy I sent a replacement to contacts me and said the second board is defective. I asked him what components he was using to build his system. Everything he told me should work except the power supply. It was a common 300 watt. It had a 20 pin connector. I suggested he contact a qualified tech to help him with his situation because he did not have adequate power. At this point, I figure he has no idea what he's doing. The contacted me 2 days ago and says he brought it to a "Qualified" tech. Had it tested with the now correct power supply and finds it defective.
      Can anyone offer some in-site to this problem? I had already replaced a board that was not defective.
    Thanks

    It Works!!!!
    Thanks All
    It seems very stable so far.
    Here are the Benchmarks:
    Processor Arithmatic:
    SiSoftware Sandra
    Benchmark Results
    Dhrystone ALU : 31210 MIPS
    Whetstone iSSE3 : 27079 MFLOPS
    Results Interpretation : Higher index values are better.
    Performance Test Status
    Run ID : DYNAMO-C14D7E7B on Thursday, August 02, 2007 at 7:41:11 AM
    Platform Compliance : Win32 x86
    NUMA Support : Yes
    Number of NUMA Nodes : 2
    SMP Test : Yes
    Total Test Threads : 4
    Multi-Core Test : Yes
    Cores per Processor : 2
    SMT Test : No
    Dynamic MP/MT Load Balance : No
    Processor Affinity : P0C0T0 P1C0T0 P0C1T0 P1C1T0
    System Timer : 2.2GHz
    Number of Runs : 64000 / 640
    Processor
    Model : 2x Dual-Core AMD Opteron(tm) Processor 2214
    Speed : 2.21GHz
    Model Number : 4420 (estimated)
    Cores per Processor : 2 Unit(s)
    Type : Dual-Core
    L2 On-board Cache : 1MB ECC Synchronous, Write-Back, 16-way set, 64 byte line size
    Features
    SSE Technology : Yes
    SSE2 Technology : Yes
    SSE3 Technology : Yes
    Supplemental SSE3 Technology : No
    SSE4 Technology : No
    EMMX - Extended MMX Technology : Yes
    SSE4A Technology : No
    HTT - Hyper-Threading Technology : No
    Performance Tips
    Notice 5008 : To change benchmarks, click Options.
    Notice 5004 : Synthetic benchmark. May not tally with 'real-life' performance.
    Notice 5006 : Only compare the results with ones obtained using the same version!
    Tip 2 : Double-click tip or press Enter while a tip is selected for more information about the tip.
    Memory Bandwidth:
    SiSoftware Sandra
    Benchmark Results
    RAM Bandwidth Int Buff'd iSSE2 : 6103 MB/s
    RAM Bandwidth Float Buff'd iSSE2 : 6543 MB/s
    Results Interpretation : Higher index values are better.
    Int Buff'd iSSE2 (Integer STREAM) Results Breakdown
    Assignment : 5974MB/s
    Scaling : 6024MB/s
    Addition : 6208MB/s
    Triad : 6208MB/s
    Data Item Size : 16 byte(s)
    Buffering Used : Yes
    Offset Displacement Used : Yes
    Bandwidth Efficiency : 30% (estimated)
    Float Buff'd iSSE2 (Float STREAM) Results Breakdown
    Assignment : 6382MB/s
    Scaling : 6453MB/s
    Addition : 6701MB/s
    Triad : 6637MB/s
    Data Item Size : 16 byte(s)
    Buffering Used : Yes
    Offset Displacement Used : Yes
    Bandwidth Efficiency : 32% (estimated)
    Performance Test Status
    Run ID : DYNAMO-C14D7E7B on Thursday, August 02, 2007 at 7:51:06 AM
    Platform Compliance : Win32 x86
    Memory Used by Test : 512MB
    NUMA Support : Yes
    Number of NUMA Nodes : 2
    SMP Test : Yes
    Total Test Threads : 4
    Multi-Core Test : Yes
    SMT Test : No
    Dynamic MP/MT Load Balance : No
    Processor Affinity : P0C0T0 P1C0T0 P0C1T0 P1C1T0
    System Timer : 2.2GHz
    Page Size : 4kB
    Use Large Memory Pages : No
    NUMA Information
    Number of NUMA Nodes : 2
    Node 0 - Free Memory : 372MB
    Node 1 - Free Memory : 141MB
    Features
    SSE Technology : Yes
    SSE2 Technology : Yes
    SSE3 Technology : Yes
    Supplemental SSE3 Technology : No
    SSE4 Technology : No
    EMMX - Extended MMX Technology : Yes
    SSE4A Technology : No
    HTT - Hyper-Threading Technology : No
    Chipset 1
    Model : Advanced Micro Devices (AMD) Athlon 64 / Opteron HyperTransport Technology Configuration
    Front Side Bus Speed : 2x 1005MHz (2010MHz data rate)
    In/Out Width : 16-bit / 16-bit
    Maximum Bus Bandwidth : 8040MB/s (estimated)
    Logical/Chipset 1 Memory Banks
    Bank 0 : 2GB ECC Registered DDR2-SDRAM 5.0-5-5-13 (tCL-tRCD-tRP-tRAS) CR1
    Channels : 1
    Speed : 2x 315MHz (630MHz data rate)
    Width : 128-bit
    Memory Controller in Processor : Yes
    Cores per Memory Controller : 2 Unit(s)
    Maximum Memory Bus Bandwidth : 10080MB/s (estimated)
    Chipset 2
    Model : Advanced Micro Devices (AMD) Athlon 64 / Opteron HyperTransport Technology Configuration
    Front Side Bus Speed : 2x 1005MHz (2010MHz data rate)
    In/Out Width : 16-bit / 16-bit
    Maximum Bus Bandwidth : 8040MB/s (estimated)
    Logical/Chipset 2 Memory Banks
    Bank 0 : 2GB ECC Registered DDR2-SDRAM 5.0-5-5-13 (tCL-tRCD-tRP-tRAS) CR1
    Channels : 1
    Speed : 2x 315MHz (630MHz data rate)
    Width : 128-bit
    Memory Controller in Processor : Yes
    Cores per Memory Controller : 2 Unit(s)
    Maximum Memory Bus Bandwidth : 10080MB/s (estimated)
    Performance Tips
    Notice 5008 : To change benchmarks, click Options.
    Notice 5004 : Synthetic benchmark. May not tally with 'real-life' performance.
    Notice 5006 : Only compare the results with ones obtained using the same version!
    Warning 5400 : Low bandwidth efficiency (advanced). Check memory timings and settings.
    Warning 5011 : NUMA nodes memory arrangement inefficient for maximum bandwidth.
    Tip 2 : Double-click tip or press Enter while a tip is selected for more information about the tip.

  • MSI k9nd speedster running slow

    Hi All,
    I recently acquired the K9nd speedster 1....
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    It seems that its being bottlenecked some where but I have no clue what to look or do next.
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    You better ask these guys: http://photography-on-the.net/forum/showthread.php?t=911736

  • K9ND SPEEDSTER-WA6, I need to use 2 3Ware PCIE controllers

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  • K9ND Speedster 2ND System To Be Built

      Ok, the time has come.
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    I will be using the AMD Opteron Quad Core 2347 Processors. (OS2347WAL4BGE) 95W version.
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    I would suggest that one for testing
    What Is MAXON CINEBENCH?
    CINEBENCH is a real-world test suite that assesses your computer's performace capabilities. MAXON CINEBENCH is based on MAXON's award-winning animation software, CINEMA 4D, which is used extensively by studios and production houses worldwide for 3D content creation. MAXON software has been used in blockbuster movies such as Spider-Man, Star Wars, The Chronicles of Narnia and many more.
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    Details and download: http://www.maxon.net/pages/download/cinebench_e.html
    Used in:
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  • K9ND Speedster board won't work with opteron 2212

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    Quote from: BOSSKILLER on 24-August-08, 03:33:06
    How are placed your memory sticks?
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    Hello, thanks for the fast replies.
    My memory sticks are placed in DIMM one and two of CPU 0 and it's working with one CPU. If I plug in both CPUs with I memory stick on each (DIMM ONE) or 2 sticks (DIMM one and two) the system does not boot.
    I also noticed that If  i plug in the 4 stick (4gb) of RAM in CPU 0 the system does not boot either.
    Quote from: Hans on 24-August-08, 06:47:28
    Let's go simple with this one:
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    Quote from: Bas on 24-August-08, 22:22:54
    You did connect all power-plugs properly did you?
    Yes, I did. I plugged in the 24pin and the other next to it 8 pin.
    Do you guys have any idea what could be wrong? Is it something that I have to change in the set up to tell the bios to accept 2 cpus or igb memory sticks? or is there something I have to change in the board on the board?
    I really appreciate your help and effort. Thank you.

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