Max frequency of externally-clocked counter?

Hello, I am wondering if I could operate a counter on a Virtex-5 (XC5VLX50T, speed grade -1? [there is a "1C" on the chip]) using an external LVDS clock running at 2 GHz. I have done some searching, and I haven't been able to find if a counter could count fast enough to keep up with a 2 GHz clock. Thank you!

Your trying to make code on the Virtex 5 -1 that counts at 2 GHz,
I don't think your onto much of a hope, 800 MHz was about the MAX numbers I remember and that was on a -2.

Similar Messages

6120 counter max frequency

I am trying to set the max frequency for PCI-6120 counter. By the card specification, the counter's max source frequency is 20MHz. However, on MAX software test panel, if the counter frequency is set greater than 5MHz, program pops up an error stating the max valid value is 5e6 MHz.. Attached is the error message. Did I do anything wrong? Or special card setting is needed. Please help. Thanks very much.
Attachments:
NI 6120 counter error message.jpg ‏36 KB

Hi windwalker,
The max source frequency is 20 MHz. The source is an input to the counter which is divided down to produce the output signal:
The default behavior is that the counter will count to N, and then toggle its output. N must be at least 2, so the maximum frequency you can generate with the default (toggle) mode is 5 MHz (2 ticks high, 2 ticks low of the 20 MHz maximum source).
The other mode is "pulse" mode, where the counter will count to N and then a pulse its output. You can end up getting a pulse every 2 ticks of the source, which could give you a 10 MHz clock. You can't set this mode in the test panels, but here's an example in LabVIEW showing how to get a 10 MHz output (the "External Clock" can be the 20 MHz timebase).
However, if you're just trying to generate a 10 MHz continuous output, then I suggest using the Frequency Output which is a 4-bit counter that can output a small set of frequencies including 10 MHz -- {10 MHz,100 kHz} / {1:16}. It is programmed similar to the other counters.
Best Regards,
John Passiak

Measure scan frequency using 2 e-series boards and an external clock.

I am setting up a data acquisition system in which the user has the ability to select between multiple sources for the scan frequency. The user can choose either hardware based and select the scan frequency or an external source, in this case, an encoder. When the user selects the external case, I would like to measure the scan frequency. I have a PXI chassis with 3 6071E DAQ boards. I have the encoder pulse train wired into the master board and would like to use one of the slave boards to count the pulses and measure the frequency. I based the code I developed on example code that shipped with LabView. However, when I drive the master board with a known frequency using its internal clock,
I measure 0 frequency on using the slave boards counter.
Attachments:
DAQ_3_Boards_-_State_Machine_-_Scaled_Array.llb ‏1525 KB

It sounds like you have your program setup to measure the frequency of the clock only when you are using an external source. The counter won't get an input if you are not using an external source, right? So, when you drive the master board with an internal clock, the counter will have nothing to count.

How I can measure frequency of TTL signal without external clock?

Hello,
I want to measure frequency of TTL signal using PXI-6254 or PXI-6713, without using external clock.
Frequency will be up to 100kHz. How I can use internal counter of 20MHz or 80MHz?

Hi Yuta K,
You have not stated what software you want to use for this measurement, but in case you're using LabVIEW, please go to the Example Finder (in LabVIEW go to "Help >> Find Examples").
In the Example Finder, you make sure the "Browse" tab is stil selected, and than you go to:
Hardware Input and Output >> DAQmx >> Counter Measurements >> Digital Frequency
Here you will find some good examples of measuring a digital frequency with 1 or 2 onboard counters.
If you need additional information, please let us know!
Best regards,
Peter S

USB 6210 Using counter as an external clock

I was referencing an old post for how to read and write data from a quadrature encoder. I am using a USB 6210 card along with Labview 8.2.1. In the previous post it describes needing to:
"You will have to create an external clock using the other counter on
the board then route the signal either externally or internally"
I do not know what this means and I do not understand what is required to do such (Changes to wires, change the Vi...etc). If someone could please shed some light on this I would really appreciate it.
I am basing my approach on the following NI example:
Meas Angular Position-Buffered-Cont-Ext Clk.vi

Hi rose8,
The example you are referencing requires an external clock to basically take samples of the angular position based on time. For instance, you can rotate your angular encoder all you want, but it will not save which position you are at until a sample clock rising edge is seen. When the sample clock rising edge is seen, then it places that position into a buffer, and continues to wait for the next sample clock rising edge to happen. Every time the rising edge happens, the position of your angular measurement is recorded one point at a time, stored in a 1D or 2D array.
The sample clock cannot be an on board clock that is already created. So now, we look at what sources we can use for our external clock to sample the position of our encoder and save it in our memory buffer. We can use an external source and bring it into the board, or we can create a clock using another counter on the board. Since you are looking to do this, I'll assume you want to create a clock from there.
In software, you specify two counter tasks; one to measure your angular position and one to generate a pulse train. The pulse train you generate will be the sample clock for the buffered angular position measurements you are taking. Now, you can route this externally or internally, based on your application. The easiest way is internally, because it doesn't require any additional wires to accomplish.
To route internally, all you have to do is for your DAQmx Timing VI, specify CtrXInternalOutput from your USB 6210 as the source, where X is the counter you generate your pulse train on. To see this source as an available selection, right click your Resource Name and select I/O Name Filtering from the shortcut menu, and then be sure that Include Advanced Terminals is checked.
In programming, you would want to start your angular position task first, and then start your clock generation from your second counter. They will run in parallel and just be sure to clear both threads at the end of your program. Hopefully this clears up some confusion for you.
Kyle A.
National Instruments
High Speed Digital I/O Product Support Engineer - R&D

Counting external clock

Hi,
i have an optical mouse connected with a vi that i could see the data and the external clock of the mouse..
the problem is that i want to know or measure the real time which the external clock create each pulse..
i thought to get a counter which measure any dig pulse send by the mouse..
but can i get and the time with counters?
andrikos

Hi,
Your question was :
i want to know in real time,, when the external clock create the pulses..
You can use counters to find when the external clock is generating pulses. It looks like you have connected to an analog input right now. You could essentially do some kind of software analysis but it would not be accurate. Using the counters you can measure all the pulses and when they occurred. Are you using the DAQmx driver for this application? If you are using LabVIEW for this application I can point you to an example that achieves something similar to this. In the LabVIEW environment, click on Help >> Find Examples. In the example finder window, select Hardware Input and Output and then select DAQmx >> Counter Measurements >> Count Digital Events. There are a few examples in this folder that can show you how to make counter measurements.
There are also examples of counting pulse width etc., if that is something that you might want to do.
Hope that helps.
Regards,
Raajit L
National Instruments

Generate pulses in NI-ELVIS II to be used as an external clock

I am using the NI ELVIS II counter for edge counting and to set the clock for Sample clock function I have to use an external clock but I am not sure how to do it. I suggest I have to use Counter Output/ Pulse generation to generate a pulse with a desire frequency and output it on pin PFI12 or PFI13 or even Freq-Out pin and then use this pulse as the external sample clock.
I can do pulse counting withough using a sample clock function but I would like to sample as high as possible to have more points and less oscillation. Would you please help me with this vi. I have attached the vi to this post.
Attachments:
Edge Counting.vi ‏25 KB

Hi tintin99,
I'd recommend checking out the NI Example Finder, found in <LabVIEW> » Help » Find Examples...
Then navigate through Hardware Input and Output » DAQmx » Counter Measurements.
In particular, I'd suggest that you load up Count Digital Events.vi which shows how to implement simple Counter based Edge Counting measurements. These are useful for interacting with peripheral hardware such as Quadrature Encoders. With this VI running, you could also concurrently execute the Gen Dig Pulse.vi found in the 'Generating Digital Pulses' section also within the Counter Measurements category. These are both good demonstrations on how to efficiently create Counter I/O DAQmx tasks within LabVIEW and will serve as a great foundation for your own code.
As a general overview, there are three main terminals you will need to be aware of when dealing with Counters:
Source - The counter input signal, effectively the signal we wish to count.
Gate - An input signal which determines whether we should continue counting, based on digital highs, lows, active edges and falling edges. These can all be preconfigured in software.
Out - The counter terminal output. This will be used in pulse generation.
As you want to perform two Counter based tasks, you will need to make use of two different onboard counters. You can find out which pins can be used to access these different counter terminals by loading up the Measurement and Automation Explorer (MAX) and selecting your device under the Devices and Interfaces tree from the left hand pane. With the device selected, click on Device Pinouts, found on the toolbar. This tab could be hidden, so I suggest either maximising the MAX window or clicking on the double arrows on the right hand side of the toolbar to display any missing options.
Best of luck with your application.
Kind Regards,
Alex Thomas, University of Manchester School of EEE LabVIEW Ambassador (CLAD)

5122 External Clock Questions

I am working on a project that requires the ext. clock (100Ms/s on a
5122) and a signal hand-off. Signal 1 is 32MHz, and Signal 2 is
32MHz +- 100,000Hz. If I am feeding in Signal 1, what is the
minimum and maximum times I have to kill signal 1 and input Signal 2 so
that the card doesn't crash. In other words, the jitter
parameters on the PXI 5122 clock. I cannot find this information
anywhere. If I had to guess, the minimum time would be 1/105MHz =
9.5ns and the max would be 1/30MHz = 33.3ns. The 30MHz and 105MHz
comes from the PXI 5122 data sheet.
Also, if the hand-off were made smoothly withing the jitter
specification times, would the clock crash due to the change in
frequency between the 2 signals?
Thank you for your time,
Austin McElroy

*I have posted the answer on all 3 of the forums that you queried, but please continue the thread here, in the appropriate section:*
Good morning Austin,
Thanks for contacting National Instruments with your issue, we'll try our best to solve it for you as quickly and efficiently as possible.
I'm going to have to contact R&D about this specification. There are some that might get us close, such as the fact that the PLL Reference Frequency has to be accurate to +/-50 ppm (page 14 of (http://digital.ni.com/manuals.nsf/websearch/5D8BAB258130779686256FA800691AAA)) and that the sample clock delay range is 1 sample clock period (Page 13), that I could postulate on, but I'd rather get the definitive answer.
One point of helpful clarification would be whether you're using the external clock for the reference clock or sample-clock timebase.
I will let you know as soon as I hear anything from R&D.
Sincerely,
Minh Tran
Applications Engineering
National Instruments

Single Pulse Width with External Clock

I am trying to setup a 6602 counter for a single (non-buffered) pulse width measurement with an external clock. Under normal testing, the unit under test will provide the pulses, I need to measure the number of pulses during different time periods (1, 60, and 300 seconds). I want to do a pulse width measurement and I'll supply the gate signal pulse to the counter for the specific time needed.
Under normal operation, the unit under test is wired into the counter's source and the pulse is wired into the gate. For testing purposes I am using a BNC-2121. I have the counter's source wired to the Adjustable Square Wave Output and the gate wired to the Trigger output.
Here is my C++ code. I am getting a timeout error on the read and I don't know why. Any help would be appreciated.
   //Create Task
   DAQmxCreateTask( "task1", taskHandle );
   //Create Pulse Width Channel
   DAQmxCreateCIPulseWidthChan( taskHandle,             // TaskHandle
                                                   szCtrName.c_str(),     // Counter Name
                                                   "",                             // Channel Name
                                                  dMin,                          // Min Value
                                                  dMax,                         // Max Value
                                                  DAQmx_Val_Ticks,     // Units
                                                  DAQmx_Val_Rising,    // Gate Edge
                                                  "" );                            // Scale Name
   //Set the Pulse Width Terminal to the gate signal
   DAQmxSetCIPulseWidthTerm( taskHandle,     // TaskHandle
                                                 "",                       // Channel
                                                 "/CTR2/PFI38" ); // Terminal
   //Set the Timebase Src to the counter's source
   DAQmxSetCICtrTimebaseSrc( taskHandle,         // TaskHandle
                                                "",                       // Channel
                                                "/CTR2/PFI39" );   // Terminal
   //Start Task
   DAQmxStartTask( taskHandle );
//***Send pulse to gate counter***
   //Read Counter
   DAQmxReadCounterU32( taskHandle,                      // Task Handle
                                          DAQmx_Val_Auto,           // Num Samps to Read
                                          10,                          // Timeout
                                          ulBuffer,                           // Read Buffer
                                          1000,                               // Buffer Size
                                          &lSampsRead,                 // Num Samps Read
                                          NULL );                            // Reserved

I've setup a pulse width task in NI-MAX using the onboard clock and everything worked fine, so I know the hardware is working.
My unit under test is providing the pulses (from gyros) I need to measure. The pulses indicate the position of the unit so there are X, Y and Z axis gyros. I need to measure these pulses for specific periods of time (1, 60, and 300 seconds). For example during the 1 second measurement, the X and Y gyros should measure zero pulses and the Z axis should measure 515 gyros. During a 300 second measurement the X and Y gyros should measure < 60 and the Z axis should measure 30800.
So the gyro pulses are wired to the counter input and I am using a DIO channel from NI-6508 to provide the gate pulse. The gate signal will be high for either 1, 60, or 300 seconds depending on the test. The gyro pulses are essentially the external clock to the counter. I want to count the gyro pulses during the pulse of the gate (DIO).
To simplify the setup, I connected to BNC-2121 directly to the card. I have the adjustable clock output going to the counter input of ctr0 and the trigger signal going to the gate of ctr0. Once the task has been started and before the read ( I had a breakpoint set in the code), I would press the trigger button on the BNC-2121 and hold for approx. 1 second. I then execute the Read statement, and I always get a timeout. From my experience working with NI, I'm guessing I don't have a channel property set correctly, but its not obvious to me and I can't find an example to do exactly what I'm trying to do.
The CTR2 designation in the code was the object name of the card. I have two 6602 cards in my chassis. I was using ctr0 of the second counter card, so PFI38/39 was correct.
Again, any help would be appreciated.

DAQ Card is inducing noise on an external clock signal resulting in false triggering

I am using an optical encoder as an external clock source for analog measurements with a PCI 6036 card. The optical encoder signal is "filtered" using a Schmitt Trigger circuit and proper shielding practices are used on the encoder cable. I am using a recent version of Labview.
When the TTL square wave signal from the encoder is viewed on an oscilliscope (without the DAQ attached) it is a picture perfect square wave, nothing that would cause any problems.
When I then connect the encoder output to my PFI line (with or without the oscilliscope) I get false triggering due to intermittent (seemingly random...) high frequency noise "blips". Out of 360 expected samples, I will typically get between 2 and 6 "bonus" samples... When captured on a scope, the noise looks like a decaying sine wave and lasts for only a few us. the peak magnitude is tyically around 2 V or so as shown on the scope, which is apparently just enough to make my card grab a sample.
Since the noise is only present when the encoder signal is attached to the DAQ, it seems that the DAQ is somehow inducing noise into the signal.
I have been fighting this problem for a while now and tried the following:
1) I first tried the raw encoder signal, but then added the Schmitt trigger, increased the signal strength of the encoder lines by adding resistors to ground, double checked my shielding, etc...
2) I verified that my ground potential between my card and my conditioning circuit were not causing problems. The conditioning circuit and encoder is now powered of the card itself, which should resolve any possible problem with grounds.
3) Cursed at various inanimate objects (made me feel better but didn't help the situation)
4) Checked if I could set a minimum pulse width required to trigger off of an exernal scan clock (I can't with my hardware.)
5) Swapped my card with a card of a different type (problem is still there)
If anybody out there has some recomendations, I am open to anything.

Hello OSU_Mech_Eng,
I'm not quite sure how the DAQ card could be inducing glitches into
your digital signal. Digital signals from mechanical devices like
quadrature encoders can often be glitchy or bouncy, but your schmitt
trigger should act as a debouncing filter to clean up that digital
signal. It sounds like you have thoroughly troubleshooted this
problem, and I would recommend moving on and trying to use a counter on
your DAQ board to generate the digital signal, rathar than using the
raw signal from your encoder/schmitt trigger.
You were correct when you stated that the best way to do this is by
configuring your counter to perform retriggerable pulse
generation. You can use the signal of from your encoder to gate
the internal clock on your DAQ card, creating a clean digital
signal. By setting the minimum pulse width of the signal, you
will be able to ignore the small glitches in your signal. Here is
a link to some Knowledgebases describing how to do this:
How Do I Remove Glitches or Add a Debounce Filter to My Digital Signal?
How Do I Define the Parameters for Pulse Generation in NI-DAQmx?
For further reference, on all of NI's new M-Series DAQ cards (PCI
625x), the PFI circuitry contains built in debouncing filters to
protect against small glitches in digital signals. If you have an
M-Series card lying around, it might be helpful to give that a try.
I hope this helps,
Travis Gorkin
Applications Engineering
National Instruments
www.ni.com/support

Configure digital filter for external clock

I am trying to use a digital filter on my PXI-6602 card and I can't get it to configure for an external clock. It keeps telling me the numbers don't match up but I don't see the logic to the numbers it supports. Here is the error I got for a time base of 100 Hz and a min pulse width of 1/(100 / 2) based on the period of 2 clock cycles.
Desired Minimum Pulse Width could not be produced.
Minimum Pulse Width is affected by the Digital Filter Timebase Source and the Digital Filter Timebase Rate. To see how these two property settings can affect the Minimum Pulse Width, refer to product documentation for more details.
Property: CI.CountEdges.DigFltr.TimebaseSrc
Requested Value: /PXI1Slot2/PFI36
Property: CI.CountEdges.DigFltr.TimebaseRate
Requested Value: 100.000000
Property: CI.CountEdges.DigFltr.MinPulseWidth
Requested Value: 20.0e-3
Supported Values: 80.0e-3 to 171.798692e6
Task Name: _unnamedTask<49>
I know my math is off since the filter uses the leading edge of the pulse but 0.08 seconds is 12.5 Hz and I don't get it. Other frequencies produce different but also odd (to me) numbers.
Attached is a copy of my VI
Attachments:
External Clock for Filter.jpg ‏131 KB

Digital filtering ensures that a high pulse is high for at least a certain time (minimum pulse width) in microseconds. This is to ensure that a fluke noise signal does not count as a high pulse. It also ensures that a voltage overshoot to the high value does not register more than one high pulse as it settles in to the value.
The specifications of the digital filtering is outline on page 3-1 to 3-3 of the 660x User Manual, found here. It specifies on page 3-3 that there are five different settings for the digital filter minimum pulse width:
5 µs
1 µs
500 ns
100 ns
Or, programmable with a custom tfltrclk (period in seconds of Filter Clock). However, when using tfltrclk, minimum pulse width needs to equal to 2*tfltrclk. Your current setup has the minimum pulse width set up for minimum pulse width = 1/(tfltrclck/2) = 2/tfltrclck rather that 2*tflrclk.
I think you already knew all of this. However, the Filter Clock does not equal the Filter Clock Timebase.
If we look on page 3-3 in the manual we seed that Filter clock is actually 1/4th the speed of the Filter Clock Timebase.
Therefore, in your setup:
Filter Timebase Rate = 100Hz
Filter Clock Rate= 1/4th *100 Hz = 25Hz
Filter Clock Period = 1/25Hz = 0.04 seconds
2*Filter Clock Period = Minimum Pulse Width = 2*0.04=0.08 seconds.
Which is the minimum value it was suggesting. This will always be four times as large as what you were guessing before.
Eric S.
AE Specialist | Global Support
National Instruments

Frequency generator to clock counters

I recently purchased a PCI-6221 with 2 32-bit counters. I wish to read and log two encoders (hence the 6221) and several analog inputs simultaneously.. My research found that this is not possible without an external clock (which can be created using one of the counters) leaving only one counter for my encoders. I noticed the 6221 has one Frequency Generator. Can this generator be used as a clock source for the counters and the AI?
Jeff
Solved!
Go to Solution.

You can use Freq Out as the sample clock of both CI tasks. However, you are restricted to what frequencies you can generated. You should also be able to use the AI sample clock as the "sample clock source" of the CI tasks.
As for simultaneous AI channels, thats impossible on that card. All AI channels share 1 ADC that is multiplexed between the channels on each period of the AI sample clock.
Wan L
Applications Engineer
National Instruments
http://www.ni.com/support

How do I use a quadrature encoder as an external clock (PCI 6229)

Hello, ( a similar post has been placed on DAQ forum apologies as I did not know best place)
I have a PCI 6229 M Series data acquisition card. I want to use a quadrature encoder to be the external clock driving the acquisition of a number of signals. I have set up reading 24 signals each time a clock pulse is received using the DAQ assistant and set my external clock to pin pfi8 (I think) this is then connected to an encoder output. This works well enough until the encoder is run too fast when it appears I am either missing pulses or getting bounce.
How can I set up to clock using a quadrature encoder? I have seen a number of questions on this forum regarding quadrature encoders and reverse counting but not on using them as an external clock.
Basically I want to have the stability and "bounceless" nature of using two outputs from a quadrature encoder whilst still using an external clock. Is this just a case of configuring controls to certain pfi's? If so how is it done?
Any help or pointers would be helpful. So far I have managed very nicely by simply using the DAQ assistant and the interface it has would suggest that if configured for a certain pfi pin I could actually still use it.
Thanks in advance.
Kevin

Hi,
Well I've had alook into this for you and I'm not quite sure I understand what you are looking for.
Is it possible for you to phone back in to support?
The reason you are seeing bounce at high speeds, or indeed loss of points, is due to the sampling rate that you have set up.
What you will find is that the trigger will start an aquisition of a number of points at a certain rate. If your sampling rate is too low then you will not finish that sample batch before the next set of samples is recorded.
It is possible to use an external clock into a trigger or digital line, however this will limit the number of samples you can take to the speed of your encoder.
If you increase your sampling rates, and then configure a start trigger from a single input from the encoder you will be able to record a number of samples after a rising/falling edge. (Set the clock as an internal clock)
Hope this helps
AdamB
Applications Engineering Team Leader | National Instruments | UK & Ireland

Driving DO lines with external clock wired to PFI lines

Hi all,
I have few issues understanding how to use hardware timing resources in M series USB6229, with particular focus on DO. I have read last couple of day all google offered on the subject but I am still straggling with some basic tasks. To cut the story short, the 1e6 dollar question: can I set up 7 independent DO lines where (different tasks or virtual channels) where lines use same hardware timing source (eg, freqout or CO0 set to ~10kHz sampling time routed to PFI0).
Note: the reason I need 7 independent lines and not a port output (which would be obvious solution) is because I need to have (vastly) different number of samples and for each line.
Follow up question regarding timing: As I understood, any of PFI ports could be used and a input to the external clock which could be used to drive DO line(s) samples. I have tried to generate one DO, eg. P0\line4 by using CO0 to generate 10kHz sample rate. The signal on the line4 is pulse with frequency of few Hz which I routed to PF6 (with actual wire) in hope to use this signal as a clock for line5. I tried this but I am receiving errors about "resources in use"
Possible reason(s):
Specified route cannot be satisfied, because it requires resources that are currently in use by another route.
Property: SampClk.Src
Property: SampClk.ActiveEdge
Source Device: USB-6229
Source Terminal: PFI6
Required Resources in Use by
Task Name: _unnamedTask<7B>
Source Device: USB-6229
Source Terminal: PFI4
Destination Device: USB-6229
Destination Terminal: do/SampleClock
Task Name: _unnamedTask<79>
Apparently, many of internal clocks are routed internally to different PFI lines which mean the lines are occupied resource, and I do not know how to solve this.
I wanted to ask you does this principle sound as something that should work and if you know about some examples that would be excellent.
Any help would be greatly appreciated.
Cheers, Nenad

> To cut the story short, the 1e6 dollar question: can I set up 7 independent DO lines where (different tasks or virtual channels) where lines use same hardware timing source (eg, freqout or CO0 set to ~10kHz sampling time routed to PFI0).
No, you can't. The USB-6229 has a single digital output FIFO which can only be used by one task at a time.
> Note: the reason I need 7 independent lines and not a port output (which would be obvious solution) is because I need to have (vastly) different number of samples and for each line.
It should be possible to generate all seven signals with a single task by generating a waveform that includes all seven signals. If the signals repeat at different rates or you need to start/stop them independently, you will have to disable regeneration and continuously generate new waveform segments on the fly. Continuous Write Digital Port - External Clock - Non Regeneration should be a good starting point for the DAQmx programming, but actually generating the data is likely to be the challenging part.
Brad
Brad Keryan
NI R&D

NI 5772, using clk_in as an external clock

Hi.
I'm using NI 5772R with NI PXIe-7966R NI FlexRIO FPGA Module.
I'm trying to sample the signal with external clock (CLK_IN). An example file 'Clock Select (FPGA).vi' is successfully compiled. However when running 'Clock Select (host).vi', the data doesn't seem to be sampled with CLK_IN signal even if I choose the clock source as 'External Clock'. Actually externally clocked data is the same as internally clocked data.
So I wonder if this is because the signal plugged into 'CLK_IN' has wrong range. The frequency range of my CLK_IN signal is 80~160MHz, while the specification of NI5772 says the CLK_IN input range is 400-800MHz. Would it be a problem?
Also, My clock signal is sinusoidal, rather than TTL. Does the CLK_IN need to be TTL?
Thanks for your help.

Yes the output impedance of the amplifer is designed 50 ohms, so that is not an issue ...
We have hooked it up to a function generator, and gotten it to work at 500 MHz even at the lower voltages.
After unplugging the function generator, then plugging in our external clock, it will run, by the signal is corrupted at several points.
The long period duty cycle of the clock is only about 60% (i.e. there is a log period where no clock signal is sent)
I think the issue may also have to do with the clock phase, which is not unform. The NI 5772 uses a Texas Instruments ADC . Reading the manual for tha part, it seems like the clock requirements are pretty tight, as it is expecting a very low jitter clock signal
Another group we work with has a digitizer made by another company that apparently solves this issue by routing the clock though a VCO, which somehow stablizes the clock. However, after some consultation we are not convinced that is the real solution either, because the clock is supposed to be somewhat unstable in the first place, which is the issue we are trying to correct for (we are trying to avoid having to resample the data in software)

Max frequency of externally-clocked counter?

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