NI 6343 Internal DI Sample Clock counter name text string?

I need to add a frequency test to my remote site (remote debug). Could someone tell me the text string as counter name for NI 6343 Internal DI Sample Clock? Thanks.

Does your remote computer have MAX installed? This is the easiest way to see what the device alias is.
You can always just try Dev1 and see if it works. This is the default when the very first device is added to a system.
If you can deploy code to the remote system, you can also use the DevNames property of the System Node from the DAQmx System Setup palette. This will show you all of the names of the devices in the system and you should see your device there.

Similar Messages

Counter Output as Sample Clock of Digital Signals

I have a situation where I need to use a hardware counter as sample clock of digital output signals.
How do you specify the "Counter Internal Output" signal as a sample clock of digital output?
I want to do something like this:
// Create counter task
  CNiDAQmxTask m_Task(_T("ATask"));
  m_Task.COChannels.CreatePulseChannelTicks(_T("Dev1/ctr0"), "", _T("20MHzTimebase"), DAQmxCOPulseIdleStateLow, 0, 10, 10);
  m_Task.Triggers.StartTrigger.ConfigureDigitalEdgeTrigger("PFI0", DAQmxDigitalEdgeStartTriggerEdgeRising);
// Create digital output task
  CNiDAQmxTask m_Task2(_T("ATask2"));
  m_Task2.DOChannels.CreateChannel("Dev1/port0/line0", "", DAQmxOneChannelForAllLines);
  m_Task2.Timing.ConfigureSampleClock("XXXXXX", 0, DAQmxSampleClockActiveEdgeRising, DAQmxSampleQuantityModeFiniteSamples, 400);
How do I specificy "counter 0 Internal Output signal" instead of "XXXXXX" above, i.e. the sample clock of the digital output signal. Can't find the name of the signal anywhere in the documentation and help files. I have a 6259 DAQ board.
/pek

Thank you for your answers, but I can't get it to work.
When I use "ai/SampleClock" as sample clock everything works correct. When I try to use a counter as sample clock the task completes imediately, before any digital signals has been sent/measured. The task even completes before I have started the trigger, which is very confusing. No error appears.
I think that something is wrong about how I setup the counter. I use the code below:
// Create counter task
CNiDAQmxTask m_Task(_T("ATask"));
m_Task.COChannels.CreatePulseChannelTicks(_T("Dev1/ctr0"), "", _T("20MHzTimebase"), DAQmxCOPulseIdleStateLow, 0, 100, 100);
m_Task.Triggers.StartTrigger.ConfigureDigitalEdgeTrigger("PFI0", DAQmxDigitalEdgeStartTriggerEdgeRising);
// Create digital output task
// The code below works with "ai/SampleClock" as sample clock
CNiDAQmxTask m_Task3(_T("ATask3"));
m_Task3.DOChannels.CreateChannel("Dev1/port0/line0", "", DAQmxOneChannelForAllLines);
m_Task3.Timing.ConfigureSampleClock("Dev1/Ctr0InternalOutput" /*"ai/SampleClock"*/, 0, DAQmxSampleClockActiveEdgeRising, DAQmxSampleQuantityModeFiniteSamples, 400);
// Create samples
CNiUInt32Vector ui_data;
for(int i = 0; i < 200; i++)
for(unsigned int j = 0; j < 2; j++)
    ui_data.Append(j);
// Create digital writer
CNiDAQmxDigitalSingleChannelWriter m_writer3(m_Task3.Stream);
m_writer3.WriteMultiSamplePortAsync(true, ui_data);
// Wait until task completes
m_Task3.WaitUntilDone(-1);

Buffered event counting. Why can't I explicitly sequence generating the Sample Clock Pulse and reading the counters?

At irregular occasions I need to grab counts from several counters, and buffering the counts must be done simultaneously for all counters. I'm modeling my approach after zone.ni.com/devzone/cda/tut/p/id/5404 which someone kindly pointed out in an earlier thread. However, that example only uses one counter, and you can't test the synchronization with only one counter, so I am using two counters configured the same way, and they're wired to a single benchtop signal generator (for example at 300 kHz).
What I want to do, I can test in a loop with a somewhat random wait in it. I want to drive a hardware digital output line high for a few ms and then low again. The hardware line is physically connected to terminals for my timing vi's Sample Clock Source and so will cause them to buffer their counts for later reading. After I pulse this line, when I know new good buffered counts await me, I want to read both my counters. If their bufferings are simultaneous, then each counter will have counted the same number of additional counts since the last loop iteration, which I can check by subtracting the last value sitting in a shift register and then subtracting the two "additional counts" values and displaying this difference as "Diff". It should always be 0, or occasionally +1 followed immediately by -1, or else the reverse, because buffering and a count could happen practically at the same moment.
When I do this using a flat sequence to control the relative timing of these steps, so the read happens after the pulse, the counters often time out and everything dies. The lengths of time before, during, and after the pulse, and the timeout value for the read vi, and the size of the buffer and various other things, don't seem to change this, even if I make things so long I could do the counting myself holding a clipboard as my buffer. I've attached AfterPulse.vi to illustrate this. If I get 3 or 10 or so iterations before it dies, I observe Diff = 0; at least that much is good.
When I use two flat sequences running in parallel inside my test loop, one to control the pulse timing, and the other to read the counters and do things with their results, it seems to work. In fact, Diff is always 0 or very occasionally the +/- 1 sequence. But in this case there is nothing controlling the relative timing such that the counters only get read after the pulse fires, though the results seem to show that this is true. I think the reads should be indeterminate with respect to the pulses, which would be unreliable. I don't know why it's working and can't expect it to work in other environments, can I? Moreover, if I set some of the pulse timing numbers to 1 or 2 or 5 ms, timeouts start happening again, too. So I think I have a workaround that I don't understand, shouldn't work, and shouldn't be trusted. See SeparateSequence.vi for this one.
I also tried other versions of the well-defined, single sequence vi, moving the counter reads to different sequence frames so that they occur with the Sample Clock Source's rising edge, or while it is high, or with the falling edge, and they also often time out. I'll post these if anyone likes but can't post now due to the attachment limit.
Here's an odd, unexpected observation: I have to sequence the reads of the counters to occur before I use the results I read, or else many of the cycles of this combine a new count from one counter with the one-back count from the other counter, and Diff takes on values like the number of counts in a loop. I though the dataflow principle would dictate that current values would get used, but apparently not so. Sequencing the calculations to happen after the reads fixes this. Any idea why?
So, why am I not succeeding in taking proper control of the sequence of these events?
Thanks!!!
Attachments:
AfterPulse.vi ‏51 KB
InSeparateSequence.vi ‏49 KB

Kevin, thanks for all the work.
>Have you run with the little execution highlighting lightbulb on? -Yes. In versions of this where there is no enforced timing between the counter and the digital line, and there's a delay inserted before the digital line, it works. There are nearly simultaneous starts on two tracks. Execution proceeds directly along the task wire to the counter. Meanwhile, the execution along the task wire to the digital high gets delayed. Then, when the digital high fires, the counter completes its task, and execution proceeds downstream from the counter. Note, I do have to set the timeout on the counter longer, because the vi runs so slowly when it's painting its progress along the wires. If there is any timing relationship enforced between the counter and the digital transition, it doesn't work. It appears to me that to read a counter, you have to ask it for a result, then drive the line high, and then receive the result, and execution inside the counter has to be ongoing during the rising line edge.
>from what I remember, there isn't much to it. There really aren't many candidate places for trouble. A pulse is generated with DIO, then a single sample is read from each counter. -Yup, you got it. This should be trivial.
>A timeout means either that the pulse isn't generated or that the counter tasks don't receive it. - Or it could mean that the counter task must be in the middle of executing when the rising edge of the pulse arrives. Certainly the highlighted execution indicates that. Making a broken vi run by cutting the error wires that sequence the counter read relative to the pulse also seems to support that.
>Have you verified that the digital pulse happens using a scope? -Verified in some versions by running another loop watching a digital input, and lighting an indicator, or recording how many times the line goes high, etc. Also, in your vi, with highlighting, if I delete the error wire from the last digital output to the first counter to allow parallel execution, I see the counter execution start before the rising edge, and complete when the line high vi executes. Also, if I use separate loops to drive the line high and to read the counter, it works (see TwoLoops.vi or see the screenshot of the block diagram attached below so you don't need a LV box). I could go sign out a scope, but think it's obvious the line is pulsing given that all these things work.
>Wait! I think that's it! If I recall correctly, you're generating the digital pulse on port0/line0... On a 6259, the lines of port 0 are only for correlated DIO and do not map to PFI. -But I'm not using internal connections, I actually physically wired P0L1 (pin 66) to PFI0 (pin 73). It was port0/line1, by the way. And when running some of these vi's, I also physically jumper this connection to port0/line2 as an analog input to watch it. And, again, the pulse does cause the counter to operate, so it clearly connects - it just doesn't operate the way I think it is described operating.
For what it's worth, there's another mystery. Some of the docs seem to say that the pulse has to be applied to the counter gate terminal, rather than to the line associated with the sample clock source on the timing vi. I have tried combinations of counter gate and or sample clock source and concluded it seems like the sample clock source is the terminal that matters, and it's what I'm using lately, but for example the document I cited, "Buffered Event Counting", from last September, says "It uses both the source and gate of a counter for its operation. The active edges on the gate of a counter is used to latch the current count register value in a hardware register which is then transferred via Direct Memory Access...". I may go a round of trying those combinations with the latest vi's we've discussed.
Attachments:
NestedSequences.png ‏26 KB

Using AI Sample Clock to Trigger Counter Samples

My basic question is: Is the ai\SampleClock signal only active while an analog input task is running?
The details are:
I have an X-series PCIe-6321 multifunction DAQ card. It is controlling a SCXI chassis and has a SCXI-1180 and SCXI-1302 so I can control analog inputs of the chassis as well as access the 4 counter on the card. My application requires that I use all 4 counters to measure a frequency input signal and synchronize the samples to the analog input signals. I have created 5 tasks, 1 for the AI and 1 for each counter.
I am using LabVIEW 8.6.1 with the latest NI-DAQ drivers on and 64-bit Vista OS
1. Are there any driver or hardware restrictions that would cause this solution not to work?
2. Can I use the ai\SampleClock as in input sample clock for each of the frequency tasks? If I do this will the sampling start be syncronized? I.e. if I start each of the frequency tasks first, will they wait until the AI task is started before they start sampling?
3. If that doesn't work, do I need to route the sample clock from the AI task to a PFI line (PFI1) and then use that as input to the frequency task sample clock?
I usually do option 3 when synchronizing two cards in PXI chassis and only use the software task start in stead of of synchronizing on a digital start, since the sample clock will control the samples anyway. I need to know if the same behaviour works with the scenario above.
Thanks,
Bob
Prolucid Technolgies Inc.
Solved!
Go to Solution.

Hi Bob,
I can confirm that the ai/SampleClock will only be active while the AI task is running. As far as the other questions go:
1. You'd have to provide more information about what you looking to do exactly, but there is no problem with routing the sample clock of the Analog Input task to be used with the Counters. I would read through the section of the X Series User Manual that discusses sample-clocked frequency measurements (starting on page 7-16) for some more information about what is actually going on during this configuration to make sure it suits your requirements.
The frequency of the signal to be measured should be at least twice as fast as the sample clock of your AI task.
2. You can indeed route the signal to all four tasks at the same time (you can refer to the Device Routes page in MAX to double-check routing restrictions). The sampling will be synchronized provided the four counters are started before the AI task, but the counters will be armed at different times unless you configure an Arm Start Trigger (see page 7-45 of the X Series User Manual). I would consider using the ai/StartTrigger if you wish to do this.
The effect of not arming the counters at the same time would be a different number of periods to average on each counter for the very first sample (assuming averaging is enabled). This might not be a big concern but I just wanted to point it out.
3. The routes are available internal to the board so external routing isn't necessary, you can just specify to use the AI Sample clock for the clock of each counter and the routes will be made for you. If you prefer to export the signal on a PFI line and route it back in on a different PFI line this option is also available to you but shouldn't be necessary.
I hope this helps you get started. I'd make sure to take a look at chapter 7 of the X Series User Manual if you get a chance since it describes how all of the counter configurations work in more detail. If you have any related questions don't hesitate to post back.
Best Regards,
John
Message Edited by John P on 12-01-2009 07:52 PM
John Passiak

NI PCIe-6351 Count Edges Channel error on fast TTL - Multiple Sample Clock pulses were detected

Hello,
I am trying to use a PCIe-6351 to record the arrival times of a fast TTL pulse stream (generated by an Excilitas/Elmer Perkin APD). The TTL pulses are 2.5 volt amplitude, 20 ns duration, with a gauranteed dead time of 50 ns between pulses. I am trying to use the the Count Edges function, with the 100MhzTimebase as the input terminal and the input to counter 0 (PFI8) as the sample clock. After a few seconds of acquiring data at 100 Mhz, the application throws the following error (-201314):
"Multiple Sample Clock pulses were detected within one period of the input signal"
I had thought that because there is 50 ns dead time between pulses, multiple pulses would never arrive within a single clock cycle of the 100 Mhz timebase. Is there any way this might not be the case? Alternatively, is it possible that the counter is triggering on some jitter around the edges of the pulses? If so, is there any way to filter such high frequencies without losing the 20 ns pulses?
I have read through the forums for similar problems with photon detectors, but have not been able to resolve this issue. Thank you for the help.
Matthew Bakalar

It sounds like the input signal is being detected as multiple edges.
The PFI filtering feature on the X Series card likely isn't going to be suitable for you. The minimum setting is actually exactly 20 ns, which should in theory guarantee a 20 ns pulse passing through. However, if the signal is high for anything less than that there wouldn't be a guarantee (depending on the phase of the timebase relative to the rising edge of the signal)--considering rise times and that there is evidently a glitch in the signal itself, it probably isn't actually a continuous 20 ns high time by the time the DAQ card sees it.
What you should do instead:
Configure a second counter as a retriggerable counter output (single pulse).
Use your external signal as the start trigger for this counter output task.
Set the initial delay, high time, and low time for the counter output task all to 20 ns (the minimum).
Use the internal output of the counter output task as the sample clock source for the original edge count task.
The counter output will be triggered when it sees the external signal, wait 10-20 ns, then generate a 20 ns pulse. If there is a glitch on the trigger line during this 30-40 ns that the output is generating, it will be ignored. The counter output will be re-armed in time for the next pulse given the minimum dead time of 50 ns between pulses.
Best Regards,
John Passiak

Using a Counter to error-check External Sample Clock

Hi all,
I am newish to labview and am working on a data acquisition project. I've managed to get the basics under control, but here's my situation and question...
-- I am using the S-6123 card to capture and record data on two or more AI channels. I am using a rotary encoder to generate a pulsetrain that I am using via PFI0 as the sample clock for recording the AI data.
-- This rotary encoder gives 720 pulses per revolution and an index pulse once per revolution.
-- In my data acquisition, I am pulling 1440 samples at a time with the DAQmx "read" function.
I have been experimenting with counters and can get the RPM out of the pulse trains well enough, however I was wondering...
Is there some way to use the 2 counters on the card (and signal routing of the two pulse trains) to double-check that the 1440 samples I take correspond to two exact revolutions, and that I'm not getting ahead of or behind the rotation of the encoder due to missing clock pulses or reading false pulses. I have a couple of ideas on how to attempt to do it, but to me they don't seem very reliable or efficient, so I thought I'd put it to the experts to point out of there is a more obvious way of doing it.
I have attached a pdf of the specifications of the encoder family, the pulses that will be output are on the right hand side of page 2.
With many thanks in advance,
Peter
Message Edited by mumech on 07-22-2008 01:05 AM
Attachments:
REncoder Specs.pdf ‏312 KB

Thanks very much for your reply. I had come across the use of counters with angular encoders but hadn't quite thought of the concept in this way.
I will have to experiment a bit over the next day or to see what this is capable of, the examples seem quite comprehensive, however I'm not sure if I will run into issues due to the fact that I am using the rotary encoder as the sample clock for my analogue data.
Would I indeed be able to compare these values (ideally check the position of the encoder after each set of data acquisition) without a "third party" sample clock common to both? (which isn't appropriate for this application)
If I was only running at low speeds, I might be able to implement this by simply checking the position of the encoder after each read of the data. However, at higher speeds there might be synchronization issues due to the buffering of the analogue data. So when getting the measurement from the encoder counter chances are the analogue data was acquired at an earlier time.
I know I haven't worded this very well, but how might I synchronise this error checking method?

Implicit counter and sample clock together

Hi,
I am using Labview with a NI DAQPad-6015 to measure temperatures (4 thermocouple channels) and control via a duty cycle (at constant pulse frequency).
The VI I built contains a sample clock for setting measurement rate and an implicit timer to drive the "pulse frequency counter output".
In this way, the measurement rate is slowed by the implicit timer (I guess, as the measurement VI alone runs with the properly timing).
How to overcome this matter?
Thanks in advance
Gianluca

here is the VI I built for acquisition and control.
The bottom loop acquires and sends signals, while the top loop averages measurements and write all into a file.
Freq_duty_cycle.vi allows me to change on the fly both frequency and duty cycle of pulse.
HBridge.vi is the control for a H bridge I drive to invert current direction to a load.
Attachments:
HBridge.vi ‏12 KB
temp_acq_4channels_peltier_control_Hbridge.vi ‏71 KB
Freq_duty_cycle.vi ‏14 KB

6036 E-Series AI Internal Sample Clock

I have a 6036 E-Series board and am implementing the DAQmx Analog Input. I want to use the Internal Sample Clock
instead of software timing. I've reviewed and tried to run the examples provided, but only the software timed routines
function. All of the Internal Clock routines sit and wait for the timeout to occur. Any help would be appreciated.

Hello TonP,
The code is directly from Labview 7Express "NI Example Finder", search: DAQmx Analog Input Voltage,
->Continuous Acq&Chart Samples-Int Clock.vi (filtered for 6036 E -series)-see attached cut 'n pastes.
I do NOT want to use an External Clock or Software timing. This AI routine is part of a larger picture of AI, AO, DIO
and Counters to be implemented in a large VI and eventually synch'd together (for later). I've tried all related Int Clock
examples, with same timeout result. It's as-if the Int Clock is not being addressed. Is this the same Int Clock that
AI Traditional uses? Is there only one clock? Do AI, AO, DIO use/rely on same clock? Do I need to address a specific
clock or is it automatically implied? Oh yes, this is PCMCIA.
Attachments:
DAQmx AI Voltage.jpg ‏101 KB

Using an internal sample clock with a digital input

I am using an encoder to measure angle and velocity. The example that I have started with is here. https://decibel.ni.com/content/docs/DOC-6834. The problem I am having is with the Sample clock, I get a timeout at the DAQmx read. If I remove the sample clock the VI runs fine, but I have no idea of my sample rate. Below is the the problem setup with the Sample clock inline.
Attachments:
encoder with timer.JPG ‏50 KB

Hi there, a couple suggestions: first , this is a post that it is suppose to be on the DAQ board. Second, you are not being clear about the error, try to include the error code, description and its location, is it coming out of the channel node or the timing VI? Also what hardware are you using?
Now, If you open the example called "Measure Angular Position.vi" from the NI example finder, drill the DAQmx Create Channel, you will see that you are missing a couple terminals for the task configuration, I wonder if this is part of the error.
Alejandro | Academic Program Engineer | National Instruments

NI6602 pulse width measurement: Do I have to use an external sample clock?

Hi
In the .NET 4 example 'MeasPulseWidthBuf_SmplClk_Cont' it is stated in the comments that:
An external sample clock must be used.
Counters do not have an internal sample clock available. You can use
the Gen Dig Pulse Train-Continuous example to generate a pulse train on
another counter and connect it to the Sample Clock Source you are using
in this example.
I have an application running without specifying an external clock. The applications is running, but I'm not sure I can trust the recorded data. Here is the channel creation code:
   task.CIChannels.CreatePulseWidthChannel(readTaskCounter,
   "ReadPulswidthTask", 25e-9, 20e-6,
   CIPulseWidthStartingEdge.Rising,
CIPulseWidthUnits.Seconds);
task.CIChannels.All.DataTransferMechanism = CIDataTransferMechanism.Dma;
   task.Stream.Timeout = callbackTimeoutInMilliSeconds;
task.Stream.Buffer.InputBufferSize = 50000;
   task.SynchronizeCallbacks = true;
   task.Timing.ConfigureImplicit(SampleQuantityMode.ContinuousSamples);
   task.Control(TaskAction.Verify);
Note that I'm not specifying any external clock.
1) Which clock is the daq using? -It is obviously using some clock since I can collect data via this task.
2) Do I need to change the configuration to use an external clock to achieve reliable readings - as mentioned in the 'MeasPulseWidthBuf_SmplClk_Cont' example?
/mola
Solved!
Go to Solution.

Hi mola,
That specific example is for sample-clocked pulse width measurements. This type of measurement is only supported on newer hardware such as X Series boards and will not run on the 6602.
Your application that you linked uses Implicit timing, meaning that the signal itself serves as the sample clock. That is, at the end of each pulse width that you measure, the sample is deterministically latched in. So, you end up with a buffered array of every pulse width that is seen by the counter.
Best Regards,
John Passiak

Can buffered digital edge detection only be performed using an external sample clock?

I am working on an application where I need to measure the speed (rpm) of a motor as it starts up using the output of its built in hall effect sensor. The sensor should output 2 pulses per revolution of the motor. My plan is to count the pulses from when the counter (counter 1) is armed to when it is up to speed. Looking at the M series manual, the CVI (v8.5.1) help, and the examples it appears that this can only be done using an external sample clock. Is there a way to route an internal sample clock to the appropriate terminal on the counter so that I do not need to add additional hardware?
I am currently using a PCI-6289, but the final application will use a CDaq-9188 chassis (using one of the the built in 32-bit counters).
Thank you for your assistance.

Thank you for your input.
However, I did forget to mention one detail of the application. I need to buffer the edge counts so that I can graph the speed of the motor as it starts up. I need to be able to acquire the edge counts at reqular intervals so that I can determine how fast the motor was rotating at each point. So far I have not been able to find an example of doing this without and external sample clock. As I mentioned, in the final application I will be using the 32-bit counters on a CDAQ-9188 chassis. The only thing I can think of at this point is to generate a pulse out of the second counter and use that as the sample clock. Will this work?

Dynamic Internal Table with the same name

Hey Guys
I have a question.
I know that we can create dynamic internal table taking a struct dynamically.
But I have 2 ques on the same subject.
1. Can we create an internal table based on a type that we have locally declared eg
types: begin of ty_demo.
           var1(1) type c,
           var2     type p,
          end of ty_demo.
2. If an internal table is already declared based on the above type say data: i_tab type standard table of ty_demo.
    If i need to enhance the struct of this internal table. Can i do that by dynamically redefining it based on a different structure but keepin the same name i_tab.
In a nut shell I cannot change the name of my itab but I want to enhance the structure.
I Hope I am clear.
Help will be greatly apprcieated.
Thanks
Sameer

hai.
we can create an internal table based on a type that we have locally declared, but you have to use data instead of types like.
data: begin of ty_demo.
var1(1) type c,
var2 type p,
end of ty_demo.
check the example notes for dynamic itab .
Dynamic internal table is internal table that we create on the fly with flexible column numbers.
For sample code, please look at this code tutorial. Hopefully it can help you
Check this link:
http://www.****************/Tutorials/ABAP/DynamicInternaltable/DynamicInternalTable.htm
Sample code:
DATA: l_cnt(2) TYPE n,
l_cnt1(3) TYPE n,
l_nam(12),
l_con(18) TYPE c,
l_con1(18) TYPE c,
lf_mat TYPE matnr.
SORT it_bom_expl BY bom_comp bom_mat level.
CLEAR: l_cnt1, <fs_dyn_wa>.
Looping the component internal table
LOOP AT it_bom_expl INTO gf_it_bom_expl.
CLEAR: l_cnt1.
AT NEW bom_comp.
CLEAR: l_cnt, <fs_dyn_wa>, lf_mat.
For every new bom component the material data is moved to
temp material table which will be used for assigning the levels
checking the count
it_mat_temp[] = it_mat[].
Component data is been assigned to the field symbol which is checked
against the field of dynamic internal table and the value of the
component number is been passed to the dynamic internal table field
value.
ASSIGN COMPONENT c_comp_list OF STRUCTURE <fs_dyn_wa> TO
<fs_check>.
<fs_check> = gf_it_bom_expl-bom_comp.
ENDAT.
AT NEW bom_mat.
CLEAR l_con.
ENDAT.
lf_mat = gf_it_bom_expl-bom_mat.
Looping the temp internal table and looping the dynamic internal table
*by reading line by line into workarea, the materialxxn is been assigned
to field symbol which will be checked and used.
LOOP AT it_mat_temp.
l_nam = c_mat.
l_cnt1 = l_cnt1 + 1.
CONCATENATE l_nam l_cnt1 INTO l_nam.
LOOP AT <fs_dyn_table2> ASSIGNING <fs_dyn_wa2>.
ASSIGN COMPONENT l_nam OF STRUCTURE <fs_dyn_wa2> TO <fs_xy>.
ENDLOOP.
IF <fs_xy> = lf_mat.
CLEAR lf_mat.
l_con1 = l_con.
ENDIF.
Checking whether the material exists for a component and if so it is
been assigned to the field symbol which is checked against the field
of dynamic internal table and the level of the component number
against material is been passed to the dynamic internal table field
value.
IF <fs_xy> = gf_it_bom_expl-bom_mat.
ASSIGN COMPONENT l_nam OF STRUCTURE <fs_dyn_wa> TO <fs_check>.
CLEAR l_con.
MOVE gf_it_bom_expl-level TO l_con.
CONCATENATE c_val_l l_con INTO l_con.
CONDENSE l_con NO-GAPS.
IF l_con1 NE space.
CONCATENATE l_con1 l_con INTO l_con SEPARATED BY c_comma.
CLEAR l_con1.
l_cnt = l_cnt - 1.
ENDIF.
<fs_check> = l_con.
l_cnt = l_cnt + 1.
ENDIF.
ENDLOOP.
AT END OF bom_comp.
At end of every new bom component the count is moved to the field
symbol which is checked against the field of dynamic internal table
and the count is been passed to the dynamic internal table field
value.
ASSIGN COMPONENT c_count OF STRUCTURE <fs_dyn_wa> TO <fs_check>.
<fs_check> = l_cnt.
INSERT <fs_dyn_wa> INTO TABLE <fs_dyn_table>.
ENDAT.
ENDLOOP.
regards.
sowjanya.b

Unable to use sample clock digital filter - PCI6602

I can't seem to get digital filtering of the sample clock to work on my PCI6602. I'm using DAQmx 7.4, with one of the counters configured for buffered-edge counting. Whenever I try to configure digital filtering on the sample clock (coming in on pfi10):
counterTask.Timing.SampleClockDigitalFilterEnable = true;
counterTask.Timing.SampleClockDigitalFilterMinimumPulseWidth = 0.000005;
I get the following error message when I start the task:
Additional information: Digital filtering is not available for the given terminal.
Device: Dev3
Property: NationalInstruments.DAQmx.Timing.SampleClockSource
Corresponding Value: /dev3/pfi10
Channel Name: phaseLockOscillator
Task Name: PhaseLock task
Status Code: -200772
I thought digital filtering was supported on all pfi inputs on the 6602 - so can anybody give me a hint as to what I'm doing wrong !?
Many thanks in advance,
Jony Hudson

I have the same problem with the PCI-6280., help me please!

Sample Clocked Buffered Frequency Measurement

I have a circuit board clock which I want to test. The clock should output at ~12 MHz. I'm using a USB-6343 and would like to use the Sample Clocked Buffered Frequency Measurement mentioned in the X series manual but am unclear on how to set it up. I believe I need an external clock but am not sure if I can use this card to generate this clock and what rate I should use; but more generally I'm looking for an example on how to set up this measurement in LabVIEW using DAQmx.
In the end I'd like to get an accurate average measurement of the clock frequency over ~1 second if possible and am willing to use whatever method would best work with the 6343 card.
Thanks in advance

Hi Gollum,
There's a few examples that you could take a look at that come packaged with LabVIEW. If you open the NI Example Finder (Help » Find Examples), then in the Browse tab click the following: Hardware Input and Output » DAQmx » Counter Input. In there we have a few examples on how to read in the frequency using DAQmx calls. The property that is mentioned in the Sample Clocked Buffered Frequency Measurement (CI.Freq.EnableAveraging) can be located using the following method:
In LabVIEW go to View » Class Browser, when the Class Browser window open, for Object Library choose DAQmx and for Class choose DAQmx Channel. In Properties & Methods expand the following: Properties » Counter Input » Frequency » Measurement Specifications » Enable Averaging. The Class Browser can be used to find several property nodes, and is very useful. You can play around and find various properties that can be changed in there.
Hopefully this helps.
Matt S.
Industrial Communications Product Support Engineer
National Instruments

Number of samples read is not equal to number of AI Sample Clock pulses - why?

Dear Community,
I am using several PXI-4472s for acquisition and at the same time I am routing the AI Sample Clock signal to a PXI-6608 counter/timer card so that I can time stamp each sample.
Unfortunately I am finding that I always get more AI Sample Clock pulses than samples, so I don't know which time stamp corresponds to which sample. Why is that?
For acquisition I am using something very much like the following DAQmx Sync and Stream example:
Sync and Stream.vi
After stopping the tasks, I use DAQmx Read vi again to read whatever samples might be left in the buffer, but that request always comes back empty. I can't figure out if there are AI Sample Clock pulses at the beginning of the task that don't actually acquire any data, or if I have data left over in the buffer after I stop the task that I am not reading properly.
Any help would be greatly appreciated!
Cas

Cas,
DSA boards (like the 4472) differ from standard DAQ devices. While most DAQ devices use a relatively common type of ADC known as a sequential approximation ADC, a DSA device uses a more specialized ADC known as a Delta-Sigma ADC for its measurements. Delta-Sigma ADCs allow for very precise measurements, and this precision is accomplished by oversampling (frequently 128x or 256x the sampling rate that is being used).
The above is a very brief explanation of the DSA board's inner workings. It is discussed in more detail in the document linked below. If after reading that tutorial, you still have questions, please post back so that this forum can assist you.
Synchronization with Dynamic Signal Acquistion (DSA) Products with DAQmx
Best of luck with your application.
Regards,
Jed R.
Applications Engineer
National Instruments

NI 6343 Internal DI Sample Clock counter name text string?

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