Pause the counter output in DAQmx

Hi~
I used two counters output on PCI-6602 card in LV7.1 to generate a PWM to control the velocity of two motors that control the position of mechanism.(Encoder was set on the motor.)
When I set the same duty cycle in two counters, the position of two mechanisms were different(Two mechanisms were the same),that means one velocity of motor was fast, the other was slow.
May I pause the counter output of the fast motor to wait the slow motor??
====================
●LV Version：LabVIEW7.1
●OS：WindowsXP(SP1)
●Hardware：PCI-7344, PCI-6602, PCMCIA 6024E

Assuming you're using DAQmx, you can set up a Pause Trigger for each of the counters. (A similar function can be done in traditional NI-DAQ too). You could, for example, configure 2 different digital bits to be used to pause the 2 PWM counters independently. The way 'Pause Triggering' works is that the counter's pulsetrain only goes to the output pin when the pause trigger signal is in the correct logic state. This can be set to be low or high by programming.
You may also want to characterize the speed difference of your actuators, and give them correspondingly proportional PWM duty cycles. That would do a better job of keeping them in sync throughout the motion.
A feedback signal would give you even better options for control.
-Kevin P.

Similar Messages

Setting the counter output mastertimebase divider?

Hello
I want to output single short pulses with varying pauses. My MuFu DAQ card has 20 MHz master clock rate and 24 bit counter (Good ol'6052E). When I try to output 1 µs with a pause duration of more than 839 ms, I get an error due to mismatch of clockrate and counter bit size with short and long duration. This is explained in great detail in the corresponding help:
2/ counter clock rate <= X <= 2^24 / counter clock rate. with counter clock rate = master clock rate / divider
0.1 µs <= X <= 16777215 / 20Mhz = 839 ms
I could strech my limits by manually setting the CO.CounterTimebaseMasterTimebaseDivider to 10. But I've searched all property nodes I could find but I have not found this property.
Does anyone know where it is hidden, and to which values it can be set?
Thank you
Michael

Hi Michael,
Unfortunately that property doesn't exist. There are a few "Divisor" properties available for other subsystems (e.g. see Analog Input timing block diagram below).
However, you'll notice in the above diagram that the valid divisors of the master timebase are only 1 or 200 (which then gives the AI Sample Clock Timebase). You can get similar behavior on the counter by specifying to use the 20 MHz timebase or 100 kHz timebase for your source. However, using the 100 kHz (1/10 us) timebase is going to prevent you from properly generating the narrow 1 us pulses that you require.
So, you can use 20 MHz or 100 kHz without any additional resources, but 100 kHz wouldn't allow you to have a 1 us pulse, and 20 MHz won't let you have a high or low time of greater than ~839 ms. You could generate frequencies in between these to use as the counter timebase (either use the frequency output or use the second counter to generate the desired frequency, or perhaps configure a dummy analog task) but of course there would always be a tradeoff between the resolution of the pulse and the maximum time between pulses.
If you do have the 2nd counter available, here is my suggestion to get the best of both worlds:
1. Configure a counter output to generate a pulse every N seconds (I suggest configuring the output to generate at 1/N frequency at 50% duty cycle). When you configure this counter, DAQmx will choose an appropriate timebase for you. When N is less than ~1.67 seconds, DAQmx will use the 20 MHz timebase (since both the high and low time would be under the 839 ms). When N is > 1.67 seconds but below ~335 seconds, DAQmx will use the 100 kHz timebase. If you intend on modifying the rate of the output (to something above 1.67 seconds) after the task has started you would need to make sure to specify to use the 100 kHz timebase rather than relying on the DAQmx default. You can't use a built-in timebase if you want to generate a delay greater than 335 seconds, but if you wanted to you could handle this case by checking for it and configuring the frequency output to generate an even lower timebase.
2. To generate the actual output signal, configure a retriggerable single pulse generation to be triggered off of the signal generated above. This signal will be based off of the 20 MHz timebase (assuming you configure a pulse width less than ~839 ms) and so will give you a good resolution on the available pulse widths that you can generate.
In summary, doing this would let you decouple the resolution of your generated pulse width from the resolution of the delay between the pulses. The downside is that it uses two counters.
The other option which I previously mentioned (and what you were asking about) would be to find a timebase that meets the two requirements: 1) fast enough to generate a narrow pulse and 2) slow enough to not roll-over between pulses. You have 100 kHz and 20 MHz available to you, but you can generate intermediate frequencies using the frequency output. If you plan on using a counter to generate the timebase instead, you should consider the other option which decouples the two counters.
Of course, using a device with a higher counter resolution (most newer DAQ devices use 32-bit counters) would probably also resolve your issue depending on the full range of delays that you need. The downside here is the cost of new hardware.
Best Regards,
John Passiak

The counter output is not a smooth increment, it looks like a stairway

I am trying to smooth out the rpm reading from my counter 0 on a PCI-MIO-16E-4 daqboard. When I increase or decrease the speed, to 0 RPM it looks like a stairway going up and down.

It sounds like a discretization effect that can arise if you figure RPM by counting edges and dividing by the sampling period.
For example, suppose your sampling period is 0.010 sec (100 hz sampling rate). Your edge count can only change by discrete integer amounts each sampling period. The change may be 0,1,2,3,... counts leading to calculated frequencies of 0.100,200,300,... hz. But you will only ever see these discrete values, hence the stair-stepping effect when you accel or decel your device.
Odds are you can get much more precision using the buffered period measurement technique -- though you'll also likely get substantially more data to handle. In this method, you'll use the high-frequency internal timebase (20 MHz) to measu
re the intervals between your device's pulses.
For example, suppose your device pulses at 1250 hz. Each interval will measure 16000 cycles of the 20 Mhz timebase. Now if you have an off-by-one discretization error, you'll get 16001 cycles in an interval for a measurement of 1249.92 hz.
There's a really good tutorial about frequency measurement error posted here.
-Kevin P.

Counter Output/Counter Input PXI Signals Behaving Erratically

Question for all your LabVIEW guru's out there,
I am running a frequency loopback test using the NI PXI 6229 MIO DAQ card. I am generating a "Counter Output" pulse train signal which feeds through my device under test and then back out of my device under test and back into the PXI 6229 for a "Counter Input" frequency measurement. Both the "Counter Output" and the "Counter Input" are assigned different PFI lines using DAQmx in LabVIEW.
I have 4 lines to test on my DUT. All four lines run this same frequency measurement but with different PFI lines on the PXI 6229. Each line is test independently.
This is my setup for the 4 lines:
Path 1: P2.0 (Counter Output - Pulse Train) -> DUT (Device Under Test) -> P2.1 (Counter Input - Frequency Measurement)
Path 2: P2.2 (Counter Output - Pulse Train) -> DUT (Device Under Test) -> P2.3 (Counter Input - Frequency Measurement)
Path 3: P2.4 (Counter Output - Pulse Train) -> DUT (Device Under Test) -> P2.5 (Counter Input - Frequency Measurement)
Path 4: P2.6 (Counter Output - Pulse Train) -> DUT (Device Under Test) -> P2.7 (Counter Input - Frequency Measurement)
where:
P2.0 = PFI8
P2.1 = PFI9
P2.2 = PFI10
P2.3 = PFI11
P2.4 = PFI12
P2.5 = PFI13
P2.6 = PFI14
P2.7 = PFI15
I have a LabVIEW VI which generates the "Counter Output" and reads the "Counter Input" frequency. I am seeing weird behavior from the PXI 6229 card. I can test "Path 1" and "Path 2" and the frequency I read is what I generated. No issue there. However, when I test "Path 3" and "Path 4" the frequency measurement is erratic. The readings are two different frequencies repeated over and over again and none of those frequencies are the expected frequency which was generated out of the "Counter Output." If I reset the card, and start by testing "Path 3" and "Path 4" the frequency readings are correct and the erratic behavior is gone. However, when I try to then test "Path 2" and "Path 1" now those lines have the erratic frequency issue. I can continue resetting the card and see same issue. The PFI lines that I test first will always pass.
To summarize:
Steps Taken:
1. Test Path 1 = SUCCESS
2. Test Path 2 = SUCCESS
3. Test Path 3 = Erratic Frequency (Two Frequencies repeated over and over again in my frequency results array)
4. Test Path 4 = Erratic Frequency (Two Frequencies repeated over and over again in my frequency results array)
5. Reset the PXI 6229 Card
6. Test Path 3 = SUCCESS
7. Test Path 4 = SUCCESS
8. Test Path 3 = Erratic Frequency (Two Frequencies repeated over and over again in my frequency results array)
9. Test Path 4 = Erratic Frequency (Two Frequencies repeated over and over again in my frequency results array)
I am wondering if Port 2 (P2.0-P2.7) on the 6229 card has certain dependecies and this is why I am seeing issues. I am trying to get around this issue so that I don't have to always reset the card.
Are P2.0-P2.3 (PFI8-PFI11) and P2.4-P2.7 (PFI12-PFI15) treated differently or require different setup? How do I resolve this issue?
Thanks so much!

I have a theory...
The DAQ card follows a policy called "lazy uncommit" wherein the terminal used for the output will continue to be connected to the counter even after the task has completed (until the terminal is needed for something else). So as you run more tests, the counter output will end up driving more lines. This behavior should be easy enough to confirm.
As the DAQ card drives more lines, I'd imagine this affects the actual signal. You could scope it to check, but it sounds like either the rise/fall times are becoming longer or some extra noise is being introduced on the line.
The readings are two different frequencies repeated over and over again and none of those frequencies are the expected frequency which was generated out of the "Counter Output."
This implies you are picking up an extra edge during transitions--this isn't too uncommon if the signal is noisy since there is no built-in hysteresis on the DAQ card. I would expect the measured frequencies to have periods that sum to either the full period or the semi-period of your actual signal (depending on how many duplicate edges are detected).
Suggestions are as follows:
To stop the DAQ card from driving multiple PFI lines, it would probably be easiest to just programmatically reset the device in between your tests (using DAQmx Reset Device). If you can't reset the device (e.g. because you are running some other task that can't be interrupted) then you can instead configure a dummy task that uses the PFI line in question as an input.
To stop the DAQ card from picking up multiple edges during transitions, you should configure a digital filter on the input terminals. If you reset the device it sounds like this might not be necessary... it's up to you if you want to configure this or not.
Best Regards,
John Passiak

How to filter starttrigger on counter output precisely

HW PCI6602
Measurement studio 2008 (C#)NI-DAQmx 9.02I’m trying to trig a camera using the output from a counter.
The camera should be trigged when the counter input pulse width is larger than approx (filterPulseWidth 10us).To do this a have set up the following tasktask.COChannels.CreatePulseChannelTime(counter, "TriggerTaskChannel", COPulseTimeUnits.Seconds, COPulseIdleState.Low, 0, 80E-6, 0.007); task.Triggers.StartTrigger.Type = StartTriggerType.DigitalEdge; task.Triggers.StartTrigger.DigitalEdge.Edge = DigitalEdgeStartTriggerEdge.Rising; task.Triggers.StartTrigger.Retriggerable = true;task.Triggers.StartTrigger.DigitalEdge.DigitalFilterMinimumPulseWidth = filterPulseWidth; task.Triggers.StartTrigger.DigitalEdge.DigitalFilterEnable = true;Unfortunatly this filter has the following behaviour”If the period of the filter clock timebase is tfltrclk, this filter guarantees topass pulse widths that are 2*tfltrclk or longer and to block pulse widths thatare tfltrclk or shorter. A pulse with a width between these two ranges may ormay not pass, depending on the phase of the pulse with respect to the filterclock timebase”.It means that I have no sharp distinction on my filter as one would when applying a filter to an ordinary pulse width measuring task. Implementing this with via the software in a callback is to slow.The bottom line is that I would like to generate a pulse on my counter output when the trigger/counter input is greater than say 10us. The output pulse could be predetermind as in the sample code above or as long as the filtered input (I.e counter just pass filtered input to my output).How can this be done? BR
Jongas
Solved!
Go to Solution.

Hi Jongas,
Is it OK if the trigger is sent once the pulse hits 10 us, rather than
on the exact falling edge? I'll assume the exact timing isn't as important, but you would like the trigger to occur very close to the falling edge (within a couple of us). The important thing is that we trigger as close as possible to when the PWM has hit 50% duty cycle.
Some brainstorming:
Digital Filtering on the 660x Isn't the Best for This:
Digital filtering might not be as practical here on your 6602 due to the region of uncertainty between 5 and 10 (or 10 and 20) us pulses. The TIO boards count two consecutive edges of a filter clock to determine when to pass a signal through so the guaranteed rejected pulse width is always half of your guaranteed passed pulse width (providing an external filter clock timebase that is synchronized with your external signal could potentially reduce this uncertainty but I honestly haven't tried this before and I would imagine it is not going to be very straightforward).
X Series Alternative:
Our X Series devices use a different method of digital filtering that would work better for you. If a hardware change is an option (and you can use PCIe) then you might consider this. You could use the 20 MHz timebase as your filter clock timebase and could guarantee to pass 10 us (200/20M) and reject 9.95 us (201/20M). The 6320 is currently our lowest cost X Series board. A couple of points about this solution:
1. To configure the PFI filter, you need to use some sort of dummy task to
access the property nodes. Here is an
example of this (although it is written in LabVIEW).
2. You can route the filtered PFI signal to be exported on another PFI line, but this will reserve Counter 3. This is documented in the Device Routes tab of Measurement and Automation Explorer.
3. The filtered output will be 9.95-10 us delayed from the input signal, so you could trigger the camera off of the rising edge of the filtered output directly and be fairly close to the actual falling edge.
External AND Gate Alternative:
You could configure a Counter Output to generate a re-triggerable pulse with a 10 us initial delay (to be triggered off of the rising edge of your PWM signal). Assuming the pulse is short enough to complete before the next period of your PWM signal, the counter output would only be high at the same time as the PWM signal if the signal was longer than 10 us. Use the external AND gate to combine these two signals and the result would be the trigger for your camera (the rising edge would correspond to 10 us after the PWM signal first goes high).
If you wanted to you could make the counter output pulse a little longer (say 8 us) and trigger the camera off of the falling edge out of the AND gate (a.k.a. rising edge out of a NAND gate) which would line up with the exact falling edge of the PWM signal. Don't make the CO pulse too long or it will overlap with the next period of the PWM.
Another Idea:
One idea that I keep coming back to is to use the internal rollover event of a counter input task (a pulse is generated whenever a counter rolls over on its Internal Output which can be routed to a PFI line). I don't think this will work, but the idea in theory would be to:
1. Set Default state to known value (e.g. 2^32-200).
2. Gate the Counter so it only counts during the time PWM is high. Have it count the 20 MHz timebase.
3. Reset the Counter to default state on the falling edge of the PWM signal.
4. The counter would rollover if 200 pulses occurred of the 20 MHz timebase (10 us), and the Counter Output could be routed to a PFI line to trigger the camera.
The problem is that there is no good way to reset the counter except for an encoder measurement (Kevin has already made a nice suggestion about this). A Pulse Width Measurement would technically reset the counter, but you cannot currently set the default value of a Pulse Width Measurement task so there is no way to make the rollover happen prematurely).
Configuring an encoder measurement and working with the multiple counters on the 6602 to produce appropriate A,B, and Z signals might be a method to look into further, but at this point I think you'd be better off with an external AND gate.
I don't want to say it's impossible with just the 6602, but I can't think of a straightforward way to go about it without external hardware (although maybe I can sleep on it and think of something later... how many counters do you have to work with?).
With your current NI Hardware, I think your best bet is to go with an external AND gate. If you're planning on purchasing an X Series card the digital filtering idea is actually not a bad way to go.
I hope this is helpful!
Best Regards,
John Passiak

How to use counter output pulses to trigger analog input?

Hello all,
I hope the kind people using this forum can help me, a lowly beginner LV programmer! I have been attempting to create a VI that produces a user defined number of TTL pulses, separated by every n seconds. Each TTL would be outputted to a stimulator, which in turn generates its own TTL. Using the stimulator-generated TTL, I would like to trigger finite analog data acquisition (e.g. for every TTL, trigger the collection of a data sweep that contains 4000 samples (collected at 4000 Hz), with 1000 samples collected pre-trigger. I would like to also be able to see each data sweep as it is triggered on a chart. As I understand things (lots of online/book/forum reading), I should be using the counter output to generate my TTL pulses, and syncing each counter produced TTL with analog input, as well as using a reference trigger. Also, the AI part should be started first, so that I don' t miss any counter outputs. If it matters, I also need to use one of the AI channels to acquire the TTL, so I can see my stimulator-induced responses to the stimulator in time.
I am able to generate the TTL pulses from the counter output, but I am having a problem with the AI part. I am unsure how to sync the counter output with AI. Also, since I need to acquire pre-trigger samples, I would be needing to acquire samples continuously, but when I set 'continuous samples' on daqmx timing, the VI doesn't work (hence why's its set to 'finite samples').
I hope someone out there can help, as I have been at this for what seems ages, with limited success. I am using a USB-6259 and LabView v8.2. Thanks!
Attachments:
RC001 v_1.vi ‏49 KB

Hello,
Due to the fact that analog tasks themselves are not retriggerable, a
pulse train produced by a counter is always used as the sample clock
for the analog input task in order to recreate a retriggerable effect
for analog input. This can be done by creating a finite pulse train set
to retriggerable using the DAQmx Trigger Property Node, or the pulse
train could be continuous and just be gated by another signal. Neither
of these methods can be properly applied in hardware to create a
retriggerable reference trigger. You can however implement something
similar in software by just stopping and restarting your reference
triggered analog input task within a loop. There will be some delay
between when the task is stopped and restarted, as these events require
software intervention, but if there is enough time between when each
trigger signal is generated, there should not be any noticeable delay
or missed samples.
I have attached an example of this!
Mark B
===If this fixes your problem, mark as solution!===
Attachments:
RC001 v_1mod.vi ‏25 KB

Counter Output

Hello
I am using DAQ PCI 6221 card for analog inputs and outputs, I am using both the counter outputs for controlling temperature, by putting heaters On and Off through the digital pulse train I am getting from counter outputs.
But I am having a problem with the counters that even if I change the Low time and High Time the pulse I get just dont changes accordingly,
changes timing effects from next time when I run the VI, I am attaching the VIs(CTR1.vi and CTR0.vi are similar just change the channel name) involved in this, first I am acquiring the temperature and then comparing it with low and high limits and taking an action whether to On or Off heaters.
High Time and Low time are required because as soon as I reach near to set temperature I increase the Low time and vice versa.
Could anybody please tell me where I am wrong??
Attachments:
Show Alarm SV.vi ‏14 KB
CTR1.vi ‏37 KB
Dig Pulses2.vi ‏117 KB

Are you trying to change these values once the task has started running? Consult this KB for information on how to do to this:
"Why Can't I Change the Duty Cycle on My Continuous Pulse Train?"
To summarize, you'll need to use DAQmx channel property nodes to set the pulse width and frequency.
Elijah Kerry
Senior Product Manager, LabVIEW
Follow my Software Engineering for LabVIEW Blog

Counter Output Pin on PCI-6229

I am using NI-DAQmx 7.3 C API with (among others) a PCI-6229.
I have used DAQmxSetCOPulseTerm() to connect a counter output to a terminal other than the default. It seems to work- the output pulses do, in fact, appear at PFI 6 (the terminal I'm using for testing). But the pulses continue to appear at the default output pin as well.
Is that expected?
In order to reverse the situation, I used DAQmxResetCOPulseTerm() just before calling DAQmxClearTask(). The function returns zero, but if I subsequently make a new task to do pulse output from the same counter, pulses appear at both PFI 6 and at the default pin.
Am I missing something?
John Weeks
WaveMetrics, Inc.
Phone (503) 620-3001
Fax (503) 620-6754
www.wavemetrics.com

Salvador Santolucito wrote:
Hi John,
I would suggest using the DAQmxTristateOutputTerminal. I have tried what you are doing in LabVIEW and I'm seeing the exact same results. When I set the default pin to tristate, the counter output does not show up on it.
-Sal
Thanks for trying it and confirming what I saw, and thanks for the pointer to DAQmxTristateOutputTerminal.
John Weeks
WaveMetrics, Inc.
Phone (503) 620-3001
Fax (503) 620-6754
www.wavemetrics.com

DAQ counter output

I want to give out a counter signal on a PCI 6025
I tried to do this with DAQmx.
I was able to realize such a signal, but thre is only the possibility (within the DAQ assistent) to give andless signal, or a adjustabke number of signal, or only one signal.
My problem is, when I use the endless signal, I cant do anything else on my simulation, it only makes the signal.
The same problem with the adjustable number of signal. I have to wait until these signals are given before I can to anything else.
With only one signal I have the problem that I takes time until my next signal is given out, and so the counter output is not continuous.
Anybody here who knows a solution?

Hi Thorsten24,
which developement enviroment do you use? LabVIEW, LabWindows/CVI or Measurement Studio? Which version?
Generally the assistant locks your system for only one DAQ-application. If you want to do something else meanwhile (e.g. parallel pulsetrain generation and analog input) you have to program it by yourself using DAQmx without the assistant.
You can use the EXAMPLE FINDER to search suited examples for your needs. Take a look in the following folders:
DAQmx/counter/generate pulse
DAQmx/synchronization/multi-function
Norbert B.
NI Germany
CEO: What exactly is stopping us from doing this?
Expert: Geometry
Marketing Manager: Just ignore it.

Two counter inputs and counter output NI 9401

I am trying to configure two counter inputs and one counter output on one NI 9401. I have looked and found how to configure digital lines in booth directions but it seems like I can only do two counters in all on one module. Can someone verify this for me or let me know how to get all three on to one module?
Thank you

Hi mschoenwald,
The counters are actually located on the backplane of whatever chassis you are using--I'll assume you are using cDAQ and not cRIO.
If you have the older <link no longer exists>, then there are only 2 counters available in general. You can access both from a single parallel (8 lines or less) digital module in slot 5 or 6 of the chassis.
The 2nd generation Compact DAQ chassis (including 9174, 9178, 9181, 9188, etc.) includes 4 counters. You may access them from any slot with a parallel module. There is no restriction preventing you from accessing all 4 simultaneously from a single module.
The 9401 is bi-directional and configurable by nibble (line0:3 may be configured one direction, and line4:7 another). However, it is quirky in that it requires the line direction to be configured before any of the tasks are started. This is because the data lines themselves are used to set the line direction behind the scenes. The best way to work around the behavior is to use DAQmx Control Task to explicitly reserve your tasks before any of them are started (see here). Keep in mind that the counter output should use the opposite nibble from the two counter input tasks.
Best Regards,
John Passiak

How to Immediately Change Counter Output Rate?

I have a piece of code that largely works like this example: http://zone.ni.com/devzone/cda/epd/p/id/5493
In other words, I set up the Counter Output with some initial frequency and duty cycle, but then during the main loop of my program I continuously change the frequency to a new value based on other criteria.
I'm using an M-series PXI card and LabVIEW RT.
The problem I'm having is that the card waits for the next edge before changing the counter output rate. For instance, lets say it is going at a low frequency and I am upping to a high frequency. If the command arrives in the middle of the current pulse, it will wait to complete the low-rate pulse before starting the high frequency output. Is there a way to make it interrupt the current count and immediately start counting at the new rate?
Thanks,
Isaac

Hi Isaac,
I posted the code in LV 8.2 so you should be able to open it now (it sometimes takes several minutes to upload).
There are a few limitations to using the digital lines instead of the counters:
1. The digital lines are updated off of a sample clock which will be much slower than a timebase. For example, on the 6221 the maximum update rate is 1 MHz, while the counter output has a max timebase of 80 MHz. As a result, the number of frequencies you can generate are going to be more restricted (divide down from 1 MHz vs. 80 MHz).
2. On M series devices, the digital lines must be clocked from an external source. This could be generated from a counter
3. You have to build the digital waveform, which is a bit tricky (I think the example code should help out with that but I haven't had time to thoroughly test it).
4. If you are generating digital lines at fast rates, you will need to write quite a few samples at a time to the output buffer to ensure the data does not underflow. If the buffer includes multiple periods of the digital signal, you would have the case that using the counter output would still update more immediately.
Again, to determine the best course of action it would be useful to know what frequencies you want to generate and which exact hardware you are using. I just mentioned the digital lines as an alternative to the counters, but it might not be ideal for your situation.
-John
John Passiak

Display counter output on graph

I have two counters generating continuous digial pulse trains from my PCI 6010, and I'm trying to display the output on a graph. I've got the output of one counter connected to an AI line that leads to a waveform graph, but I can't get anything on the graph. I've measured the output via external means, so I know the counters are generating the appropriate pulses.
Eventually I'd like to have some sort of indicator for each counter that indicates whether the counter is in the 'on' or 'off' state, but I figured getting the counter outputs to diplay on a graph would be a good first step.
My VI is below; the display part that isn't working is at the bottom of the case structure.
Thanks.

Once your code goes into the inner while loop your graph will never be updated since it will only execute one time. In order to update the graph continually you will need a parallel which handles the graph updates. A good way to pass data between the parallel tasks is a queue.
Mark Yedinak
"Does anyone know where the love of God goes when the waves turn the minutes to hours?"
Wreck of the Edmund Fitzgerald - Gordon Lightfoot

Disconnect counter output line

Hello,
I have a question that has been bothering me for awhile. I'm using an M-series DAQ card which allows the ctr0 output to be placed on any PFI line. Is there any way to disconnect the ctr0 output from all the PFI lines? I'm only using the ctr0InternalOutput and I don't want it routed to an external pin.
The reason I ask is because the ctr0InternalOutput was being used as timing for several acquisitions, but the output was also appearing on it's default output pin. However, this DIO/PFI line was being used as a digital output for relay control and every time the counter was used, the relay would switch. I "fixed" it by routing the counter output to an unused PFI line, but I would like it not to appear externally at all.
Thank you for your help,
Jon

Thanks, I will give that a try. Seems so obvious now...
Jon

Time measurement between counter output my device and analog input

Hello!
I'm trying to measure the time to generate a digital pulse train on the counter output, that goes to a frequency converter that controls a motor. So I think it'd be the best way to wire the output of the frequency converter with an analogue input and make a timestamp before I generate the pulse and a timestamp when I recognize the singal, but I think that wouldn't be a serious measurement ?
What's the best way to measure the time?
kind regards peter

hi there
well, there a several ways to do this. the problem with the software - timestamps is the minimal resolution of 1ms. i'd suggest:
- wire a copy of the digital pulse train to an analog input channel
- wire a copy of the frequency converter to another analog input channel
- create an analog input task with the two channels (the sampling rate defines the timing resolution,make sure to acquire enough samples to see the response signal)
- start this task
- send the digital pulse train
to optimize your acquisition you can use another copy of the digital pulse train as a start trigger for your analog acquisition.
-> then you'll see the digital pulse train on one of the analog channels and the frequency output on the other one. both channels have the same time axis with a resolution defined by your sampling rate (~us depending on your hardware). then you can analyze the data.
search the example finder for examples of how to create tasks and triggers.
Best regards
chris
CL(A)Dly bending G-Force with LabVIEW
famous last words: "oh my god, it is full of stars!"

Can I generate pulse trains on more than one counter output at the same time?

I have a PCI 6601 card with a BNC 2121 to connect the signals to two devices. The card is used as a trigger for both devices and I want to be able to generate pulse trains on two output channels at the same time, with a time delay between the two. How do I do that in Labview 7.1 Development with DAQmx?

I feel foolish for not being able to figure this out, but it still doesn't work. Attached is the VI I use now. Counter 0 generates a finite pulse train and I programmed Counter 1 to generate a retriggerable single pulse triggered by CtrOinternaloutput. I still get the same error message: -50103 The specified resource is reserved. The operation could not be completed as specified.
The same happens if I set the trigger for counter 1 at PFI36 (default output of counter 0) or any other PFI line. If I try a pulse train generation on only one of the counters, both work fine.
If I try the example in traditional DAQ for multiple counter outputs with phase delay, it works fine.
Can you tell me what I'm doing wrong?
Attachments:
Shutter_AND_lamp_trigger.vi ‏103 KB

Pause the counter output in DAQmx

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