PCI-6220 AI

いつもお世話に成って居ります。
PCI-6220ボード/端子台(NI SCC 68)を使用してai0~ai5までの電圧値を、異なるトリガで別々のタスクで取得したいの
ですが、可能でしょうか。
普通に作成すると、リソースの共有エラーと成ってしまいます。
トリガプロパティノードを使用して再トリガ有効にすれば出来る様な話を以前聞いたのですが、別々のタスクとした場合、
どの様にすれば宜しいでしょうか。参考に成るサンプルが御座いましたらお教え下さい。
又、デジタル出力でP0.0,P0.1,P1.0,P1.1ラインをOn/Off制御してそれぞれトリガラインをDev1/PFI0,Dev1/PFI1,
Dev2/PFI0,Dev2/PFI1に設定したいのですが、端子台上では、P0.0とPFI0は同じ位置にあるのですがどの様に接続
すれば良いでしょうか。素人的な御質問で申し訳御座いません。
LabVIEWのバージョンは7.0を使用しています。
以上、宜しくお願い致します。

村井様
ディスカッションフォーラムへの投稿有難うございます。
日本ナショナルインスツルメンツ技術部大平です。
こちらのご質問に関しまして、メールサポートで頂いているものと類似しているものですので、メールサポートと平行して返答させていただきたいと思っております。また、こちらでは他のユーザー様からの閲覧や書き込みも可能になりますので、このまま投稿を継続していくのが有効的かと考えております。
現在私の方で、先日添付していただきましたタイミングチャートを拝見させていただいております。こちらの検証が終わり次第、返答させていただきたいと思いますので、少しお時間いただければと思っております。
宜しくお願い申し上げます。
日本ナショナルインスツルメンツ
技術部 大平 悠生

Similar Messages

  • PCI 6220 how to route I/O signals?

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    There is an infodoc numbered 48430 which helps

  • PCI-6220 Analog output to Biometrics DataLOG?

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  • Help PCI 6220

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    Hello,
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  • [Question] PCI-6220: digital level at the pause of a continuous impuls train with external trigger

    Hallo,
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  • DAQmxbase with pci 6220

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  • Problems with PCI-6220

    Hi Labviewers,
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    I think you found the answer yourself by delaying the startup of your application.
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  • PCI-6220 Self Test 数采卡自检测

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  • PCI-6220 and Absolute Encoder

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  • PCI 6220 digital I/O CB68LPR

    Hi,
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    Hello Nazreen,
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    Message Edited by Travis G. on 04-05-2006 04:54 PM

  • PCI-6220 COUNTER (Labview): Does "Sample Source" = "Gate Source"?

    Hello,
    I'm using Labview, DAQmx, PCI-6220 (Counter0).  I connected an incremental encoder signal to the source input of CTR0.  In Labview, the "DAQmx Timing" vi requires that the "source" input be wired.  Does this "source" actually mean the source of the sample clock vs. the "Source" input to the counter?
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    Chris,
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    Jesse O. | National Instruments R&D

  • Optimum sampling freq. in PCI-6220 DAQ

    The NI PCI-6220 DAQ has a fixed anti-aliasing filter (called "small signal bandwidth" in the documentation) of 700 KHz. The DAQ itself has a maximum sampling rate of 250 KHz.
    Currently, I sample a given signal (which may have lots of interferences) at 256 Hz, and then digitaly filter it and decimate it to get a final sampling rate of 16 Hz. This gives me a signal of a bandwidth up to 8 Hz, which is fine. Thus, I effectively oversample by 16, and then decimate by 16.
    I am wondering that, since the anti-aliasing filter is 700 KHz, then I might be better off sampling at a much higher rate, say 200 KHz, and then filter-decimate accordingly. I believe this should give a better performance since the anti-aliasing filter will work best in this case, while if I sample at 256 Hz then I am effectively not benefiting much from it.

    Your sampling rate needs to be at least twice as high as the highest frequency interfering signal, so it sounds like >=100 kHz will be needed to meet the Nyquist criterion on all the interference.  Any interfering component which is aliased in cannot be removed by filtering or other post processing. So you need to prevent the aliasing.
    The 16-bit converter of the 6220 has a theoretical dynamic range of ~96 dB. So to get the best measurement of the interfering signals you want to make sure that the signal is very near the full scale of the selected range.
    Even a simple RC antialiasing filter with a time constant of ~10 ms would substantially reduce the higher frequency interference components and make you signal processing much simpler.  Why do you not want an external filter?
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  • Trouble Acquiring Digital Input through 1302- 1180- 1349-PCI 6220- software

    Hi,
    I've got an SCXI-1000 chasis, and I'm trying to use an external clock and trigger signal to acquire data from a BNC 2095 board.  I have the 1302 unit to input my external digital signals.  The information feeds through the following units:  1180--> 1349 --> SHC 6868 EPM cable --> PCI 6220 card --> software
    I've got my trigger connected to terminals 39(+) and 24(-) in the 1302 unit.  The external clock is connected to terminals 38(+) and 33(-). 
    Within the DAQ Assistant, I've selected the trigger as PFI 1 and the clock as PFI 0.
    I'd like to test the setup, but the test panel in the MAX won't let me select PFI0 or PFI0 as a channel.  I've also got a acquisition VI made, but it doesn't log any data even though there are no errors.  That's why I want to check that I'm getting the trigger/clock signals properly.
    Any ideas on what to check or change? 
    Thanks,
    Michael

    Hi Michael,
    In general, it's not a good idea to call the DAQ Assistant in a loop, since it allocates and frees resources every time it runs. You might want to take a look at the DAQmx examples in the NI Example Finder (Help>>Find Examples). There are located in the Hardware Input and Output\DAQmx directory in the Example Finder. There are several examples, with several timing and triggering configurations.
    Here is some information about reference triggers: In NI-DAQmx, the stop trigger is referred to as a reference trigger. The reference trigger establishes the reference point in a set of input samples. It allows you to acquire samples both before and after the trigger is received. The number of pretrigger samples to be acquired is set using the Pretrigger Samples input. The number of posttrigger samples to be acquired is automatically determined by subtracting the number of Pretrigger Samples specified from the number of Samples to Read specified.
    Also, take a look at the article I am linking below for information about NI-DAQmx. I hope all of this helps!
    Learn 10 Functions in NI-DAQmx and Solve 80% of Data Acquisition Applications
    Michael P
    National Instruments

  • Synchronizing 1 PCI 6220 and 2 PXI 6711 Boards

    Hello,
    I have created a program that writes both digital signals to the PCI 6220 board and analog functions to two 6711 boards.  Upon testing the output of these boards on the oscilloscope, I discovered that the timing of the digital board was about a half of a second behind the timing of the analog board.  If anyone has any ideas about why this may be happeneing itd be greatly appreciated.  I believe it is a synchronization mistake.  I have the boards connected with an RTSI cable but i never reference the cable in the program.
    Attachments:
    Ultracold Bloom User interface.vi ‏77 KB

    One solution would be to run a wire (a real one! you know with copper inside it? ) from the counter output to one of the PFI lines on the same card and then tie the PFI line to RTSI bus...
    There might be a more elegant way of doing it that someone could share, but this would certainly work. Just make sure that you document in your code the assumption that this jumper wire is in place.
    Mike...
    Certified Professional Instructor
    Certified LabVIEW Architect
    LabVIEW Champion
    "... after all, He's not a tame lion..."
    Be thinking ahead and mark your dance card for NI Week 2015 now: TS 6139 - Object Oriented First Steps

  • Pulse generation PCI-6220

    Hi there,
    I´m an absolutely newbie to labview and hope to get some advices as I´m completely stuck at the moment.
    I´d like to generate variable TTL pulses to 3 different lines. Since the PCI6220 card only has two counters I´ve to go for the normal hardware correlated DIO lines.
    For now I´d be happy to see it working just for one line as follows:
    __|   |________|           |_ ...
    I´ve to be able to set the pulse width of the high time for the first and the second pulse as well as the two different low times. This scheme should furthermore than be repeated n times. Thus having 5 variables, the length of the pulses in ms: 'Low1','High1','Low2','High2', and the number of repetitions: 'n'.
    I may be horribly wrong with this, but I think working with the duty cycle doesn´t work for that application, does it?
    Assuming I use the frequency generation of a counter as a sample clock to my pulse generation, it seems rather simple taking for instance 'High1' corresponding pulses of the counter clock to generate the 1st pulse then 'Low2' pulses for the subsequent low pulse and so forth. Could anyone give me a hint to do so, or are there better/other ways how to achieve this? Are there eventually vi's available I could start with (haven´t found proper one´s in this forum nor in the Labview implemented library)?
    Many, many thanks in advance for any help!!
    Robert

    Rob:  I looked at your example earlier when I was near my LV machine.  From memory:
    1. I think I recall that you specified PFI 2 as the sample clock source for the digital task while using CTR 0 to generate the clock.  According to this doc, the default output pin for CTR 0 is "terminal" 2.  However, that does NOT turn out to be another name for PFI 2.  Rather, terminal 2 is designated as PFI 12 as can be seen here.   (This stuff is also visible in MAX when you select your device, right-click and choose "device pinouts").
    2. I recall you used a U32 array version of DAQmx Write. You may need to use the U8 version on your 6220 board.  Also, the init values you wrote before the loop alternate between 255 (all bits high) and 0 (all bits low).  The values you write inside the loop alterate between 1 (LSB high, all other bits low) and 0 (all bits low).
    3. You defined the digital task for finite generation, filled its buffer before the loop, then attempted to keep overwriting it inside the loop.  These are not mutually consistent.  If you want finite generation, fill once only.  If you want continuous generation, it'll take some care not to overwrite too soon.
    4. Minor nit: It may not matter in your app, but often its best to start up the digital task before starting the counter task that generates its clock.  You can accomplish this by simply routing the error cluster from the digital task's DAQmx Start up to the counter task's Create Virtual Channel.
    I'm not near LV now to look at the recent example from Christian M.  Hope it suits your needs...
    -Kevin P.

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