RetriggeredPulse Train Generation PCI-660x

I am generating a retriggered pulse train using the PCI-6602. I can generate it fine, but when I exit the user interface (created with labwindows/cvi 7.0) it stops the wave output. Is there any way to keep the output going after exiting?

I just made a new panel for the pulse train generation so that I could close that and still have the main panel open, thereby keeping the pulse train going.
Derek

Similar Messages

  • Need to unreserve a counter in a finite pulse train generation

    Hi. Let´s introduce my application first: I´m trying to generate a N-pulse train with the M series PCI-6221, in order to achieve a high frequency clock for an SSI transducer. That´s why i can´t use a software generation (because of the high frequency) and i have to use a finite pulse train. Besides, I would need to use another counter for a variable and finite count (but not simultaneously). The problem is that, as i think i have understood, this finite pulse train involves the two counters working together, so I can´t programm another task with that resources.
    My question is, Is there any way to do the finite pulse train generation, unreserve the counters, wait for a finite count to finish and so on?
    Thanks.

    Hello,
    My knowledges tell me that you need two counter to generate a finite pulse train.
    The first counter generates a pulsed of desired width and the second counter generates the pulse train which is gated by the pulse of the first counter (Counter 0=Pulse Generation, Counter 1=Pulse train generation).
    However, the finite pulse train generation and the continuous pulse train generation seem similar. The key difference is the generation mode from continuous to finite and the use fo a DAQmx Wait Until Done vi instead of a loop to monitor user input. From a point of view of the hardware there is a difference between the two. Continuous pulse train generation requires only 1 COUNTER.
    Maybe you can try with a continuous pulse train generation and with this method you have another counter to do a finite count.
    Regards
    DiegoM.

  • Two retriggerable pulse generations after a pulse train generation

    I am trying to generate 3 pulse trains (ABCABCABC...) one after another.
    The program currently I am using generates 2 pulse trains (ABABAB.....).
    I am using the Traditional NI-DAQ and PCI-6602.
    I am thinking about using pulse train generation first and then retriggerable pulse generation after that.
    I understand that the retriggerable pulse generation can generate a pulse train triggered (or gated) by other counter output.
    I have attached a test vi.
    It uses the pulse train generation code when the counter number is 0 and when the counter number is not 0, then it uses the retriggerable pulse generation code, which I tried to modify from the pulse train generation code.
    First of all, I am not sure if I wrote the retriggerable pulse generation code correctly.
    Secondly, I don't know if the whole code will generate ABCABCABC...
    I would really appreciate your help.
    pchemjjang

    pchemjjang,
    I believe I may have misunderstood your original concern.  It sounds like you want to output this finite pulse train on three different counters.  You will output these pulse trains for 10 minutes and cease your program.  The Finite Pulse Train.vi will output a pulse train from only one counter.  With this Traditional DAQ example you would need to have three of these Finite Pulse Train.vi programs running simultaneously in parallel to output from 3 counters.  I would strongly recommend using DAQmx for this application because you will only need to utilize 4 VIs.  The rest of the work is done behind the scenes.  There is an example in DAQmx which should accomplish exactly what you are looking for in one program.  You must make sure to make the number of pulses 2000000, the duty cycle as 1/3 and the frequency as 1/(300us).  The DAQmx driver can found here.  In terms of the counters, I believe that each task requiring two counters will use the counter adjacent to it.  If you would like to output on counter 0 using finite generation then counter 1 will be used as the gating counter.  When you have the DAQmx driver then you can find this example by selecting Help>>Find Examples and then expanding Hardware Input and Output>>DAQmx>>Generating Digital Pulses>>Gen Dig Pulse Train-Finite.vi.  I have included an image to show how the front panel of this example should be configured to work.  The major note to make is that you will need to configure all of the counters in the channel names list.  In Traditional DAQ this did not seem possible.  In Traditional DAQ you would need to create a subvi out of the Finite Pulse Train.vi run three copies of it, in parallel, in a larger program.  Please let me know if you will be able to utilize DAQmx in this application.     
    Thanks,
    Gio L.
    Digital Support - Product Manager
    National Instruments
    Attachments:
    Counteroutput.jpg ‏49 KB

  • Pulse train generation with better precision

    I was wondering if there is a way to generate a pulse train with a width that is less than 2 milliseconds using labwindows 7.0 and a PCI-6602, I need more precision.
    Derek

    I use LabVIEW, not LabWindows, but I know that the 6602 device can certainly generate a pulse train with a width of way less than 2 msec. Way less than 2 microsec even. As low as 25 nanosec in fact.
    Aren't there any shipping examples for pulse train generation? If not, there's a few in the Dev Zone example library you could modify. Here's a link: Pulse Generation examples
    -Kevin P.

  • Pulse train generation fails with certain values for "number of samples"

    I'm generating a retriggerable analog output signal, and so I'm using a counter as the sample clock (see: Retriggerable AI Using Retriggerable Counter). I am finding that, above a certain number of samples, and only for certain values of the number of samples, the counter task gives me error -200305, "Desired finite pulse train generation is not possibe." The error crops up only when actually starting the task.
    The analog signal that I'm trying to generate will be about 800 kHz, so my counter is set to run at the same frequency. I find that the counter task works fine if the number of samples to generate is anywhere between zero and 671,088 samples. Setting the number of samples to 671,089 gives the error above, as does 671,090 samples and so on. However, using 671,096, the counter task works fine. After that, the counter seems to output fine only if the number of samples is divisible by 8.
    The only thing I can think of is that (617088 samples) / (800000 Hz) = 0.839 s. At the internal clock rate of 20 MHz, 0.839 s is 2^24 samples, and it is a 24-bit counter on this hardware. So if it's this internal counter rolling over, that's fine and I can work around that. But if that's the case, what I don't understand is why increasing the number of samples in increments of 8 samples still works.
    The hardware is a PXI-6733 board, running with LabView 7.1.1 and NI-DAQmx 8.1.

    Hmmm,  multiples of 50 & 100?  Now I'm puzzled again.
    Here's how to make sense of the 100 kHz timebase idea though, even if it turns out not to be the right explanation.  For a retriggerable finite pulse train, you actually use a pair of counters.  If you were to program it manually, you could set your output counter to generate a continuous pulsetrain at 800 kHz using the internal 20 MHz timebase.  This output counter would also be configured to use the other counter's output as a digital level-based pause trigger.  So the 800 kHz pulsetrain is only output while the other counter's output is, say, high.
    The other counter is configured for retriggerable pulse generation.  The pulse duration or high time should be set for (# pulses) / (800e3 pulses/sec).  This other counter can be configured to use the 100 kHz timebase, so its high time would then have to be an integer multiple of 10 usec.
    So let's see...  An 800 kHz pulsetrain is possible with a 20 MHz timebase (exactly 25 cycles).  A 700 kHz (28 + 4/7 cycles) or 900 kHz (22 + 2/9 cycles) is not.  So when you request those other frequencies, you actually get a near approximation.  I dunno if DAQmx can be queried for the actual value correctly or not -- I recall an early version that reported back whatever freq you had asked for rather than what it actually used.  Queries based on ticks (rather than time or freq) did return what was actually used, as I recall.
    Let's suppose a request for 700 kHz gets truncated to 28 cycles of the 20 MHz timebase making a 1.4 usec period.  Then 50 of those periods becomes 70 usec, which is evenly divisible by the 100 kHz timebase.  Bingo!  (Note: 70 is the least common multiple of 10 and 1.4)
    Now suppose the request for 900 kHz turns into 22 cycles of the 20 MHz timebase, or a 1.1 usec period.  Now it takes 100 of those periods to get to 110 usec, which is also evenly divisible by the 100 kHz timebase.  Bingo again!  (Note: 110 is the lcm of 10 and 1.1).
    Did you follow the method here?  It should help you figure out expected results for various output freqs and #'s of samples.
    -Kevin P.

  • Finite pulse train generation?

    i am trying to generate a very specific pulse with my tio-6602 in labwindows. after a 20us delay, i want the board to generate 20 pulses, with a width of 1 us and an interval of 5us. ideally, this would be retriggerable at 100 Hz. any suggestions on what would be the best way to approach this problem?

    Paco,
    You can use a gated pulse train, which is similar to finite pulse train generation. With finite pulse train generation, you have one pulse for the gate of a counter set to generate a pulse train. The pulse train will only be output based on the gate, so if one pulse appears, you have a finite pulse train. Now, if you make the gate be a pulse train itself, then you can continuously output bursts of pulses. For instance, you can set it up such that the pulses are output when the gate is high. When the gate is low, the counter pulses would pause and when the gate resumes to the high states, your pulses would continue. I've attached a code excerpt for using NI-DAQ function calls to generate a finite pulse train that is in our database. I will see abo
    ut getting it put onto the http://www.ni.com/support pages. You can also find more information about the function calls used by referencing the NI-DAQ Help file installed with the NI-DAQ driver software and with the NI-DAQ User Manual, which is available at the web pages.
    Regards,
    Geneva L.
    Applications Engineering
    National Instruments
    http://www.ni.com/ask
    Attachments:
    finitepulsetrain.txt ‏2 KB

  • Finite pulse train generation​... how to count number of pulses?

    hi guys,
    this has probably been solved a hundred times but i just couldnt find it!!
    i have a pulse train generation happening on my ni usb-6211... using FREQ OUT, using a divisor on this, and routing it to PFI4.
    id like to update my VI so i can specify the number of pulses....
    im pretty much a noob at this stuff so any help would be greatly appreciated!! thanks!
    dan
    Attachments:
    pulse train generation.vi ‏25 KB

    Hi,
    No problem at all, we are here to help. What I’m going to do first is to point you to a bunch of examples for that might give you a better insight of the capabilities of the card in terms of finite pulse generation. What you should be looking at is called retriggerable pulse generation and here are some examples to look at: Retriggerable Finite Pause Trigger Digital Pulse Train Generation, Creating a Delayed, Retriggerable and Finite Pulse Generator, DAQmx - Retriggerable Pulse Train Generation - LabVIEW - CVI - ANSI C - VB.NET - C#.NET and Retriggerable Finite Pulse Train with Changing Pulse Specs.
    Let me know it helps
    Jaime Hoffiz
    National Instruments
    Product Expert
    Digital Multimeters and LCR Meters

  • Continuous pulse train generation on my PCI 6602 takes up too much of my system resources.

    I am using a PCI 6602 to generate a clock signal that is to synchronize pattern generation on two PCI 6534's. I have done this by generating a pulse train at a user defined frequency on the PCI 6602. My problem is when I generate this pulse train, the program uses all of the computer's CPU, and slows the rest of the processes down. Just to let you know, I have isolated this program to ensure it is the only thing running, and it still has the same result. The CPU usage soars to 100%(and remains constant) and the memory consumption increases (and remains constant) as well. Also, if it helps at all, the CPU consumption is completely independent of the frequency that is being gene
    rated, but the memory usage increases a little with an increase in frequency. Does anyone have any insite as to how to fix this, for I have noticed that all of the posted examples like this behave in the same manner.
    Thanks,
    Dave

    Russell,
    Thanks for the reply. Just about five minutes ago I came to the realization that the card itself was not causing this to happen. When I took a closer look, I found that my C program and all of the example programs were using the NIDAQWaitForKey() function to enable countinuous generation. So what was happening was that function was constantly polling the CPU to find a key to be pressed. So lets just say I found a way around this problem, and so everything is well. There are a handfull of things that i need to work on now, but at least I know my clock generation program is correct and I can stop banging my head against a wall trying to solve a problem that does not exist and for which there is no solution.
    Thanks Again,
    Dave

  • Pulse Train Generation using PCI-MIO-16E-4

    I need to generate pulse trains of changing pulse widths using PCI-MIO-16E-4 daq card using Igor Pro.
    I have tried to use the CTR functions (but always keep getting errors and it doesn't work). I also used the general purpose counters (GPCTR functions) but cannot visualise them on a CRO. If someone can help in regards to the programming aspect, it will be greatly appreciated.
    Thanks
    Vakul

    Hi Vakul,
    Some questions that might help me to get you a solution.
    Are you using Traditional DAQ, or DAQmx and which versions are you using?
    What operating system are you running?
    When you say you can't visualize them on CRO, I assume that you are hooking the counter out to a cathode ray oscilloscope and can't see the pulse train?
    Are you going to need more than two different pulse widths for your pulse train?
    There are several online knowledge bases describing how to change the frequency of a pulse train on the fly.
    This link explains how to use software to create a new pulse width.
    http://digital.ni.com/public.nsf/websearch/7B1B0427C39FE33086256CEE00752133?OpenDocument
    This link discusses using frequency shift keying, which will only allow you to have 2 different pulse widths.
    http://digital.ni.com/public.nsf/websearch/EC1F089252F33B248625696E006FB6FC?OpenDocument
    I assume that you are writing this program to compile in Igor Pro using C. I can help you with the C code development, but don't know anything about the Igor Pro API.
    Please get back to me about those questions and let me know if you need further help.
    Michael Denton

  • USB-6009 pulse train generation with digital output....

    Hello!
    I've bought a new USB NI-Card (USB-6009) and now I'm trying to adopt an old vi that uses traditional DAQ drivers. I wrote that vi for a PCI NI-Card (PCI-6024E), which has two counters to generate two pulse trains simultaneously. Now I've only one counter and that's why I'm searching for a good way to create pulse trains using a digital output! The pulse trains are both ranging between 100 Hz and 100 kHz.
    I'm sure somebody has an idea how I can solve the probem in the best way
    Kind regards,
    Peter

    You can't do it with this low cost board. Both digital and analog outputs are software timed only. The analog out is rated at only 150  samples/sec and the digital is about the same. You can't even use one of the counters because it is not a hardware timed counter output. It is an event counter only as an input.

  • Question of pulse train generation

    Hi,
          I need to change the frequency of a continuous pulse train to control a stepper motor.
    All examples I found is to update the parameters of a counter in a while loop. How fast
    the frequency can be updated depends on the execution time of the loop. Most examples
    have a 10ms delay function in the loop. I want to update the frequency in 0.01ms interval,
    I wonder if is it possible to use this method. Is there a better way to do it?
          Thanks for help!
          Regards,
          Tao

    Tao,
    Unfortunately, you're not going to be able to update your frequency at a rate of 0.01 msec (100 kHz) for at least two reasons.
    1. If you're using Windows, the OS won't loop at a consistent rate.  The variations wil easily be in the order of milliseconds, possibly more.
    2. The counter hw won't allow you to change a frequency until a full pulse has been generated at the prior frequency.  You couldn't change the freq at 100 kHz unless the step rate was in the 100's of kHz.
    I've been waiting for NI to provide NI-DAQ support for buffered pulse generation for about 7 years now, largely for the kind of stepper control you're describing.  At this point, I've stopped holding my breath...
    Meanwhile, there may be some other options.  You could consider a dedicated motion control card.  Or you could use a card supporting timed DIO (such as the new M-series cards).  Finally, here's a link to an example I worked up that allows you to generate a finite pulse train with varying frequency.  It isn't everything you need, but it might be a nudge in a useful direction...
      http://forums.ni.com/ni/board/message?board.id=40&message.id=2411#M2411
    -Kevin P.

  • Pulse train generation without general purpose counters

    Hello,
    I am attempting to generate a continuous square wave using Labview, but I do not want to use the hardware counters because I am using them to measure pulse widths on two other signals. I have tried using analog pulse generation VIs, but they slow down my program way too much. The signal I need to produce will be used to control a motion sensor, and has to be less than 100Hz, with a 90%+ duty cycle. Is there another way to produce a pulse train, or is it possible to use one counter to do two things at once?
    Thanks in advance,
    Nick
    Attachments:
    july23.vi ‏277 KB

    Nick,
    Have you tried using the Benchtop Function Generator that comes with newer versions of LabVIEW? This program demonstrates a better method of analog output than the AO Wavform Generation vi because it only calls the Config and Start vi's once, while repeating the Write until the user changes the front panel. This also allows you to set the duty cycle and frequency from the front panel, similar to a regular function generator.
    It can be found in the LabVIEW 6.1 shipping examples under Hardware I/O >> DAQ >> Solutions >> Software Created Instruments. Hope this helps!
    Luke Schreier
    National Instruments

  • Counter/Timer Pulse Train generation

    Hello,
    I am having some trouble understanding why a particular VI I have isnt working(upper part of image below), I was wondering if someone could give me an idea of the cause from the error message.  I have a counter/timer which I am using to generate a pulse train.  It works fine on 'Continuous samples'  but when I switch it to 'finite samples' I get a 'resource is reserved' error when it gets to the DAQmx 'Play' VI
    I made a separate VI (lower part of image) and it works just fine with finite samples.  So  I am basically wondering what is different about finite versus continous sampling which could cause a resource to be reserved or not. (the board is a PXI 6281 if that matters)
    Thanks,
    Adam
    Solved!
    Go to Solution.

    You're correct on what the problem is. 
    For what it's worth, the newer X Series boards (63xx) and 2nd Generation Compact DAQ Chassis don't require the use of two counters for finite pulse generation (although technically there is a paired internal counter to accomplish the finite pulse generation, it's not really evident to the user). These products also have 4 counters available instead of 2. 
    Best Regards,
    John Passiak

  • Pulse generation PCI-6220

    Hi there,
    I´m an absolutely newbie to labview and hope to get some advices as I´m completely stuck at the moment.
    I´d like to generate variable TTL pulses to 3 different lines. Since the PCI6220 card only has two counters I´ve to go for the normal hardware correlated DIO lines.
    For now I´d be happy to see it working just for one line as follows:
    __|   |________|           |_ ...
    I´ve to be able to set the pulse width of the high time for the first and the second pulse as well as the two different low times. This scheme should furthermore than be repeated n times. Thus having 5 variables, the length of the pulses in ms: 'Low1','High1','Low2','High2', and the number of repetitions: 'n'.
    I may be horribly wrong with this, but I think working with the duty cycle doesn´t work for that application, does it?
    Assuming I use the frequency generation of a counter as a sample clock to my pulse generation, it seems rather simple taking for instance 'High1' corresponding pulses of the counter clock to generate the 1st pulse then 'Low2' pulses for the subsequent low pulse and so forth. Could anyone give me a hint to do so, or are there better/other ways how to achieve this? Are there eventually vi's available I could start with (haven´t found proper one´s in this forum nor in the Labview implemented library)?
    Many, many thanks in advance for any help!!
    Robert

    Rob:  I looked at your example earlier when I was near my LV machine.  From memory:
    1. I think I recall that you specified PFI 2 as the sample clock source for the digital task while using CTR 0 to generate the clock.  According to this doc, the default output pin for CTR 0 is "terminal" 2.  However, that does NOT turn out to be another name for PFI 2.  Rather, terminal 2 is designated as PFI 12 as can be seen here.   (This stuff is also visible in MAX when you select your device, right-click and choose "device pinouts").
    2. I recall you used a U32 array version of DAQmx Write. You may need to use the U8 version on your 6220 board.  Also, the init values you wrote before the loop alternate between 255 (all bits high) and 0 (all bits low).  The values you write inside the loop alterate between 1 (LSB high, all other bits low) and 0 (all bits low).
    3. You defined the digital task for finite generation, filled its buffer before the loop, then attempted to keep overwriting it inside the loop.  These are not mutually consistent.  If you want finite generation, fill once only.  If you want continuous generation, it'll take some care not to overwrite too soon.
    4. Minor nit: It may not matter in your app, but often its best to start up the digital task before starting the counter task that generates its clock.  You can accomplish this by simply routing the error cluster from the digital task's DAQmx Start up to the counter task's Create Virtual Channel.
    I'm not near LV now to look at the recent example from Christian M.  Hope it suits your needs...
    -Kevin P.

  • Pulse train generation - questions about PLL and jitter

    I need to generate a pulse train having a pulse width of 20ns and a period up to 100ms, selectable by software.
    The jitter requirement of the period is 10ppm (1us over 100ms).
    I thought to use PCI6221 to generate this pulse train but I could not find all answers in its documentation or anywhere else.
    1. Can the PLL be used to get a clock frequency to the counters of 50MHz out of the internal clock of 80MHz (5/8 factor)?
    2. Can the counters be set to output a pulse width of a single clock period in "Pulse Train" mode? (then the above 50MHz clock gives the 20ns pulse width).
    3. The datasheet states the base clock accuracy is 50 ppm, in "Frequency Generator" mode. What is the clock period jitter in "Pulse Train" mode, including the PLL effect?
    Is there any other counter/timer board that may be better for this job?
    Thanks.

    For this task first let’s take a look at the counter
    specification of the 6221.
    3. The datasheet states the base clock accuracy is 50 ppm,
    in "Frequency Generator" mode. What is the clock period jitter in
    "Pulse Train" mode, including the PLL effect? NI 622x Specifications
    page 9 states as you said 50 ppm for the “Frequency Generator” for the pulse
    train mode it will be the same 50 ppm as it is stated I below the: “General-Purpose
    Counter/Timers” title.
    I hope this knowledge base helps: How
    Do I Change The Frequency Output Of My Pulse Train On The Fly?
    You will not be able to generate a 20 ns
    pulse, since you can only derive integer multiples of the 80 MHz time base in
    this case, 1/40MHz pulses will be the closest you can get to a 20 ns
    pulse.  Also another note is that the
    frequency generator does not have a selectable pulse width, it is a 50% duty
    cycle signal.
    For more information look at the M Series User Manual  page 7-21.
    Two other products that you might be
    looking at are High Speed Digital Inputs and Outputs and Function Generators;
    take a look at those and post on the right discussion forum if you have any
    questions.
    Message Edited by Jaime F on 05-05-2008 05:38 PM
    Jaime Hoffiz
    National Instruments
    Product Expert
    Digital Multimeters and LCR Meters

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