2 layers of firewall Implementation Design

Dears i'll be going for this design below :-
Internet-----Firewall1-----Firewall2----Core switches----Distrubtion switchs----End users
Firewall1: outer interface to internet , Internal interface to firewall2 , DMZ interface to DNS , EMail server , Bluecoat (Guest users) , Websense (Wired users internet access)
Firewall2 : Outer interface to firewall1 , DMZ interface to Server Farm , internal interface for core switchs.
Now inorder for both users Wired/Wireless to have their internet traffic directed to bluecoat and then from bluecoat to internet, routing should be enabled between 2 firewalls so is it ok ? or shall i configure all users to have a default gateway to firewall1 and then have firewall1 configured to route traffic to both websense and bluecoat ???? also while traffic is coming back from firewall1 heading to firewall2 i should open some ports on Firewall2 because by default it wont be allowing any traffic since it will be going from low level interface to higher level???.

routing should be enabled between 2 firewalls so is it ok ?
Surely it's ok and it should be done. You may use dynamic routing or just static routes. Final goal is to provide full IP reachability between your clients and WebFiltering services.
or shall i configure all users to have a default gateway to firewall1
You can't configure firewall 1 inside IP as default gateway for your clients, cause default gateway IP hould be in the same LAN segmetn (broadcast domain).
also while traffic is coming back from firewall1 heading to firewall2 i  should open some ports on Firewall2 because by default it wont be  allowing any traffic since it will be going from low level interface to  higher level???.
If we're talking about general webtraffic, then you don't have to configure any ACL's on the outside interface of the FW2, cause web traffic will be inspected by default (at least as TCP). That means, when client connects to, say, cisco.com, returning traffic will be allowed by default, cause there'll be an entry in the state table.

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    No.
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    This question is asked repeatedly.. you really should have searched because the answer is always the same. You can't do it directly in Java.

  • Oracle Procurement/Sourcing :- Need advise on an implementation design

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    -Could it even be an unconstrained path issue if nothing in the report indicates that there is an unconstrained path in the problematic region?
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    Hello,
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    So, my questions to you are:
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    What is your smallest positive slack number?
    What is your system jitter? Your clofck source jitter?
    How well is the device bypassed on the board you are using (is it one of ours, or one from our distributors)?
    - Yes, I went over the entire verbose timing report that DIDN't cover unconstrained paths. However, when I did have the timing analyzer output unconstrained paths as well, there were a lot of timing errors. I assume this is due to the fact that unconstrained = period requirement of 0 and the slack is therefore always negative? I had a look at these and none of them really indicate a problem to me.
    - The smallest positive slack in the case of the standard verbose timing report was 0.304ns.
    - The system jitter is (the default?...I did not specify it in my UCF) 0.070ns. The other jitter values (TIJ and DJ) are both set to zero. So the resulting clock uncertainty is very small...possibly too small.
    - The board is a Nexys 3 from Digilent. I assume they know their stuff when it comes to capacitive bypassing of ICs. How would this play a role? If I've understood correctly then this is correlated to the system jitter. Bypassing problems would lead to larger/more frequent voltage dips (especially for larger designs) and therefore a clock that exhibits more/larger uncertainty (i.e. jitter)?
    I think my lack of knowledge in correctly constraining larger designs might be causing the problems here. But perhaps also not, so just to be sure, I want to ask the following (possibly stupid) questions:
    - Instead of increasing parameters related to jitter of a certain clock, wouldn't increasing the period constraint of that clock have the same effect? As I wrote, increasing for example the system clock constraint to 120MHz rather than 100MHz showed no improvement of the problem...I'm not sure what this tells me...if anything at all.
    - I do have another clock domain and I do synchronize signals (there is nothing big going on, mainly just handshaking) between the two domains. What could the effect be if I removed the period constraint for one of the clocks apart from possible timing problems in that clock domain?
    - The ring oscillators that I have clock certain FFs if oscillators enabled, however I do not know their exact frequencies. Would it suffice to just use a known upper bound?
    The latter two questions concern parts of the design that habe been there for a long time and have no functional connection to what was added that seems to be causing the problem, though.
    austin wrote:
    ISE ignores clock domain crossing (Vivado does not, but Vivado only supports 7 series and later devices). Do you have any unidentifed clock crossings that require synchronizers?
     Yes, I do. As mentioned above I synchronize my handshake signals between clock domains using simple level synhronizers (since I'm not doing anything fancy like transforming pulses). I am also synchronizing the de-assert of my asynchronous system reset in both clock domains using standard reset bridges, which are basically just level synchronizers.
    Interestingly, the timing report containing unconstrained path info tells me that one constraint was not met whereas the other one does not. It also concludes that the maximum frequency is lower than 100MHz, but gives the same result for the system clock. If I've understood correctly, this is due to the fact that there is an unconstrained path with maximum combinational path delay larger than 10ns. I had a look at this path (there are a few of the same type) and it is a path that I don't think needs to be constrained, so I wouldn't see this as the issue. 
    Albeit having looked at the timing reports, I wouldn't exclude that I've missed something, simply because I haven't dealt with such problems until now. So, I'm not sure whether or not it would be helpful to attach both the standard verbose timing report and the one including unconstrained paths...but perhaps someone could point me to something that might seem fishy..?
    One thing I will do is continue to try and isolate the location of the problem using timing simulations or possibly stripping the logic of certain components and checking the behavior of the implemented design.
    Best regards,
    Shibby

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    Ok guys, Here is one quick example of what i would ideally like to achieve.
    [http://i279.photobucket.com/albums/kk128/ziggy_76/onelayerprocess.jpg|http://i279.photobucket.com/albums/kk128/ziggy_76/onelayerprocess.jpg]
    Everything above the shaded line already exists so i will be developing new components below the shaded line. (i.e. there is already a process that reads from the database and writes to the relevant queue.
    The diagram shows that each ftp server will have two processes associated with it. An INftp and OUTftp process. The IN process will be polling the relevant ftp server and writes whatever it reads back into the queue. The OUT process will be checking the queue to see if there are any new items that need to be transffered to a server. Each item in the queue has an IN or OUT flag.
    I am wondering whether it is more efficient to use the above approach, or include a new process that reads from both queues and sends the requeust to either the IN or OUT processes which a normal objects.
    How would a plugin be used in this situation? If there is a generic class for putting files into an FTP server, does this mean all the PUT processes will need to extend this class? How would i deal with situations where the "putting" requires different logic for each server?
    I am thinking that maybe only the logic for "putting" and "getting" should be generic but the preparation should be independent?
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    Edited by: ziggy on May 5, 2009 1:52 PM

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    Ok guys, Here is one quick example of what i would ideally like to achieve.
    [http://i279.photobucket.com/albums/kk128/ziggy_76/onelayerprocess.jpg|http://i279.photobucket.com/albums/kk128/ziggy_76/onelayerprocess.jpg]
    Everything above the shaded line already exists so i will be developing new components below the shaded line. (i.e. there is already a process that reads from the database and writes to the relevant queue.
    The diagram shows that each ftp server will have two processes associated with it. An INftp and OUTftp process. The IN process will be polling the relevant ftp server and writes whatever it reads back into the queue. The OUT process will be checking the queue to see if there are any new items that need to be transffered to a server. Each item in the queue has an IN or OUT flag.
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    How would a plugin be used in this situation? If there is a generic class for putting files into an FTP server, does this mean all the PUT processes will need to extend this class? How would i deal with situations where the "putting" requires different logic for each server?
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