Fixed point division on FPGA doesn't show the fraction part
Hi,
I'm trying to normalize a fixed-point complex vector. My problem is in the part of fixed point division. Assuming I am dividing x by y (x/y), then I multiply first x by 2^26 and y by 2^9 then divide both of them using high throughput function then multiply the result by 2^-17 and here the problem appears. The result is zero, and the fraction part doesn't appear. My question is: does the "scale by power of 2" block discards the fraction part and only keeps the integer part, even if the input is a fixed point input with fraction part of 20 bits length? If so then how can I get the result of dividing a number by a bigger one? I mnean how can I display a result < 1? If not, then why isn't the fraction part displayed? The numbers I used as an example are: x=10, y=182.
The indicator is adjusted to have 64 bit word length and 44 integer length. I also write this data into a memory element and then read it through a FIFO to transfer it to the RT vi. Both of the memory and the FIFO are configured with the same word and integer lengths above. I am using 7965R series FPGA.
Thanks in advance.
It's worth noting that I tried this same procedure on RT vi itself and the fraction part was displayed.
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