M Series Counter TC interruption and Gi_Status_1 register

Hello everyone
Q1: About the G0_Status1 register
Everytime I get TC interruption from a board, checking the G0_Status_1 register.
And I could find bit 12 is always TRUE and it is even when TC doesn't hit to 0.
The 660x RLP Manual says the bit 15 is G0 Interrupt and bit 3 is TC interrupt and
I'm sure it working correct. But I don't know why the bit 12 is always TRUE.
Could anyone tell me what the bit 12 is?
Q2: About TC interruption
Also, I could make the TC interrupt count down direction and when it hits to 0.
If there is some configuration the direction inverted, I would like to know how to
do it. I mean it is something like that the Counter0 counts up and when it hits to
specified value, TC interrupt occurs.
Thanks in advance
Ash

Hi fmhess-
I created an example recently for DMA-based buffered period measurement.  It's attached as gpctex6.cpp and should be a good starting point (along with gpctex1.cpp from the M Series MHDDK) to get buffered edge counting with DMA working.  This should give considerably better performance than interrupt-based transfers; will DMA-based transfers (using the MHDDK's DMA library) work for your app?
Thanks-
Tom W
National Instruments
Attachments:
gpctex6.cpp ‏12 KB

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