PCI 6220 how to route I/O signals?

Hi
I am using a PCI 6220 connected with a SCC 2345, on labview 71 XP based.
I have 24 V signal and I want to divide the frequency, and send out divided signal on RTSI 0.
I tryed to use a SC-DI on the 2345, but I don't know how to route the DI signal to the CRT0 source signal?
Any Ideas?
Laurent

There is an infodoc numbered 48430 which helps

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How to route Quadrature Encoder signal to CC1 using PCIe 1429 + IO extension card

Hi there,
i am currently trying to interface the Basler L304kc to the NI PCIe 1429 + Cameralink IO extension board
I want to operate the camera in Ex-SYNC level controlled mode. I would like to route external Quadrature Encoder signals (connected to the IO extension board) to the CC1 cameralink control of the camera
Currently, I cannot find this option either in MAX or the Camera File Generator.The L304kc camera file only provides pre-defined pulses, or MAX only offers "External","ISO","RSTI" options for the CC1 sources.
Is it possible to route the encoder signal from the IO extension board directly to the CC1 of the camera? Or is there a work-around?
Thanks!
Derek Chan
Application Engineer
Basler Asia Pte Ltd

Hi Alex,
I posted the following (similar) text to the support center but I think it is of common interest:
A) CL-card with ext. board. One can use the ISO, ext. and RS422 encoder inputs and also output cannels ISO and external.
There is also a SMB connector corresponding to the ext. channel 0.
B) with MAX one can define what kind of signals should be routed to CC1 to CC4. As I learned from
this side one cannot use MAX or the Camera File generator but has to do this manually in order to use RS422 encoder triggering!!!
C) on the other side there exists function to route and control signals explicitely, for example
* imgSessionLineTrigSource2 -> what is this good for then? All your manuals are saying that this is done in MAX or the camera file by defining what signal drives the correspondung CC ine?? On the other side there is an example in CVI that does not work ("Trigger Each Line From Encoder") (at least it does not work with the PCIe1430).
D) Can one implement the CC routing from MAX or the camera file manually with the following functions
* imgSessionLineTrigSource2
* imgPulseCreate2
* imgSessionTriggerDrive2
or does MAX use hidden functions ore mechanism to control the CL Cards?
E) I can use one single line to setup scaled encoder triggering
* imgSessionLineTrigSource2(iLS_ZK1_SessionID, IMG_SIGNAL_SCALED_ENCODER, 0, IMG_TRIG_POLAR_ACTIVEH, 0);
but this only starts to work if I reset the encoder position to zero by sending this to the CL card, i.e.
* imgEncoderResetPosition(SessionID);
AND only in positive counting direction!
If I just run though the zero position without a position reset I do not get ExSync on CC1????
Is the information where to route the Scaled encoder to coming from the camera file? Why cannot I simply and explicitely route the scaled encoder
signal to a certain CC line? Why using all those different approaches?
F) now if in addition to E) i use
* imgSessionTriggerDrive2(iLS_ZK1_SessionID, IMG_SIGNAL_EXTERNAL, 0, IMG_TRIG_POLAR_ACTIVEH, IMG_TRIG_DRIVE_SCALED_ENCODER);
to drive ext. 0 (SMB connector) I can see exactly this behavior on the scope. No signal until I reset the encoder counter. Then I get signals as long as the image sequence is running. After the recording the signal disappears.
kind regards, Holger h.baur(at)ivisso.com

PCI-6220 Analog output to Biometrics DataLOG?

Hello all,
I am trying to send an analog signal to our Biometrics DataLOG device. Currently, I have the PCI-6220 card installed and am running the signals through a BNC-2111 DAQ. I am getting no output from our card through our DAQ, any suggestions? Thank you!

Provide some detailed information. How is the 6220 configured? How is it wired to the bnc? Do you see an output when you test the device in MAX? Are you checking the output with a meter or a scope or are you just relying on this unknown (to most of us) logger?

PCI 6220 digital I/O CB68LPR

Hi,
I would like to know how to connect the PCI 6220 with CB68LPR for digital input and output? appreciate your answers.
regards,
nazreen

Hello Nazreen,
You can use the SHC68-68-EPM 68 Pin Shielded Cable (part #: 192061-01) to connect your PCI 6220 to the CB-68LPR.
The CB-68LPR connector block has 68 pins labelled "J0" through
"J67". These pins have a one-to-one correspondance with the 68
pins of your PCI 6220, i.e. pin "J5" of the CB-68LPR correspondes to pin 5 of the PCI 6220. From looking at the M-Series Help
manual under 'IO Connectors and Pinouts'', you can find what pins
correspond to what actual signals on your DAQ device. The PCI
6220 has three ports (groups of 8 lines) available for digital
I/O. I can see from the pinout diagram for the 6220, that port 0
line 0 (P0.0) corresponds to pin 52, or terminal "J52" on the
CB-68LPR. I hope this helps!
Travis G.
Applications Engineering
Message Edited by Travis G. on 04-05-2006 04:54 PM

PCI-6220 COUNTER (Labview): Does "Sample Source" = "Gate Source"?

Hello,
I'm using Labview, DAQmx, PCI-6220 (Counter0). I connected an incremental encoder signal to the source input of CTR0. In Labview, the "DAQmx Timing" vi requires that the "source" input be wired. Does this "source" actually mean the source of the sample clock vs. the "Source" input to the counter?
Thanks for your assistance,
Chris

Chris,
When you talk about using a DAQmx Timing vi, I assume that you are performing
buffered event counting or any other task that performs buffered acquistion.
You can see an example that performs buffered event counting in NI Example
Finder called Count Digital Events Buffered - Continuous. The DAQmx
Timing vi in this example is used to read the current state of the counter
into memory at a constant rate. The source input of the Timing vi in this
case means the source of the sample clock. This clock is what determines
when the counter state is read and stored into a buffer.
If you are performing event counting, and do not need buffered acquisition (no
sample clock), you can look at example Count Digital Events.vi in Example
Finder. In this example no DAQmx timing vi is used.
Regards,
Jesse O.
Application Engineering
National Instruments
Jesse O. | National Instruments R&D

Optimum sampling freq. in PCI-6220 DAQ

The NI PCI-6220 DAQ has a fixed anti-aliasing filter (called "small signal bandwidth" in the documentation) of 700 KHz. The DAQ itself has a maximum sampling rate of 250 KHz.
Currently, I sample a given signal (which may have lots of interferences) at 256 Hz, and then digitaly filter it and decimate it to get a final sampling rate of 16 Hz. This gives me a signal of a bandwidth up to 8 Hz, which is fine. Thus, I effectively oversample by 16, and then decimate by 16.
I am wondering that, since the anti-aliasing filter is 700 KHz, then I might be better off sampling at a much higher rate, say 200 KHz, and then filter-decimate accordingly. I believe this should give a better performance since the anti-aliasing filter will work best in this case, while if I sample at 256 Hz then I am effectively not benefiting much from it.

Your sampling rate needs to be at least twice as high as the highest frequency interfering signal, so it sounds like >=100 kHz will be needed to meet the Nyquist criterion on all the interference. Any interfering component which is aliased in cannot be removed by filtering or other post processing. So you need to prevent the aliasing.
The 16-bit converter of the 6220 has a theoretical dynamic range of ~96 dB. So to get the best measurement of the interfering signals you want to make sure that the signal is very near the full scale of the selected range.
Even a simple RC antialiasing filter with a time constant of ~10 ms would substantially reduce the higher frequency interference components and make you signal processing much simpler. Why do you not want an external filter?
Lynn

Trouble Acquiring Digital Input through 1302- 1180- 1349-PCI 6220- software

Hi,
I've got an SCXI-1000 chasis, and I'm trying to use an external clock and trigger signal to acquire data from a BNC 2095 board. I have the 1302 unit to input my external digital signals. The information feeds through the following units: 1180--> 1349 --> SHC 6868 EPM cable --> PCI 6220 card --> software
I've got my trigger connected to terminals 39(+) and 24(-) in the 1302 unit. The external clock is connected to terminals 38(+) and 33(-).
Within the DAQ Assistant, I've selected the trigger as PFI 1 and the clock as PFI 0.
I'd like to test the setup, but the test panel in the MAX won't let me select PFI0 or PFI0 as a channel. I've also got a acquisition VI made, but it doesn't log any data even though there are no errors. That's why I want to check that I'm getting the trigger/clock signals properly.
Any ideas on what to check or change?
Thanks,
Michael

Hi Michael,
In general, it's not a good idea to call the DAQ Assistant in a loop, since it allocates and frees resources every time it runs. You might want to take a look at the DAQmx examples in the NI Example Finder (Help>>Find Examples). There are located in the Hardware Input and Output\DAQmx directory in the Example Finder. There are several examples, with several timing and triggering configurations.
Here is some information about reference triggers: In NI-DAQmx, the stop trigger is referred to as a reference trigger. The reference trigger establishes the reference point in a set of input samples. It allows you to acquire samples both before and after the trigger is received. The number of pretrigger samples to be acquired is set using the Pretrigger Samples input. The number of posttrigger samples to be acquired is automatically determined by subtracting the number of Pretrigger Samples specified from the number of Samples to Read specified.
Also, take a look at the article I am linking below for information about NI-DAQmx. I hope all of this helps!
Learn 10 Functions in NI-DAQmx and Solve 80% of Data Acquisition Applications
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National Instruments

Synchronizing 1 PCI 6220 and 2 PXI 6711 Boards

Hello,
I have created a program that writes both digital signals to the PCI 6220 board and analog functions to two 6711 boards. Upon testing the output of these boards on the oscilloscope, I discovered that the timing of the digital board was about a half of a second behind the timing of the analog board. If anyone has any ideas about why this may be happeneing itd be greatly appreciated. I believe it is a synchronization mistake. I have the boards connected with an RTSI cable but i never reference the cable in the program.
Attachments:
Ultracold Bloom User interface.vi ‏77 KB

One solution would be to run a wire (a real one! you know with copper inside it? ) from the counter output to one of the PFI lines on the same card and then tie the PFI line to RTSI bus...
There might be a more elegant way of doing it that someone could share, but this would certainly work. Just make sure that you document in your code the assumption that this jumper wire is in place.
Mike...
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"... after all, He's not a tame lion..."
Be thinking ahead and mark your dance card for NI Week 2015 now: TS 6139 - Object Oriented First Steps

PCI 1422 how to aquire 12 RGB

Hello,
I an using a PCI 1422 with a non standard camera signal (12 bit RGB).
At the monemt i am able to capture the signal
in 12 bit black and white.
What must be done that i can capture the signal in RGB
(4 bit each color)
If i use 24 bit color depth the the signal will be dislayed in color, but all blue colors are missing.
How are the colors (24 bit) stored in the memory if i use a PCI 1422 wich has only 16 data bus?
What does the binaray threashold value in the camera file mean?
Juergen Dodek
Electronic Developer
mtu-friedshafen, Germany

I can see a couple of possible solutions.
One would be creating a custom cable that separates the 4 bits for each color into separate bytes, with 4 blank bits for each color. This could be input as 24 bit color perhaps. You might need to be using the PCI-1424, though, to get a full 24 bits input.
A second option might be to do the same thing in software. I am not sure if the ICD file has the flexibility to rearrange the bits like this.
Bruce
Bruce Ammons
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How can I tell if signals from two devices are truly synchronised?

Hi there,
How does one check that signals from two devices (two separate devices in a single X-series chassis) that should be synchronised actually are? I am using a PXIe6361 and PXIe4331 on a PXIe-1073, with Labview 2001 SP1 64-bit. All devices are using the Sample Clock from the 4331 device, and an AI Start Trigger, so they should be synchronised.
I thought that writing the signal data to file and checking the time stamp for each column of data would be the most accurate, but I have been told that timestamps are software created and therefore don't reflect the actual time that the signals were acquired by the hardware. When I do this, the timestamps vary by up to 150ms which is larger than I expected.
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What is the best way to check if signals collected on different devices in the same chassis are actually synchronised?
Thanks,
Claire.

Hi Lynn,
Thanks for your help and for sending the demo.
I understand the concept of how the signals will look if they're not synchronised and your demo shows that nicely. I guess I have been perplexed by someone else telling me that the timestamps in the output file (and following from that I assume timestamps on a waveform graph) do not give an indication of whether signals are synchronised. The reason they gave for this was that the timestamps are manufactured by the software, not the DAQ hardware. They suggested that I put the setting "ignore waveform timestamps" on my waveform graphs, and then check that both signals come in at the same time (i.e. both start at zero), but I'm not convinced about this.
When I use an analog trigger, neither the timestamps in my output file or on the two waveform graphs are synchronised. If I don't use the trigger, then there is far less disparity in the timestamps in the output file. I've attached two output files here, and my VI.
This is my first attempt to synchronise a voltage module and a strain gauge module on an X-series chassis, so I want to make sure that I'm achieving the best synchronisation that I can, and the difference in behaviour with and without the trigger worries me.
Thanks,
Claire.
Attachments:
without trigger.txt ‏5 KB
with trigger.txt ‏6 KB
Multi-Device Synch-Analog Input-Finite Acq-Analog Start_Claire_wDigitalin_12June2012 PTbridge.vi ‏196 KB

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PCI 6220 how to route I/O signals?

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