Camera link protocol implementa​tion on FPGA

Question

Hi,
I want to configure the Basler camera parameters like exposure time, frame rate, Gain value etc. through 7966R FlexRIO & 1483 Camlink adapter module. But on FPGA there is no option to configure these parameters through .icd file or MAX. So I have to implement the Camera Link protocol in FPGA to configure these parameters of camera.
I found that camera link has 4 controls lines (CC1 to CC4) but I am not able to find how these lines works to control the parameters of camera. If anyone knows how these control lines work then please tell me or share any document to describe their operation. Or any other information through which I can implement the algorithm on FPGA to control the parameters of camera.
Any help will be appreciate
Regards

Answer 1

I ran into multiple issues with the Serial Server running through the 1483/7966.  I was never able to reliably get the serial server to operate through the MAX NI Vision CLSerNat function.  It seems the 1483 is just not well supported in Max in any way.  This prevents the use of Pylon as your serial command/status tool.  Those work great with other frame grabbers like the 1433, but the 1483 leaves you having to implement the entire capability yourself.
So, I wound up having to write my own serial driver for the BBPI protocol and message processors for the various standard message types the Basler ACE cameras respond to.
Though I can't provide code, if you need to write your own protocol stack and have questions on the Basler interface, I'm worked through many of the issues.
One issue you may encounter is with the serial server itself.  It operates in byte mode.  I was never able to understand the reasons, but between a VI running on a host PC interacting through the stock serial server running on an FPGA (7966) through a RT target (PXI-1082) byte mode inserted very large inter-character delays.  Often so large as to cause the Basler camera to claim a timeout and terminate the command.  I had to modify the serial server to operate in a one-shot FIFO mode for transmit data as follows:
In the FPGA serial_interface.vi (For non byte-mode)
Increase the FIFO to 64 bytes to accomodate the largest Basler message
Add a "Transmit now" control to trigger a full FIFO output
Add a "Transmit length" control to control the number of bytes transmitted
In the upper level serial_server.vi
Modify the transmit loops to better detect bytes to transmit from the Ethernet interface and to direct the transmit data to the new WriteBytes vi
In the FPGA_UART.llb library
Add an FPGA_UART_WriteBytes.vi to handle the non byte-mode modification and to 'chunk' up transmit data into 64 byte (max) pieces.  In the BBPI and Basler protocols, this has not been seen since all the messages are small.
With these modifications, I could then write a state machine to handle the basler BBPI protocol.  States I chose for this were:
Idle
When a command is queued, it is fed to the serial server in its entirety.  The serial interface sends it to the camera as a complete message with no inter-character gaps)
Wait for ACK
Every command must have an ACK/NACK
Go back to idle if sending a write or command message
Wait for BFS (Only if sending a read request)
Wait for FTF
Wait for the data lengthbyte
Wait for BFE (Goes back to idle once all bytes received)
It's up to you if you want to handle the checksum capability of the BBPI protocol.  It's surprisingly tricky.  I hsould have saved myself the headache and just worked entirely in non-checksumming mode.
Once I got that all working, I could then write message handlers for each of the basic Basler message types:
Enum
String
Bitfield
Scalar
etc..
followed by specific message handlers for each of the messages I wanted to deal with.  My usual technique is to perform a mass serial configuration as soon as I fire up the FPGA.  I haven't tried to use the trigger port signals (CC1 etc) but those can all be configured and controlled through the serial port once you get a message passing capability in place.