Compteur cRIO

Bonjour a toutes et tous.
j'ai réussi à faire l'acquisition d'un signal carré variant de 1Hz a 30Hz sur une entrée numérique du cRIO. J'aimerais réaliser a chaque pulsation une incrémentation sur un compteur puis pouvoir multiplier ce résultat. J'ai entendu parler du module incrémenter PPP qui apparemment ferait l'affaire mais n' es pas disponible dans la version étudiante de LV.
Avez vous une autre solution?
Est il possible d'enregister les résultats dans la mémoire du cRIO?
je vous remercie.
bonne journée.
Résolu !
Accéder à la solution.

Bonsoir,
Le numérique 300 permets simplement de cadencer la boucle à raison de 300ms. Soit 300 ms entre deux itérations de la boucle while. La boucle while et son cadancement permettent simplement de vérifier le fonctionnement du code de détection de front montant.
Le code permettant de réaliser la fonction de détection de front montant utilise:
- un ou exclusif ( équivalent à un comparateur en logique booléenne), permettant de détecter un changement d'état sur le booléen "signal".
- un nœud de rétroaction ( équivalent à un registre à décalage) disponible depuis la palette de programmation ( identique a celle où se trouve les boucles while, for...)dans le diagramme, permettant d'avoir l'information N et N-1 de la valeur de "signal". Si N et n-1 différents, cela signifie que "signal" à changé d'état.
- le Et logique, permet d'identifier un front montant. Si N= vrai, et N différent de N-1 -> front montant
Bonne soirée,
Rémi D.
National Instruments France
#adMrkt{text-align: center;font-size:11px; font-weight: bold;} #adMrkt a {text-decoration: none;} #adMrkt a:hover{font-size: 9px;} #adMrkt a span{display: none;} #adMrkt a:hover span{display: block;}
>> Les rencontres techniques de NI - Mesures et acquisition de données : de la théorie à la mise en ...

Similar Messages

Reset compteur 9401

Bonjour, merci de prendre le temps de me lire et de me répondre..
1) Comment effectuer le reset du compteur internet d' un module 9401 sur un cRIO ?
2) Comment exporter son VI sur lle cRIO pour pouvoir effectuer des mesures embaquées, les enregistrées puis les lire.
Merci beaucoup

Bonjour Falkinou,
Pour la première question, la réponse se trouve ici : http://forums.ni.com/t5/Discussions-au-sujet-de-NI/RAZ-compteur-9401/td-p/2177722
Pour la seconde, je vous propose d'aller à l'adresse suivante : <link no longer exists>
N'hésitez pas à poser des questions si jamais quelquechose semble obscure.
Romain P.
National Instruments France
#adMrkt{text-align: center;font-size:11px; font-weight: bold;} #adMrkt a {text-decoration: none;} #adMrkt a:hover{font-size: 9px;} #adMrkt a span{display: none;} #adMrkt a:hover span{display: block;}
>> NIDays 2011, le mardi 8 février au CNIT de Paris La Défense

Migration d'un système CRIO vers SBRIO

Bonjour,
Je travaille pour le moment sur un projet de robotique dans le cadre de mes études.
Le dévelloppement du projet à été effectué sur un compact RIO (cRIO-9022) avec les modules suivants NI9423 et NI9853 qui sont respectivement 8 entrées numériques et un module de communication CAN.
Le dévellopement du prototype étant abouti, nous avons décidé de passer à une version avec l'intelligence embarquée. D'ou mes questions ?
Je possède donc actuellement un procéseur cadencé 533MHz et 256Mo de DRAM : (ici)
et les nouvelles posibilités qui s'offre à moi sont :
Une SBRIO 400MHz et 128Mo de DRAM : (Ici)
Une SBRIO 400MHz et 128Mo de DRAM : (Ici) (uniqument I/O numerique)
Une SBRIO SOM 667MHz et 1Go de RAM :(Ici) (avec Linux Real-Time)
Comment faire mon choix ? Comment être sur que la puissance de calcul sera suffisante ? Ou puis-je trouver des datasheet complètes ?
(Sachat que si aucun des paramètres n'est limitant je prendrait la carte la plus petite en taille)
Et maintenant des question subsidiaire par rapport à l'utilistaion du FPGA (ce qui aurais comme avantage de retirer le besoin de I/O analogique) :
Les I/O numerique sont elles toutes accesible au FPGA ?
Est il possible d'y programmer un commande PWM ?
Est il possible d'y programmer un comparateur avec comme référence des resistances externes?
Enfin, est ce qu'une carte fille est l'équivalent d'une carte Mezzanine ?
Existe-t-il des cartes filles : shield SD ou WIFI ?
Merci d'avance pour vos avis et votre aide.
Julien

Bonjour,
N’ayant pas plus d’information sur votre application, je me permets juste de vous donner quelques indications et pistes pour vous aider.
En ce qui concerne le choix de la carte sbRIO, il faut que le processeur celle-ci dispose de ressource suffisante afin d’exécuter : en clair que la vitesse du processeur et la RAM soit suffisante pour faire tourner votre application.
Est-ce que lorsque vous la faites tourner sur le cRIO 9022, 100 % de la RAM est utilisé ? Si c’est le cas, il faut songer à opter pour au moins 256 Mo de mémoire RAM. Pour avoir des informations, je vous recommande, d’utiliser le nœud de propriété suivant, accessible dans la palette real time des fonctions de LabVIEW :
En ce qui concerne les datasheets, vous les trouverez sur le site de National Instruments.
En ce qui concerne la partie FPGA, vous pouvez connaître le nombre de cellule et porte logique utilisé par votre application sur le FPGA du cRIO 9022. Le but est ici pour vous d'évaluer la taille du FPGA dont vous allez avoir pour votre sbRIO :
http://digital.ni.com/public.nsf/allkb/F19BBE8753BA805A8625733800382802
En ce qui concerne les I/O numériques, elles sont toutes en théorie accessible au FPGA, ce qui peut les rendre inutilisable est le câblage et les accessoires de connexion que vous mettez en oeuvre.
Vous pouvez facilement implémenter un compteur dans un FPGA, et donc une PWM.
En ce qui concerne le comparateur de tension, à l'aide de résistance externe, au premier abord, votre application ne me semble pas réalisable : -un FPGA ne gère pas les signaux analogiques (des sbRIO intègrent des CAN, et dans ce cas, peuvent mesurer une variation de tension)
-un FPGA ne délivre pas de puissance : en clair, si vos résistances sont trop faibles, votre FPGA va devoir fournir trop de courant et la sbRIO sera endommagé.
Les cartes filles ou Mezzanine se connectent au connecteur RMC des sbRIOs qui en disposent. Elles permettent en fonction de leur spécification d'accéder aux E/S numérique de la carte (9694), de connecter des modules du conditionnement du signal (9693) ou encore d'avoir plus d'entrées analogiques (9683).
A ma connaissance, il n'existe pas de sbRIO qui intègre le Wifi.
Le myRIO intègre un FPGA, un processeur et peut se connecter au Wifi :
http://www.ni.com/myrio/buy/f/
Cordialement
Guillaume D

Highest speed for a loop in the microprocessor of my CRIO?

Hello:
Im trying to develop a control system for an inverter with with my CRIO 9022, the speed of my system is 10 kHz(the switching frequency for the inverter is 10 kHz).
Im trying to develop the controller using the microprocesor, but I was reading that the highest speed achievable for a loop in the microprocessor is around 1 Khz, is this true?
If is it, how can I develop a control with a loop of 10 Khz? this speed is only achievable using the FPGA?
Thanks a lot!
Regards

Sorry for dont attach the subVI, but the calculation that I perform inside are not diffcult, the first one is only aritmetic calculations and the second one is a PID (I attach them).
Maybe I can try to move them to the FPGA, but would be very tedious because I need huge times for compile and if I want to make any change will be very more difficult.
Do you think that the processor can not carry out these loop a higher speed than 400 Hz?
Thanks
Attachments:
SubVI1.PNG ‏50 KB
SubVI2(PID).PNG ‏81 KB

Image processing with cRIO-9074

Hii...
I am working on Image Processing. Can anybody send an example of cRIO (fpga interface mode) for Image processing applications.
I need example for how to use DMA FIFO for sending an image to FPGA, and back to host VI after processing on FPGA.
Thanks
Prashanth

hey sorry,
It is job openings board. Ignore the above thread
Thanks

Custom device / I am trying to use a vehicle controller model developed in LabVIEW with compactRIO (cRIO-9024)

Now I have developed a vehile controller model with LabVIEW so as to run on VxWorks operating system. ( compactRIO cRIO-9024)
And I converted a controller model of labview into *.lvmodel in order to use it as I did with simulink models.
However, converted *.lvmodel was not supported for VxWorks operating system. so after searching for this, I found out that I have to use a custom device.
I am now studying the custom device, but it looks diffcult because I dont have much experience in real-time system.
Here are my questions.
1. Simulation model in VeriStand
Should I convert a labview controller model into *.lvmodel even if I use the custom device in order to run on VxWorks operating system?
If not, what should I do after building a controller model with labview?
2. Operating system
It is silly question. anyway, as long as I run a controller model on compactRIO cRIO-9024, the operating system always has to be set to VxWorks. Is it right?
3. Custom device
This is the most difficult thing. I dont know even what to do. What functions should be inside a custom device template tool? The controller model send output signals to a vehicle model, and receive input signals from a vehicle model.
Thank you in advance.
Hognjun

Hi,
You should post this on the Veristand Forum.
http://forums.ni.com/t5/NI-VeriStand/bd-p/440
Ravi

I am recieving an Error code when I try to compile a program to an FPGA chp in a cRIO but I don't know what the code means.

This is the message that I am recieving when I compile to the cRIO I am working with.
FATAL_ERRORortabilityortDynamicLib.c:358:1.27 - dll open of library
   <C:/NIFPGA85/Xilinx\bin\nt\libGenXstTask.dll> failed due to an unknown
   reason.   Process will terminate. For more information on this error, please
   consult the Answers Database or open a WebCase with this project attached at
   http://www.xilinx.com/support.
I have no idea what this means. Thank you in advance for the help.

UtahTiger;
First let me ask a few basic questions
What version of LV are you using?
What OS is your development machine?
When in the compile process does this error occur?
Can you compile other (blank) VI's, id the problem with this particular project?
Have you been able to compile this project before. what changed?
Once I know a little more about your system we can narrow down the source of your error.
Message Edited by Huter on 04-29-2009 04:16 PM

Error when running simulation with SIT 2010 on a cRIO 9073, what do I need to install on the cRio?

Hi.
I am trying to run a simulink model on a cRio 9073 using SIT 2010. I succesfully created the FPGA vi and the lvbit file in order to map input/outputs to the model. I also created the DLL and OUT for the model.
When I run the interface VI on my computer, everything seems OK, until I get the following error and I am not able to run the simulation. I found a similar post earlier that suggests that I need to install the shared variable engine or the Simulation Interface Toolkit on my cRio. I tried to do both using MAX but could not find neither of the suggested installations.
Thanks for the help!
Items.viNI_SIT_driversupportVIs.lvlibIT Probe Model Items.vi loaded with errors on the target and was closed.
LabVIEW: Failed to load shared library SITs.*robeSignals:C. Ensure that the library is present on the RT target. Use MAX to install NI software or FTP to transfer custom libraries to the RT target.
Items.viNI_SIT_driversupportVIs.lvlibIT Probe Model Items.vi loaded with errors on the target and was closed.LabVIEW: Failed to load shared library SITs.*robeSignals:C. Ensure that the library is present on the RT target. Use MAX to install NI software or FTP to transfer custom libraries to the RT target.

Hola jarcTec;
Este tipo de error suena suele ocurrir cuando no se tienen las librerías apropiadas instaladas en el cRIO. Te recomendaría que abrieras MAX, debajo de la pestaña de Remote Systems selecciones tu dispositivo>> software, click derecho e instalar software. Aquí debes asegurarte que las librerías que te faltan estén instaladas en el cRIO. En Custom Installation selecciona SIT como opción para instalar en el cRIO tal y como se muestra en las imagenes.
Espero esta información te sea de utilidad
Exito en tu aplicación
Marisol

How can I use a USB camera with cRIO 9022. Please see my strange problem.

Hi,
I would like to use a USB camera with NI cRIO 9022. I used the same USB camera with NI USB 6216 DAQ device and developed a VI(within a PROJECT and outside it). So, It is working fine with NI USB 6216 device when I use the Vision Assistant Express VI and gets detected in its Initialization Window. Please see JPEG File 3 where I get NO ERROR.
I am facing a problem when I want to use it with NI cRIO 9022. What exactly I am doing in this case is:
1) Create a NEW PROJECT
2) Add Targets and Devices(NI cRIO 9022)
3) Use the Scan Interface mode
4) Create a NEW VI under the cRIO 9022 device
5) Use a Timed Loop(Synchronized with Scan Engine) for continuous Data Acquisition and Sending from the Analog I/O modules.
6) Use the Vision Assistant available through the NI Vision Acquisition 2010 Module(I get STUCK HERE! The Express VI opens the Initialization Window, but I don't see the USB camera like in JPEG File 3)
I am facing difficulties with this HOST COMPUTER, cRIO implementation differences. On my host computer I have the software packages as shown in JPEG File 1, and on my cRIO 9022 as shown in JPEG File 2.
Can someone guide me how to overcome this and get the USB camera detected when I am using NI cRIO 9022?
NOTE: If this is a problem with software mismatches on HOST and NI cRIO 9022 device, please see JPEG Files 1 and 2 for available software and Host and cRIO 9022.
Thanks.
Amar.
Attachments:
NI Vision Acquisition Express Error for NI cRIO 9022.JPG ‏39 KB
IMAQ and dx Modules Installed on my NI cRIO 9022 hardware(No NI Vision Acquisition 2010 SP1).JPG ‏82 KB
NI Vision Acquisition Express NO Error for NI cRIO 9022.JPG ‏48 KB

Only GigE comms are supported on the cRIO Real Time OS. Have a look at the following:
Machine Vision on NI CompactRIO and Single-Board RIO
Adnan Zafar
Certified LabVIEW Architect
Coleman Technologies

How can I configure one of the gateway NI9792 Ethernet port to communicate with a cRIO PAC ?

Hi NI Engineers,
I intend to use my gateway NI9792 the following way:
1. One Ethernet port for network connection. That's how I'll develop it, download software and monitor my application through my PC at my desk.
2. Can the other port be used to communicate with a cRIO device? If so, how can I do it?
It seems to be a stupid question, but I truly could not work this out!
Thanks in advance,
Luiz
"Together we stand, divided we fall..."
Certified LabVIEW Associate Developer
Solved!
Go to Solution.

Good afternoon, Luiz
Follow the first link to guide which module can be used and other links to the best part of bore configuration CRIO. Any questions please contact us.
How Do I Configure My Time Server on the NI WSN-9791 or NI 9792 Gateway?
http://digital.ni.com/public.nsf/allkb/44FA322FAFF8D58D862575BD00591A54?OpenDocument
NI WSN Product and Configuration Guide
http://zone.ni.com/devzone/cda/tut/p/id/8710
Configuring the Dual Ethernet Ports on Real-Time Controllers
http://digital.ni.com/public.nsf/allkb/67F94BB93BCE32CF86257367006B3659?OpenDocument
video setup and installation CRIO
http://www.ni.com/swf/demos/us/crio/outofbox/
Automatic Network Configuration for cRIO-9073 and cRIO-9074 CompactRIO Controllers
http://digital.ni.com/public.nsf/allkb/37C790309A210A748625757000570938?OpenDocument
Sincerely,
Mauro Vera.

Two cRIOs with the same code in 1 project

I have a project that contains two cRIOs that run the same exact
program. The only difference is the IP address in the ni-rt.ini file.
I would like to create a project that represents the actual targets but
uses the same vis. In doing this I found the FPGA targets must have a
different name and therefore a different bit file. Also, the DMA FIFO
is a different instance in each target. I'm really trying to get away
from supporting two copies of the same exact code.
So, it seems this type of project doesn't fit well into the project
explorer and decided to create only 1 target with 2 source
distribution's. I can create 2 source distributions but the target
destination directory must be different. Had anyone run into this
situation and come up with a better way to handle this? I guess I'm
back to manually deploying the files and making sure the correct
ni-rt.ini file get placed in the corresponding cRIO.

Dwisti,
I suggest you look into using the Open FPGA Reference node in Bitfile
mode (right-click the Open FPGA Reference node). From my experience,
that's the best way to share the same FPGA code between multiple
targets; you just need to be aware that if you recompile, you may need
to point the Open FPGA Ref node to the new bitfile. With this approach
you don't really need to have the two FPGA Targets in the project; just
keep one as the master and that should be it (in case the FPGA Targets
are of the same type)
Hope this helps.
JMota

How do I have a cRIO register its IP address with the DNS server, clearing any previous entries?

I've run into a problem when I try to move a cRIO-9073 from one network segment to another (say 10.1.33.x to 10.1.36.x): The old IP address remains registered on our DNS server, so trying to access the cRIO by its DNS name fails as the DNS server tells my PC to look for the old IP address.
When I search the DNS server from my PC using "NSLOOKUP" with the old IP address, it finds the DNS name of the device. If I repeat the search with the new IP address (MAX finds the device with its new address, but I hate to have users use MAX to find it), it again returns the DNS name, so it appears the DNS name is registered under two IP addresses on our DNS server. I've also repeatedly tried to flush my PC's DNS cache using command "IPCONFIG /FLUSHDNS", but it still tries the old IP address. I also see in MAX that the cRIO is using the same DNS server my PC uses.
Our IT people say that I have to tell the device to re-register its DNS name. They told me a command to do it from Windows (command "ipconfig /registerdns"), but obviously this is VxWorks on the cRIO. Is there a command to do this on the cRIO or a setting in the "NI-RT.INI" file I can change? I honestly don't think this is the issue (as it successfully registered the new IP address under its name), but I want to try it if it's possible.
Thanks!
Erik
ps - Our IT dept. won't let me use static IPs unless I get them assigned by both their MAC address AND the network jack they're connected to, so that's out.

Normally this is actually a function of your DNS server. It needs to perform a periodic flush of stale records. You can check the RFC for the DNS protocol and build the necessary packet yourself.
Mark Yedinak
"Does anyone know where the love of God goes when the waves turn the minutes to hours?"
Wreck of the Edmund Fitzgerald - Gordon Lightfoot

How to achieve high usb data rate with cRIO-9022?

Hi all,
I read the datasheet of NI-9022 and know that USB data rate can be 480Mb/s.
I want to transfer data with rate 3.6MB/s which is much slower than the spec, but the result is time out error.
I check my FPGA and RT code by save to RT disk and the result is pass. So I think my code should be correct.
Is that because the USB driver not installed into RT?
Should I install the USB driver into RT?
Or is there any other issue I haven't find?
Thanks a lot.

According to this document: Data Storage Options for CompactRIO, depending on many conditions, such as complexity of processor
requirements, USB data can be transferred off the controller at
approximately 700 KB/s.
Also, you don't need a driver to get a USB mass storage device to work on the cRIO. Have a look at this document:
Utilizing Features of the USB Port on My cRIO-901x or My cFP-22xx Controller
Not sure if these issues are causing timeout errors. What happens when you transfer data at lower speeds? Do you get timeout errors then?
Adnan Zafar
Certified LabVIEW Architect
Coleman Technologies

How can I diagnose a Labview RT program crash on cRIO 9073?

I have 2 cRIO 9073 purchased about 1 year apart. Both are running the same realtime application. The first cRIO runs fine. The 2nd cRIO crashes intermittently while executing 1 particular VI that contains 2 timed loops running in parallel (1 collecting data and the other controlling machine movement). When it crashes, the app stops, web server and FTP stop responding, MAX cannot communicate with the device ( I must perform a hard reset). After reset, viewing the error log using MAX shows no errors. I've added message logging to see if it stops in a particular place, but see no patterns. In some cases, the device seems to be continually restarting (every 2-3 minutes) until it finally hangs. In many instances, my configurations files (used to store runtime variables) have been corrupted or erased. When trying to deploy the app on this Rio, I generally must try multiple times because I receive the error, "Error deploying on target". I have tried formatting the flash and reinstalling the OS many times from different sources.
I'm running Labview 2009, SP1 with the FPGA option.
Any ideas on how to diagnose this problem? Are there any diagnostic tools to test this device?

Here's a better description of what I'm trying to do. This system is used to control the head position on a test machine. I used the LV RT wizard to create the base VI with 1 deterministic loop and 1 non-deterministic. The deterministic loop schedules 2 different test. Test 1 is every 5 minutes (collect analog data, read temperatures, calculate new head position based on temperature , drive stepper motors to new position, collect data after moving, then dismiss). Test 2 runs once a day with a duration of about 4.5 hours (drive stepper motors to user defined position, simulatiously collect data at various rates from 5Hz to .01 Hz, drive head to next user defined position, etc). This test has 2 timed loops running at different rates, one collects data, the other moves the head and acts as a timer to know when to move to the next position.
If I never run test 2, then the system has never crashed, leading me to believe the problem is in the test 2 VI. The crashes don't necessarly occur in the Test 2 VI. On some occations 1-2 hours after Test 2 has completed, the CRIO will start rebooting itself (every 2-3 minutes). This may happen 4-5 times until it will finally hang completely.
Since the crashes happen randomly (it may run for 2-3 days before crashing) I'm trying to find some way of trapping errors or exceptions that would give me some clue as to what the problem may be.

How to get system time from cRIO?

Hello,
I have an NI cRIO-9076 chassis with an NI-9467 GPS module and an NI-9234 module.
I've downloaded the FPGA Timekeeper application which synchronises the FPGA clock to the 1PPS GPS, this works well. What I want to do is create a trigger that at a pre-defined HH:MMS the system will start to acquire and log data from the Accelerometers connected to the NI-9234 module.
I have added the controls for the entry of the HH:MMS and calculated the time in seconds. I would like to compare the system clock once it is locked to the entered timestamp and then trigger.
As I only have a value that represents seconds in the day I need to calculate the offset from EPOCH to compare against the GPS time reference. I have read that the NI system clock runs from 01/01/1904 instead of the EPOCH 01/01/1970.
The question is how do I get the current system time so that I can compare it against the entered time? I only need seconds in the day = (HH * 3600) + (MM * 60) + (SS)
Thank you,
Kind Regards,
Simon

You should use the Get Date/Time in Seconds VI which will return a timestamp. You can then format this timestamp using the Format Date/Time String to give you exactly the time format that you need. Then you can extract the numbers you need and do your math.
www.movimed.com - Custom Imaging Solutions
Attachments:
Get Seconds in Day.vi ‏9 KB

Compteur cRIO

Similar Messages

Maybe you are looking for