"External sample clock" and "Rate" for digital input acquisition

Dear all,
I want to acquire digital input (21 bits with external clock = 50 kHz) with a PCIe-6343 NI board. Using the DAQ assistant under Labview, I selected the advanced timing with the sample clock time parametrized as External. However, it is also possible to select the Rate of the acquisition. In my case, i want to get the data at the rising edge of the external clock signal, so at a frequency of 50 kHz. How can I do that ? I just need to put a Rate of 50 kHz ?
thanks for your help.
Cedric

Cedric,
dddsdsds wrote:
[...]In my case, i want to get the data at the rising edge of the external clock signal, so at a frequency of 50 kHz. How can I do that ?[...]
You answered your question already. If you want to use an external clock, you have to configure the timing source of your task to be external. In order of proper buffer configuration, you should enter 50kHz as rate in addition to the external configuration, but this will not influence the speed of the acquisition (since it is "clocked" externally!)
hope this helps,
Norbert
CEO: What exactly is stopping us from doing this?
Expert: Geometry
Marketing Manager: Just ignore it.

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Hi!
I have a cDAQ-9172 with a NI 9401 C-series module (digital). I would like to sample the digital inputs with a sample rate of e.g. 400 kHz or 200 kHz. My problem is that I can only select a the 100kHzTimebase clock, and therefore only get a 100 kHz sample rate. The 20MHzTimebase clock is too fast, since it gives me a sample rate of 20 MHz). Is it possible to get a user defined sample rate of e.g. 200 kHz, by e.g. dividing down the 20MHzTimebase clock?
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The cDAQ-9172 chassis does not have an internal timing engine for digital input however you can use one of the onboard counters to generate your clock. Set your pulse train generation counter to be one of the internal counters, such as "cDAQ1/_ctr0" and your digital input sample clock source to be /cDAQ1/Ctr0InternalOutput".

Can buffered digital edge detection only be performed using an external sample clock?

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Sharing an external sample clock between PCI-6722 and PCI-6602

I need PCI-6602 work with PCI-6722。6602 shares 6722’s ao/SampleClock as external clock and triggered by 6722’s ao/StartTrigger。The master device is 6722, which refered as Dev1, and the slave device is 6602, which refered as Dev2. A RTSI line is used to connect the two devices correctly.
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1、DAQmxCreateTask("NI6672", &hAOTask);
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8、DAQmxSetTrigAttribute (hCounterTask, DAQmx_ArmStartTrig_Type, DAQmx_Val_DigEdge);
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//start counter task first
11、DAQmxStartTask(hCounterTask);
//start 6722 task
12、DAQmxStartTask(hAOTask);
I run it on the MAX virtual Device, and the Step 11always returned -89120。
I try to slove this problem, so I change the Step 7, use /Dev2/PFI9 to instead of /Dev1/ao/SampleClock.
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DAQmxConnectTerms( "/Dev1/ao/SampleClock", "/Dev2/PFI9", DAQmx_Val_DoNotInvertPolarity );
The program also run well. But I am still not sure that 6602 is sharing /Dev1/ao/SampleClock。If not, which terminal of Dev1 is connected by /Dev2/PFI9?
Is my code right? If not, hwo to fix my code or supply some example for me? Thanks.

Hello Shokey,
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Slave Device:
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There is another forum that I think will help you out to implement this correctly. In this forum, the customer was trying to export a trigger through a RTSI and the problem he was experiencing was a broken RTSI cable. His code, he states, works. I hope this helps you with this and if you have any more questions, feel free to post.
Jim St
National Instruments
RF Product Support Engineer

External sample clock encoder

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Hi orsogna,
see the example Cont Acq&Graph Volt-Ext clock in the Labview Example Finder.
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I found one respond (http://digital.ni.com/public.nsf/allkb/884C5A76BA1A474E8625717A0068AA09)
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Hi Uli,
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PXI-5122 External Sample Clock

PXI-1031 Chassis
PXI-8106 PC
PXI-5122 14bit 100MS/s Digitizer
Labview 8.5
I am driving X-Y mirrors steering a laser.
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I have a pixel clock running at 60MHz that
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I am using [PFI0 with 'READY for START EVENT'] as
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CH0: Analog signal
SMA TRIG: line valid
AUX: PFI0 with 'READY for START EVENT'
In the property node 'niScope'
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Sample Clock Timebase Source = VAL_NO_SOURCE
Sample Clock Timebase Rate = 60000000
Sample Clock Timebase Divisor = 1
I get the following message:
Error -1074118614 occurred at Error occurred at: niScope Fetch Binary 16.vi:2
Possible reason(s):
Driver Status: (Hex 0xBFFA402A)
An acquisition has not been initiated.
Error -1074134971 occurred at Property Node (arg 4) in CSKB-4X_VID.vi
Possible reason(s):
The channel or repeated capability name is not allowed.
Attribute: NISCOPE_ATTR_SAMP_CLK_TIMEBASE_SRC, Channel: 0
Attached are the VIs with the elements added to the niScope property node
and without.
I get the above errors even when I set the 'Sample Clock Timebase Source'
to 'VAL_NO_SOURCE'
It appears, by just adding the elements, it gives me the error(s).
How can I get the external sampling clock to work along with external trigger?
Solved!
Go to Solution.
Attachments:
CSKB-4_VID.vi ‏148 KB
CSKB-4X_VID.vi ‏146 KB

Hi csk,
I was wondering if you could clarify how many
samples you wish to take. Am I correct that you wish to take 30,000
sets of 150 samples each, or do you mean you want to take 150 sets of
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are using is only going to acquire a single record each time through
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software.
For your application, it sounds like you will
need to perform a multi-record acquisition, as this will allow you to
specify what condition to trigger off of and how many samples to
acquire each time the trigger occurs. In this way, each "transition" of the sawtooth wave is considered a single record, and you are acquiring multiple different records corresponding to each time a rising edge trigger occurs. I believe that you can accomplish
exactly what you need with only a slight modification to the niScope
shipping example "niScope EX Multi Record Fetch More Than Available
Memory.vi" (found at Start » Programs » National Instruments » NI-SCOPE
» Examples). With this VI, you can specify that you wish each record to
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change the Configure Trigger VI to be a Digital Edge trigger rather
than an analog trigger. With this and a few other modifications (ie -
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6120 external sample clock

We have been successfully using the 6052e for some time now to acquire our radar�s analog output. This output consists of a data signal synced with a 20 Hz analog trigger that also comes from the radar. This has been a nice easy solution but now we have increased our frame rate from 20Hz to 60Hz. Quantitatively, the old system was taking 20Hz X 9,984 samples = 200 KS/s, while the new system takes 60Hz X 9,984 samples = 600 KS/s. The 6052e no longer could handle the increase so we purchased the 6120.
The problem we have now is that 6120 does not seem to support the same acquisition technique that we used with the 6052e.
Here is what we are doing with the 6052e:
We use the 6052e to generate a pulse train with frequency correspondin
g to our sample rate, which is gated by a signal that turns on when the trigger pulse occurs and stays on for a fixed number of samples. We then route that pulse train back into the board as our external sample clock. The problem seems to be that the 6120 does not support the external sample clock.
The reason we use this technique with the 6052e is to guarantee that we get the same number of samples between triggers.
Ian Starnes
Sr. Software Engineer
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Ian,
I am going to guess that you are experiencing this problem because our S-Series boards such as your 6120 use a pipelined FIFO ADC process. Specifically, our S-Series boards do not send the last 3 samples of an acquisition when using an external clock. The last three samples remain in the FIFO on the card. Therefore, if you begin your acquisition, receive a trigger pulse, then receive 9,984 clock edges on the sample clock, and then read all the samples in the buffer, you will only receive 9,981 samples. Consequently, if you set the AI Read.vi to read 9,984 samples it may timeout because it is still waiting for three more samples to be acquired. This would create the allusion that the external clock was not working with the 6120.
The good news is that i
t is easy to solve this issue. You simple need to read 3 less samples the first time AI Read is called. Therefore, the first time you call AI Read you need to read 9,981 samples and then the next time you call AI Read you will continue to read 9,984 samples. This will ensure that you will get the same number of samples between triggers except for the first time which will be short three samples. However, with this method, the first three sample of each trigger will be the last three samples from the previous trigger signal.
Please see this KB for additional information on how to ensure that you get the proper amount of data for each trigger signal that you receive:
http://digital.ni.com/public.nsf/websearch/D64CD277A6B739A186256A73007E7BCC?OpenDocument
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External Sample Clock timeout

Hi,
I'm attempting to program up a Met One 010c cup anemometer which sends out 11V pulses whose frequency correlates to wind speed. I've written the following program Met One 010c-3b.vi which works when there's no sample clock and outputs data to the graph and to the write measurement to file VI.
However the timestamp on the file only occurs intermittently (every 130 recorded samples if i recall correctly) and i've been advised to put a sample clock in between the create virtual channel and start VI to make the timestamp occur every sample. However doing this i get errors that first tell me I have to use an external clock, making the clock external then gives the timeout error 200284 after the read function. I expect this is because the wrong source has been selected for the external clock on the timing function.
I don't fully understand how the external clock works and i assume i need to set up which ever port i select as an external clock?
I have read through the following
http://digital.ni.com/public.nsf/allkb/FEF778AD990D5BD886256DD700770103
           -> how do i verify that the start trigger is configured correctly? (i know my program doesn't have one)
           -> how do i verify the external timing is configured correctly?
http://zone.ni.com/devzone/cda/tut/p/id/2835
http://zone.ni.com/devzone/cda/tut/p/id/4322
I tried to implement some of the diagrams indicated in the last link (eg Figure 2 & 3) but when i went to select the source for the analogue output I was given no available options. I have the NI 9205,9213,9403,9423,9215 sitting on a cDAQ 9178, so none of these do analogue output. Does this mean i can't use an external clock?
Thanks for the help, i know this is a simple question but i'm getting nowhere fast.
Kind Regards
Orfeo
Attachments:
Met One 010c-3b.vi ‏90 KB

Thanks for your help Courtney,
I had a look at the Write to Text File.Vi you suggested and i tried to implement it in my program. It appears to be almost working. The formatting of the strings is stuffed up so that i'm getting an ever increasing number of columns in my data (see attached text file). Can you advise me where i've gone wrong?
An example of the file is below
24/11/2011 11:21:54 AM   2.32   2.14
2.62   2.11
1.81   1.49
24/11/2011 11:21:54 AM   2.36   2.32   2.14
2.62   2.62   2.11
1.82   1.81   1.49
24/11/2011 11:21:54 AM   2.40   2.36   2.32   2.14
2.59   2.62   2.62   2.11
1.76   1.82   1.81   1.49
24/11/2011 11:21:54 AM   2.43   2.40   2.36   2.32   2.14
2.55   2.59   2.62   2.62   2.11
1.73   1.76   1.82   1.81   1.49
24/11/2011 11:21:54 AM   2.53   2.43   2.40   2.36   2.32   2.14
2.48   2.55   2.59   2.62   2.62   2.11
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I assume i've just not got my tab delimintors in the right place? or perhaps i need end of line qualifiers?
I would also like to have the timestamp more accurate, down to the milisecond. I see the format time string VI has an option to format the string %<digit>u which should do this but it appears to just paste the <digit>u in the string. We are wanting to sample data at 10-20 Hz and record the time of the samples. For one instrument these samples will be done simultaneously.
Thanks again
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Attachments:
Met One 010c-3c.vi ‏42 KB
TextFile.txt ‏550 KB

NI6602 pulse width measurement: Do I have to use an external sample clock?

Hi
In the .NET 4 example 'MeasPulseWidthBuf_SmplClk_Cont' it is stated in the comments that:
An external sample clock must be used.
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Solved!
Go to Solution.

Hi mola,
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NI 5772 acceptible external sample clock

Hello support forum,
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Solved!
Go to Solution.

The CLIP that we ship with the 5772 requires a persistent clock that maintains relatively stable frequency. If you need to use a 5772 with a variable frequency clock that is not persistent then you will need a custom CLIP. Depending on your application requirements this may or may not be possible. You will need to open a service request for more information.
National Instruments
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Err. -200303: External sample clock source...

Dear Readers
I'm using Ni-DAQmx 8 and have a PCIe-6259 card.
I wrote the following code (in VC++ 6).
int main(int argc, char* argv[])
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Thanks...
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Hi Robert
Do yo mean something like this:
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In many cases, such as when configuring an external clock or a counter source, you must select a PFI, PXI Trigger, or RTSI line as the sou"
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"External sample clock" and "Rate" for digital input acquisition

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