Generating frequency dependant square pulse and making it digital

trying to generate a square wave pulse at a specific frequency
it would be great if its simple as setting the amount of frequency (i.e., 50 , 50 pulses per sec)
but it gets complicated because of the sample rate
my problem is to convert it to digital and i don't know whats wrong
i attached a pic of my block diagram
as you can see, one pulse has frequency F, the other F/2, and lastly F/4
i need it to be compatible with the VI attached as well. can anyone help? thanks in advance!
Message Edited by sdkpark on 10-10-2009 12:19 AM
Attachments:
Create Digital Waveform.vi ‏20 KB
Correlated Dig Write With Counter.vi ‏31 KB

Hello again Sdkpark,
Apologies the message I was writing didn't include my full post. Take a look at this great community example for a prebuilt solution to what I believe you're trying to accomplish:
http://decibel.ni.com/content/docs/DOC-5763
Let me know if this isn't what you're looking for and I'll reply back. Have a great day!
-John Sullivan
Analog Engineer

Similar Messages

Buffered event counting. Why can't I explicitly sequence generating the Sample Clock Pulse and reading the counters?

At irregular occasions I need to grab counts from several counters, and buffering the counts must be done simultaneously for all counters. I'm modeling my approach after zone.ni.com/devzone/cda/tut/p/id/5404 which someone kindly pointed out in an earlier thread. However, that example only uses one counter, and you can't test the synchronization with only one counter, so I am using two counters configured the same way, and they're wired to a single benchtop signal generator (for example at 300 kHz).
What I want to do, I can test in a loop with a somewhat random wait in it. I want to drive a hardware digital output line high for a few ms and then low again. The hardware line is physically connected to terminals for my timing vi's Sample Clock Source and so will cause them to buffer their counts for later reading. After I pulse this line, when I know new good buffered counts await me, I want to read both my counters. If their bufferings are simultaneous, then each counter will have counted the same number of additional counts since the last loop iteration, which I can check by subtracting the last value sitting in a shift register and then subtracting the two "additional counts" values and displaying this difference as "Diff". It should always be 0, or occasionally +1 followed immediately by -1, or else the reverse, because buffering and a count could happen practically at the same moment.
When I do this using a flat sequence to control the relative timing of these steps, so the read happens after the pulse, the counters often time out and everything dies. The lengths of time before, during, and after the pulse, and the timeout value for the read vi, and the size of the buffer and various other things, don't seem to change this, even if I make things so long I could do the counting myself holding a clipboard as my buffer. I've attached AfterPulse.vi to illustrate this. If I get 3 or 10 or so iterations before it dies, I observe Diff = 0; at least that much is good.
When I use two flat sequences running in parallel inside my test loop, one to control the pulse timing, and the other to read the counters and do things with their results, it seems to work. In fact, Diff is always 0 or very occasionally the +/- 1 sequence. But in this case there is nothing controlling the relative timing such that the counters only get read after the pulse fires, though the results seem to show that this is true. I think the reads should be indeterminate with respect to the pulses, which would be unreliable. I don't know why it's working and can't expect it to work in other environments, can I? Moreover, if I set some of the pulse timing numbers to 1 or 2 or 5 ms, timeouts start happening again, too. So I think I have a workaround that I don't understand, shouldn't work, and shouldn't be trusted. See SeparateSequence.vi for this one.
I also tried other versions of the well-defined, single sequence vi, moving the counter reads to different sequence frames so that they occur with the Sample Clock Source's rising edge, or while it is high, or with the falling edge, and they also often time out. I'll post these if anyone likes but can't post now due to the attachment limit.
Here's an odd, unexpected observation: I have to sequence the reads of the counters to occur before I use the results I read, or else many of the cycles of this combine a new count from one counter with the one-back count from the other counter, and Diff takes on values like the number of counts in a loop. I though the dataflow principle would dictate that current values would get used, but apparently not so. Sequencing the calculations to happen after the reads fixes this. Any idea why?
So, why am I not succeeding in taking proper control of the sequence of these events?
Thanks!!!
Attachments:
AfterPulse.vi ‏51 KB
InSeparateSequence.vi ‏49 KB

Kevin, thanks for all the work.
>Have you run with the little execution highlighting lightbulb on? -Yes. In versions of this where there is no enforced timing between the counter and the digital line, and there's a delay inserted before the digital line, it works. There are nearly simultaneous starts on two tracks. Execution proceeds directly along the task wire to the counter. Meanwhile, the execution along the task wire to the digital high gets delayed. Then, when the digital high fires, the counter completes its task, and execution proceeds downstream from the counter. Note, I do have to set the timeout on the counter longer, because the vi runs so slowly when it's painting its progress along the wires. If there is any timing relationship enforced between the counter and the digital transition, it doesn't work. It appears to me that to read a counter, you have to ask it for a result, then drive the line high, and then receive the result, and execution inside the counter has to be ongoing during the rising line edge.
>from what I remember, there isn't much to it. There really aren't many candidate places for trouble. A pulse is generated with DIO, then a single sample is read from each counter. -Yup, you got it. This should be trivial.
>A timeout means either that the pulse isn't generated or that the counter tasks don't receive it. - Or it could mean that the counter task must be in the middle of executing when the rising edge of the pulse arrives. Certainly the highlighted execution indicates that. Making a broken vi run by cutting the error wires that sequence the counter read relative to the pulse also seems to support that.
>Have you verified that the digital pulse happens using a scope? -Verified in some versions by running another loop watching a digital input, and lighting an indicator, or recording how many times the line goes high, etc. Also, in your vi, with highlighting, if I delete the error wire from the last digital output to the first counter to allow parallel execution, I see the counter execution start before the rising edge, and complete when the line high vi executes. Also, if I use separate loops to drive the line high and to read the counter, it works (see TwoLoops.vi or see the screenshot of the block diagram attached below so you don't need a LV box). I could go sign out a scope, but think it's obvious the line is pulsing given that all these things work.
>Wait! I think that's it! If I recall correctly, you're generating the digital pulse on port0/line0... On a 6259, the lines of port 0 are only for correlated DIO and do not map to PFI. -But I'm not using internal connections, I actually physically wired P0L1 (pin 66) to PFI0 (pin 73). It was port0/line1, by the way. And when running some of these vi's, I also physically jumper this connection to port0/line2 as an analog input to watch it. And, again, the pulse does cause the counter to operate, so it clearly connects - it just doesn't operate the way I think it is described operating.
For what it's worth, there's another mystery. Some of the docs seem to say that the pulse has to be applied to the counter gate terminal, rather than to the line associated with the sample clock source on the timing vi. I have tried combinations of counter gate and or sample clock source and concluded it seems like the sample clock source is the terminal that matters, and it's what I'm using lately, but for example the document I cited, "Buffered Event Counting", from last September, says "It uses both the source and gate of a counter for its operation. The active edges on the gate of a counter is used to latch the current count register value in a hardware register which is then transferred via Direct Memory Access...". I may go a round of trying those combinations with the latest vi's we've discussed.
Attachments:
NestedSequences.png ‏26 KB

How to generate a single output pulse on 64 different digital out lines (PCI-6513) each with a different start time relative to an event in a main program loop.

Long question.
I am running a main program loop of 60 msec. At one point in the loop I create a 64 element array of delay times. At that point I need to begin outputting a predefined single pulse to each of the 64 lines on my PCI-6513. Each line outputs the pulse with a starting delay set by the "delay time" in the array.
Each delay time is such that the pulses will be done before the next loop commands another one.
Thank You
Roger

Hi,
You have multiple ways of doing this, since there is no timing engine on the 6513 your code is going to control the output of the card, which is what we called “software timed”. If you take a look at the example called: “Write Dig Chan.vi”, you can individually control each line.
So to change the state of the line; since you have an array of delays time you can aid yourself with “stacked sequence structure” where in each frame you control the time it takes to go to the next frame and the data been written to the card.
Another option is using a state machine where each state write the data you want and you can also control the time between states. For further references take a look at this article Application Design Patterns: State Machines.
I hope it helps
Jaime Hoffiz
National Instruments
Product Expert
Digital Multimeters and LCR Meters

I want to transmit a square pulse through USB port, is it possible?? if not then what is the best way to do that, preferable is with serial then parallel, and its compatibility with vista,XP,and @))7 windows

hi froends
i want to transmit a square pulse using lab-view, please help how to do that, the preference will be USB,SERIAL, Parallel ports, it it must be compatible with all the os versions, like 2007 windows, vista,XP and other.
please help..................

sanghi wrote:
OK I WANT TO DRIVE A RELAY.
SUGGEST SOMETHING
Calm down!
People can't read your mind. If you want help, repsect those who contribute their time for free to try to help you.
Put yourself in our shoes. If I tell you I want to build a rocket, what information would you give me? You would need to know if it's for a hobby, something bigger, carries a payload, carries living organism, how far does it go, where does it land (if at all), etc...
First of all, we still don't know what you want to do with this relay. Using a computer to generate is series of pulses is not usually the best way. What is the frequency of the pulses that you want to transmit? And why do you want to use a relay? What are you driving? Can the relay that you are using fast enough to follow the pulse train that you'll be sending?
Provide information, ask questions politely and people will help you.

Increase the freq of square pulses generated by the counter

I have program that outputs a finite train square pulses through a counter to run my step motor. I find that this program can genrate a sq pulse at a freq of 1080 Hz max. Is this a limitation of my program ( I have attached a copy of my program) or of my interface card (PCTIO-10, one of the older cards from NI) ? I use labview 5.0 on a windows NT , pentium MMX machine.
Is there anything that I could do in my program to generate pulses at a higher rate ? I havent specified any of the low level parameters for the pulse config.vi in the program - could setting these values help in generating higher frequencies?
thanks very much,
Lalitha.
Attachments:
1d.vi ‏77 KB

hi Tiano,
you should be using the vi in the Search Exmaples->Data Acquisition->Counters->Finite Pulse Train.
this is how you modify this vi to generate pulses at varying frequency.
Set Device=1, Counter=1, Number of Pulses=100, Frequency Array=10, 100, 1000, 10000.
[Place an array container on the front panel. Drop the Frequency control into the array. On the block diagram place a
For loop around the whole program. Move the new array to the outside of the For loop. Wire the array to the edge of the for loop and then to the terminal that the Frequency control was wired to before. One
the front panel, set the first four elements of the array to the values 10, 100, 1000, 10000.]
I am attaching a copy of this mod
ified vi for your ref.
hope this helps,
Lalitha.
Attachments:
fast2-vel_change.vi ‏156 KB

Generate Square pulse Using DO module with cRIO 9022

Hello,
I want to generate square pulses of 400Hz using NI 9401 for cRIO 9022. I want to control the frequency from 1- 400Hz from PC using LAbview.

Hi Mekel,
most CompactRIO applications use three separate processors—a Windows PC, a real-time OS controller, and an FPGA. The CompactRIO controller uses the LabVIEW Real-Time OS instead of Windows. The FPGA does not use an operating system because the code is implemented directly in hardware.
The common tasks for the Windows host VI include the following:
• logging data to the PC
• accessing databases
• integrating with enterprise systems
• providing a human-machine (user) interface (HMI) and display
• supporting supervisory control.
The RT controller VI tasks typically include the following:
• processing data
• control
• logging data on the RT controller part of the CompactRIO system
The FPGA VI tasks include the following:
• I/O
• hardware-based timing and triggering
• low-level signal processing
• control
Communication between I/O modules and FPGA is digital because signal conditioning and ADC is done in the modules. Communication between the RT controller and FPGA uses the PCI bus in the CompactRIO. Communication between the Windows host VI and the RT controller VI normally occurs over the Ethernet.
Serena

"How do I generate a sequence of waveforms, like first a sine wave, then a square one, and say again a sine wave?"

"Hello everyone, I hope someone can answer the following question. How do I generate a sequence of different waveforms, with different attributes?
Like, i want to generate a sine wave for some time, then a square pulse of some width and then again a sine wave of some other time. Finally I want to repeat this sequence. I'll really appreciated it if I can get an answer soon. Thank you!

From the previous comments I am assuming that your waveforms are arrays, rather than the waveform data type. I am also assuming that the sine waves on both sides of the square wave are the same signal.
If so then I suggest a slightly different approach. 1. Generate your sine wave, rather than the empty array. The length should be the length of the entire end signal.
2. Generate the square waveform. You can either generate it at the length you need, or you can generate a much larger square wave, and then use the Array Subset VI to get the portion you need. Which method you use depends how you want to implement the whole method.
3. Use the Replace Array Subset VI to place the portion of the square wave at the location (index) of the original sine wave you ge
nerated.
The result of this method will be an array that starts with your sine wave, and then at the index you choose it will place the square wave of the length you want right into the signal, and then finish up with the sine wave for the rest of the signal.
Evan Collier
Application Engineering
National Instruments

On E series Card with 2 counters I want to generate a fixed length pulse train and want to continuously monitor it.

On E series Card with 2 counters I want to generate a fixed length pulse train and want to continuously monitor it.

Depending on the software you are using, there are many shipping examples and example programs on the web that illustrate generating a finite pulse train. The E series boards have the DAQ-STC counter/timer chip, and so make sure you search for DAQ-STC examples. I have included links to a LabVIEW example and Measurment Studio Example in Visual Basic.
Generate finite pulse train in LabVIEW.
http://eagle.ni.com/stage/we/niepd_web_display.DISPLAY_EPD4?p_guid=B45EACE3DA2156A4E034080020E74861&p_node=DZ52328&p_submitted=N&p_rank=&p_answer=&p_source=Internal
Generate finite pulse train in Visual Basic with Measurement Studio
http://eagle.ni.com/stage/we/niepd_web_display.DISPLAY_EPD4?p_guid=B45EACE3D96156A4E034080020E74861&p_node=DZ52328&p_submitted=N&p_rank=&p_answe
r=&p_source=Internal

How to measure the frequency of a pulse being generated by a counter

Hi,
I am using labview 8.6 to generate 5 evenly spaced pulses for every 1 revolution of my shaft. However, I would also want to know the frequency of these pulses so I can determine the shaft speed. Since I am already generating the pulses using one of my counters, can I still tap into that or task another counter to measure the pulse frequency? If so, how? I have attached my code for generating the pulses and I am using an Ni 9401 module and an NI 9172 chassis. If someone can helo me modify the code to measure and tell me the pulse frequency as well, that would be really appreciated
Attachments:
autotrain2.vi ‏19 KB

You'd probably get a more coherent answer if you didn't bounce around from thread to thread so much...
How can I generate a pulse train from shaft encoder? (5/13)
pulse train from encoder (5/15)
how to measure rpm (5/20)
How to measure rpm using shaft encoder and labview (5/23)
This thread (also 5/23)
I see you ignored my suggestion from the other thread--Kevin's solution is good too but using an encoder task offers more noise immunity (I think this is probably the cause of the problem you reported on the other thread). You can fix it with digital filtering if you want to keep using a counter output instead of an encoder task. Noise during transitions is pretty common for a quadrature encoder.
A finite counter output task uses 2 counters on the 9172 (although you said 9174 earlier at one point--this wouldn't be the case on a 9174) so you wouldn't have one left to make your frequency measurement. With the solution you have now, you can change to continuous to free up a counter if you don't care about outputing an exact number of rotation's worth of pulses (I'm not sure if you do or not--I didn't read through all of the various threads relating to this application to find out).
For your actual question in this thread... Have you tried running one of the frequency measurement examples? From the code here I can't tell what you have tried (it just looks like a mangled version of the code Kevin gave to you in your other thread).
Best Regards,
John Passiak

Generate and synchronize 6 digital channels with differents phases/frequencies/duty cycles/...

Hello,
For some kind of tests we need to generate, with a 6534 card, 6 signals.
The 6534 has 32 digital E/S and can go up to 20MB/s !
Each channel must be independant so that it can have it's own frequency and duty cycle. But for exemple the second channel can be delayed in reference at first channel. I put an image so that you can understand better what i try to do (3 signals are shown but six are needed).
I see a lot of things on forum that are close to my probleme, but none seems to be as advanced as mine.
http://sine.ni.com/devzone/cda/epd/p/id/4683 -> 6534 doesn't have timers
http://forums.ni.com/ni/board/message?board.id=40&message.id=5167 -> Just a phase probleme
http://forums.ni.com/ni/board/message?board.id=170&message.id=261289 -> Another board
http://forums.ni.com/ni/board/message?board.id=40&message.id=5090 -> Another probleme
I contacted NI support, they send me an exemple on "patterns" but it generates frequencies that are multiple of one with no phase consideration or duty cycle.
Any idea ?
Thanks in advance for your advice and help.
Eric.
Message Edité par Eric31 le 08-10-2007 06:52 AM
Message Edité par Eric31 le 08-10-2007 06:55 AM
Attachments:
Sans titre.PNG ‏8 KB

At best, that's gonna be a pain in the neck with that board. If you need very precise timing for freqs, duty cycles and offsets, it gets worse. If they need to change on-the-fly, it'll be near-impossible.
1. You can only operate 1 hw-timed digital output task at a time. So all 6 signals must be part of that 1 task.
2. Thus, you need to define an output buffer representing the states of those 6 bits throughout your entire generation.
3. There's a bunch of greatest common factor and least common multiple stuff needed to figure out the right output rate and buffer size, assuming you'll want to regenerate repetitively. You first need the gcf of all the transition times to come up with the right output rate since all the transitions need to occur on some integer multiple of the output period.   You'll then need the lcm of the 6 signals' periods, combined with the output rate, to size up a buffer that can be regenerated.
4. Forming the output data array may be quite complex.   Personally, I always do my stuff with raw arrays and I know that interleaving all those signals can be quite tricky, especially if there may be an occasional simultaneous transition.   However, I suppose there's a chance that some of the digital waveform functions *might* make this step a bit simpler. I just haven't played around with that format much.
Editorial opinion: Buy a 6602. You can trigger 6 counters to start with different initial phasing, and will be able to change freq & duty cycle on-the-fly for each one independently.
Editorial opinion #2: For higher channel count apps, I'd also recommend checking out the DIO-64 board put out by Viewpoint Systems, an NI Alliance partner. It gives you much smarter hardware-timed DIO. With the NI board, there can be huge amounts of redundant info in the DO buffer. If you find that your GCF is 10 microsec, but the time between consecutive transitions is 10 millisec, you'll have to stuff 1000 identical values into your output buffer.   With Viewpoint's board, your data acq buffer *only* contains data at the transition times. Timing is controlled by delivering a separate array defining the timestamps that correspond to those transitions.
-Kevin P.

Frequency divider by 2 and 3

Hello,
I'll start by saying that I am new to labview and it is possible that my question will be simple for most. As the topic I need to perform frequency divider by 2 and 3.
To digital input card will be given a signal of frequency 50Hz. I can use a USB card 6009 and 6221.
I found
a few examples of the frequency dividers on the NI forum and on the
internet but do not quite know how I could use them in my case...
For example, the divisor using JK flip-flop in attachments.
If
anyone would be able to explain to me how it should look like in my
case, or give some examples on the basis of whose ideas I will be able
to understand the operation of such a program would be great.
Regards,
Mat M.
Attachments:
freq div.vi ‏28 KB

Kevin is absolutely correct that the signal resulting from the method I linked earlier would have an extremely low duty cycle. You can use this method to "divide" by 2, 3, or any other positive integer (other than 1), but like Kevin mentioned the resulting signal is a pulse every N ticks, rather than a true division of the input clock.
You can use Kevin's method to divide by 2 and give a 50% duty cycle using either AO or DO with an external sample clock. However, the waveform to generate would be [1, 0, 1, 0 ...], giving 1 period of output signal for every 2 clock edges. You can't use this method to give a 50% duty cycle and divide by 3, but you can get either a 33% or 67% duty cycle by generating [1, 0, 0, 1, 0, 0 ... ] or [1, 1, 0, 1, 1, 0 ... ] respectively. Generating [1, 1, 1, 0, 0, 0 ... ] is actually a divide-by-6. Any odd number divisor would not give you a 50% duty cycle.
There is a way to divide by an odd number and maintain a 50% duty cycle, but only if your input signal is also a 50% duty cycle square wave. Unless you absolutely need to have a 50% duty cycle then it's probably more trouble than it's worth:
1. Configure a DI task with Change Detection Timing. This can be used to generate a pulse (Change Detection Event) on every rising and falling edge of your external signal, effectively multiplying it by 2.
2. Use the Change Detection Event as the sample clock for your DO (or AO) task. The task would output [1, 1, 1, 0, 0, 0 ... ] for a divide-by-3 of the original signal.
Like Kevin mentioned, any divisor >4 is easy using the counters in their default "toggle" mode, but the duty cycle would not be 50% for odd divisors (similar to the DO/AO method). If you only care about one edge of the clock and the duty cycle is not terribly important, the Pulse Mode example that I linked in my last post can be used for any divisor between 2 and 2^N-1 on an N-bit counter.
Best Regards,
John Passiak

Measure the height of an square pulse

I'd like to measure the height of an square pulse. The pulse is 10 mus broad and betwean 0V and 4V high. The occurence of the pulse is random, so the application must be triggerd.
I searched already the ni page and forum for matching solutions, but haven't found any so far.
I'm using a PCI-6115 DAQ-card.

10e4 and 10^4 are NOT the same thing.
You wouldn't think that 1.23e4 and 1.23^4 are the same thing, would you?
10e4 = 10 x 10^4 = 100,000
1e4 = 1 x 10^4 = 10,000
If you want to catch a 10 MicroSecond pulse, that would suggest a sampling rate of 100 kHz, bare minimum.
For 5 seconds, that's 5 x 100k = 5 million samples = 10 million bytes (assuming a single channel, recording as I16).
Depending on CPU speed, and RAM available, you could try the brute-force approach: record 5 seconds of data, then loop thru it and pick out the pulses.
I would suggest a trial:
1... Generate a 5-million sample array of I16 zeroes.
2... Change a few of the samples to +1000 (or something)
--- Now you have some phony data to play with.
3... Record the current millisecond timer value (T0).
4... Loop through the samples: If sample(I) > threshold and sample (I-1) is not (use a boolean shift reg.), then declare a pulse to exist at sample I. Append I to the array of indexes you're keeping.
5... When the loop is done, record the current millisecond timer value again (T1).
6... Subtract T1-T0 to get elapsed time. If it's greater than 2000 mSec, you can't use this approach.
7... Compare the results (indexes of peaks) to the peaks you put in (step 2). They should be the same.
If you can use this approach, it is the simplest to program.
Otherwise, you will have to use a double-buffered approach:
1... Define a CHUNK size of say, 2048 samples.
2... Set up a continuous DAQ operation to use a buffer of 2 * CHUNK samples.
3... Keep checking the DAQ backlog until the backlog is CHUNK or greater.
4... Read CHUNK samples from the buffer.
5... Search the chunk for pulses, append indexes to your results array.
--- Don't bother to read every sample in volts - too time-consuming - read it in binary (I16). Convert the peaks to volts afterward, if needed.
--- You need a threshold to distinguish a '1' level from a '0' level. The '0' level won't be 0.0000 volts, there will be some noise.
--- You might be able to measure the noise during the 2-sec down time, and establish your threshold that way.
--- The seconds approach assumes that the CPU is fast enough to process a chunk in less time than it takes to acquire one. If not, you're out of luck.
--- You don't want the chunk to be too small, as the overhead of calling the DAQ READ will swamp the processing time.
Steve Bird
Culverson Software - Elegant software that is a pleasure to use.
Culverson.com
Blog for (mostly LabVIEW) programmers: Tips And Tricks

Making a digital retriggerable gate pulse on demand

Hello,
I am relatively new to using DAQmx, and I was hoping someone here could provide me with a better solution than I have come up with.
The experiment we are running involves a camera, some image processing and then a laser that requires a gate to run. The way our program is currrently setup is that we loop over this process and after each image processing step decide whether or not to gate the laser with a certain number of pulses with a certain frequency and duty cycle. I have attached an example that would functionally do what I am describing. It is worth noting that our laser requires a digital low to gate and not a digital high.
Currently, our camera is triggered using an external trigger, so the while loop hangs on the IMAQ grab until it is triggered. Then we process the image, decide to shoot the laser (running on its 200kHz internal clock). The current example will hang the code until all of the Digital Output is done which may cause us to miss our next camera trigger. It feels like there must be a more intelligent way of doing this. I am even fine routing our own digital output on our DAQ to trigger a pulse train which is also generated by our DAQ, but ideally we would just send our gate pulses as soon as we know whether or not we want to fire our laser.
For extra reference, we are using a PCI2-1433 framegrabber as well as a PCIe-6363 Multifunction DAQ with a BNC 2110 breakout board. Any suggestions would be helpful. I get the feeling that there are a host of different ways that this could be done using this DAQ and the DAQmx software but like I said, I'm really new with these. I'm betting there are things the hardware can do that I have ZERO awareness of.
Thanks for everones time!
Cole
Attachments:
IMAQ_plus_DAQ_retriggerable_digital_gate.vi ‏30 KB
DAQ_example_retriggerable_gate.png ‏111 KB

Hi ColeVV,
I've taken a look at your code. I would recommend using a state machine architecture.
Do you need synchronization among your events?
Sincerely,
Bogdan Buricea
Applications Engineering
National Instruments
Bogdan Buricea
Applications Engineer
National Instruments

How to generate a delayed retriggerable pulse using only one counter with PXI 6070E card

Hi
I have a problem in generating a retriggerable delayed pulse with a single counter(triggered through a signal at gate) using PXI 6070E card. VI was developed in NI LabVIEW traditional DAQ Ver.7.1. I have used the "delayed pulse generator config" VI and a "Start counter" & "Stop counter" VIs for the purpose. But there is no output seen at the out terminal of counter. So I introduced a "wait" VI and set it to 1 sec. Now the pulse output appears but some pulses are missing mometarily after every 1 sec interval. (any solution for this)
I have gone through a few similar requests in the forum but they suggest either to use two counters or to generate a finite pulse train which does'nt fit my application. Moreover PXI 6070E has only 2 counter timers. I am already using one counter to measure the frequency of a pulse train(signal 1). The application requires to generate a delayed retriggerable pulse for every pulse in signal 1. So I have only one counter left.
Can I measure the frequency of signal 1 by analog means.? so that I can use two counters for pulse generation. (Signal 1 is a TTL signal).
Request some help.
Thanks in Advance
Regards

A finite pulse train (N_Pulses >= 2) does require the use of 2 counters on most of our older hardware including your 6070E. If you're just talking about generating a single retriggerable pulse, you would only need one counter.
Here's an example in Traditional DAQ that shows you how to set a retriggerable pulse generation (it also allows you to adjust the characteristics of the pulse on-the-fly).
If you're writing a new program, you might consider switching to DAQmx as it supports NI's latest hardware and recent OSes should you ever need to upgrade. Traditional NI DAQ is no longer in active development. Here's an example of how to implement a retriggerable pulse generation in DAQmx. You should take note that you can't use the two drivers to simultaneously talk to the same piece of hardware, although you should be able to go back and forth by resetting the Traditional DAQ driver before switching to DAQmx.
Best Regards,
John Passiak

Frequency divider + narrow pulse output

Hello all,
I need to divide the frequency of an incoming digital pulse by a factor of N (typically 10-50) but I would like the output signal to be 200ns wide. I'm able to divide the incoming pulse by using CO pulse ticks with the incoming pulse as the tick source and specifying the low and high ticks (low + high ticks = N). The problem is that the narrowest pulse I can generate is 2/f_in (or in my case 2/75kHz~ 26 us).
Is there any other way to divide a pulse and control the width of the output pulse?
I can use the "wide" pulse to trigger a narrow pulse on a different channel but I rather not use so many channels for this application. Is it possible to use just 1 input channel and 1 output channel?
Any advise will be greatly appreciated.
I'm using Labview 8 and pci 6251
Eyal

Hello Eyal,
Let me rephrase what it is I think you want to do:
1. You have a digital input with a frequency at or approximately 75 kHz.
2. You want to divide down this input frequency by N, where N is between 10 and 50 or so.
3. On every Nth pulse you want to generate a pulse with a 200ns high time and then return to a low state until the next 200ns pulse is generated.
If this is what you want to do then you would need 1 CO task to generate a pulse ever Nth rising edge of your input. Then you would use this pulse to trigger a retriggerable pulse train to output your 200ns pulse. All of this routing can be done internally so you would only physically connect one input and one output, however this setup would require three counters. One counter for the CO task and two counters for retriggerable pulse generation. Unfortunately your PCI-6251 only has two counters so to do this you would need to get a board with at least 3 counters.
If I didn't describe what you are trying to do accurately please reply back with further clarification incase what you are actually trying to do can be accomplished on your board.
If you would like to contact National Instruments directly to speak with a technical representative about getting a counter board you can find contact information at www.ni.com/contact.
Have a good weekend!
Brooks

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