Frequency divider by 2 and 3

Question

Hello,
I'll start by saying that I am new to labview and it is possible that my question will be simple for most. As the topic I need to perform frequency divider by 2 and 3. 
To digital input card will be given a signal of frequency 50Hz. I can use a USB card 6009 and 6221.
I found
a few examples of the frequency dividers on the NI forum and on the
internet but do not quite know how I could use them in my case...
For example, the divisor using JK flip-flop in attachments.
If
anyone would be able to explain to me how it should look like in my
case, or give some examples on the basis of whose ideas I will be able
to understand the operation of such a program would be great.
Regards,
Mat M.
Attachments:
freq div.vi ‏28 KB

Answer 1

Kevin is absolutely correct that the signal resulting from the method I linked earlier would have an extremely low duty cycle.  You can use this method to "divide" by 2, 3, or any other positive integer (other than 1), but like Kevin mentioned the resulting signal is a pulse every N ticks, rather than a true division of the input clock.
You can use Kevin's method to divide by 2 and give a 50% duty cycle using either AO or DO with an external sample clock.  However, the waveform to generate would be [1, 0, 1, 0 ...], giving 1 period of output signal for every 2 clock edges.  You can't use this method to give a 50% duty cycle and divide by 3, but you can get either a 33% or 67% duty cycle by generating [1, 0, 0, 1, 0, 0 ... ] or [1, 1, 0, 1, 1, 0 ... ] respectively.  Generating [1, 1, 1, 0, 0, 0 ... ] is actually a divide-by-6.  Any odd number divisor would not give you a 50% duty cycle. 
There is a way to divide by an odd number and maintain a 50% duty cycle, but only if your input signal is also a 50% duty cycle square wave.  Unless you absolutely need to have a 50% duty cycle then it's probably more trouble than it's worth:
    1.  Configure a DI task with Change Detection Timing.  This can be used to generate a pulse (Change Detection Event) on every rising and falling edge of your external signal, effectively multiplying it by 2.
    2.  Use the Change Detection Event as the sample clock for your DO (or AO) task.  The task would output [1, 1, 1, 0, 0, 0 ... ] for a divide-by-3 of the original signal.
Like Kevin mentioned, any divisor >4 is easy using the counters in their default "toggle" mode, but the duty cycle would not be 50% for odd divisors (similar to the DO/AO method).  If you only care about one edge of the clock and the duty cycle is not terribly important, the Pulse Mode example that I linked in my last post can be used for any divisor between 2 and 2^N-1 on an N-bit counter.
Best Regards,
John Passiak