How to use on board counter to change sample rate dynamically on pci-6134

Hi,
I am relatively new in LabView.
I am making power quality measurement system and I need to vary the sampling rate of my pci-6134 dynamically (all channels simultaneously). What I need is to have a constant amount of samples in each period of measured signal (grid voltage), which changes slightly all the time. Therefore I will have to measure the voltage, find its exact frequency and then adjust the sampling rate of daq accordingly. I know that there will always be some delay, but I would rather like not to go into any predictive algorithms...
I have found an information in the Forum that one of possible solutions is to use an onboard counter to change the sampling frequency but I have no idea how to make that. Can someone help me or possibly show an example?
Is there a simple way to solve that problem?
Thanks in advance
Andrzej

At least at a glance, the code generally looks like it ought to work. Two thoughts:
1. Instead of getting into PFI3 vs PFI8 routing stuff, can't you just specify "Dev1/Ctr0InternalOutput" as the AI Sample Clock source? (You may need to right-click the terminal to get at the menu that exposes the so-called "advanced terminals").
2. Try writing both the freq AND duty cycle properties when you want to update the freq. Or try using the DAQmx Write vi instead of a property node. My past experience suggests that writing only the freq property *should* still work, but writing both isn't hard to try and may turn out to help if the behavior of your version of DAQmx differs somehow.
-Kevin P.
P.S. Bonus 3rd thought. I just went back to reread the thread more carefully, including your first screenshot. I'm now thinking that maybe the hardware actually WAS behaving properly, and that you just weren't aware of it. When you query the AI task for it's sampling rate, all the task can know is whatever rate you told it when you configured it outside the loop. So even as you change the counter freq to change the actual hardware sampling rate on the fly, the AI task will continue to report its orig freq. After all, how is *it* supposed to know?
Try an experiment: Set your original freq very low so that the AI task produces a timeout error without getting all the requested samples within the 10 sec timeout window. Run and verify the timeout. Then run again, but after 3-5 seconds set a new frequency that will produce all those samples in another 1 sec or less. Verify that you get the samples rather than timing out. That should demonstrate taht the counter freq change really *does* produce a change to the hardware sample rate, even though the task property node remains unaware.

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I need to programmatically change sample rate during acquisition: My application involves sampling at slow rate most of the time but during "region of interest" I need to change sampling rate to fast (close to max rate of board).

I think it's also possible to use the same (high) sample rate during your
complete acquisition, but in the case you need the 'slow' rate only take
from the array sample 0, 10, 20 etc. or any number you prefer.
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506500000008000000DF570000-1027480788000@exchange.ni.com...
> I need to programmatically change sample rate during acquisition: My
> application involves sampling at slow rate most of the time but during
> "region of interest" I need to change sampling rate to fast (close to
> max rate of board).

How do I control the sampling rate of a PCI-6602 counter

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Processor: Pentium 4 1.8 GHz
Hello All,
I have two avalanche photo diodes connected to two counter entrances on a 6602 (ctr 0 and ctr 1).
As can be seen in the attached VI, I'm generating a signal on ctr2 and using that as an external clock for the counters.
My objective is to accurately read the counter values at a rate of ~100KHz (i.e. 0.01 ms between measurements) and to be able to control the rate via the front panel. This should be possible (80MHz timebase), however when I run the program it is only able to actually sample at ~5 ms intervals. Also I'm encountering error 200141 even though I set the rate in the counter to 1M, which should buffer enough.
What am I doing wrong? Any help would be greatly appreciated.
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Attachments:
FRET_ver_14.vi ‏456 KB

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After looking at your code, I would not use the DAQ assistants to implement this. The DAQ assistant are best to be used for simple acquistion and since you are looking to use more lower level properties of you card, I would suggest to move to use the lower level VIs. It will be easier to understand where the problem is occurring at and will run better than using the DAQ assistant.
I have done some initial research for you to implement this design. I have described each of them below and how they will assist you.
The first example I have found is the Change Counter Output Frequency While the Task is Running. In this example, it will show you how to change the frequency and duty cycle of a counter output frequency task. One thing to remember about these counters are that the frequency will not change until the period has finished. For example, if you changed the frequency in the middle of a period of frequency of 1 Hz, it has to complete the 1Hz period before changing it to the next frequency.
The next example I would investgate is in the NI Example Finder called Correlated Dig Write With Counter.vi. The NI Example Finder can be found in Help » Find Examples... This VI will explain how to use the counter as a clock for another task. You will need to combine the concepts of the first example with this to make sure that you can vary the sample clock.
Finally, in the NI Example Finder, there is an example how to count digital events with an external clock called Count Digital Events-Buffered-Continuous-Ext Clk.vi. With this example, I first suggest to add the counter task and make sure you can get the external clock to work. After this, I would then implement changing clock.
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How to use on board counter to change sample rate dynamically on pci-6134

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