Replace quotient and Remainder with Scale by power 2

I want to replace quotient and Remainder function with Scale by power 2 to reduce resource usage on FPGA.
Here is my problem, I want to achive the same result, but no sure if the code will allow me to input the value I need, i also am not sure what that value should be?
Attachments:
quotientProblem.png ‏37 KB

Florian.Ludwig wrote:
The problem is I don't know what's expensive in RT.
The OP is asking about FPGA, not RT.
RT is fine with the Quotient & Remainder.  It'll take a few clock cycles of your processor, but that is nothing in the rates for an RT system.
An FPGA is a different beast since you need to look at how much of your FPGA hardware you are using up.  Bit shifting (which is what the power of 2 actually does) is dirt cheap in an FPGA.  But divisions are really expensive to do.  But since you are dealing with powers of 10, you are kind of stuck.  Hardware (FPGA in this case) works best when dealing with binary (ie powers of 2).
So what device is this one?  How fast do you need these outputs?  It might make sense to pass some of the data up to the RT system and then the RT can pass the results back down to the FPGA for actual output.
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