Using a SCC counter pulse train to control a SCC digital out signal

I am trying to send a digital high signal on a SCC-Digital ouput module for a certain number of pulses generated by a SCC-Counter/timer pulse train. I have found examples of how to route such signals through PFI12 etc on an M-series board but I am trying to achieve this without referring to the card, just the SCC modules themselves.
I cannot find a way to use the sample clock from the counter generated pulse train to synchronise the digital output.
Is there any way I can do this without referring to the connected M-series DAQ card channels?
Thanks in advance for your assistance.
Cheers.

Hi Phil,
The SCC carrier is only conditioning your signals (i.e. if your signals are not in optimal ranges, bandwidth or need external excitation). The actual counters and all digital lines are controlled directly by the M-series board. This means you will never be able to refer to a counter in the SCC module.
If you route the signals of the M-Series board, is as if you had done so externally from the SCC. Look at this example and might give you more insight to how to implement it (This is software timing). The hardware timing would be doing correlation DIO. Here is an example that needs to be modified to adapt to your timing: http://zone.ni.com/devzone/cda/epd/p/id/4414
Hope this helps,
Yardov
Gerardo O.
RF Systems Engineering
National Instruments
Attachments:
Finite Dig Output High.vi ‏31 KB

Similar Messages

Can daq 6035e,or 6024e used to count pulse train

i need to count two digital pulse train coming from an encoder, whose frequency keeps changing. the encoder is a typical feed back from servomotor

Hi,
Both of those DAQ boards can measure digital pulse train frequencies using the counters. These cards can support 2-pulse encoder measurements on DIO6 and DIO7. This means that if there is a rising edge on Channel A the counter increments and a rising edge on Channel B decrements the count. You can also set the counter application for frequency measurement and that will measure the frequency of the pulse train on the line. These cards also have 2 such counters.
There are many LabVIEW and CVI examples demonstrating this. If you search the site for position or encoder measurements there should be some example programs for you. Hope that helps.
Ron

How can I use the pulse train from a 6602 to trigger an niFGEN and niSCOPE on each rising edge of the pulse train?

Hello,
Here is my application: I need to use a 6602 counter/timer to generate a pulse train of certain frequency and duty cycle. On each rising edge of this pulse train, I need to output an arbitrary waveform on Ch. 0 of an niFGEN (5422) AND acquire data from CH. 0 of an niSCOPE (5124). I also need to synchronize the niFGEN and the niSCOPE to the same clock used for the pulse train (6602/ctr0). This process needs to continue until the user stops the system.
I can generate the pulse train using the 6602 just fine using ctr0, but the pulse train shows up on OUT0 by default. When setting up the niFGEN and niSCOPE to trigger on rising/positive slope edge, OUT0 is not an option for either device as a source for the digital rising edge (pulse train). The main options for both are PFI0-3 and RTSI lines.
Questions:
1.) Is there a way that I can direct the pulse train to a location (such as an RTSI line) where BOTH the niFGEN and the niSCOPE can use it as a start trigger for each rising edge? I noticed in MAX that a route can be made between ctr0's internal output and a trigger line and others. If this is a solution, could you please explain how to accomplish this?
2.) Once I configure the niFGEN and niSCOPE to be triggered on a digital rising edge, how can I effectively have this happen for every rising edge from the pulse train? In other words, can I just initiate the FGEN outside of the while loop and it will generate a waveform for each rising edge it sees at the source until the while loop is exitted?
3.) Is setting a reference clock for the niFGEN and the niSCOPE the same thing as synchronizing both devices using the same clock that generated the pulse train? It is not clear to me the difference, and why it would necessarily be useful.
Images of my current front panel and block diagram are attached. If you would rather have the actual VI's just let me know. Any help and/or explanation on this is greatly appreciated. Thanks in advance.
Attachments:
Front_Panel_Control.jpg ‏278 KB
Block_Diagram_Control.jpg ‏263 KB

Hello Cgifford,
Welcome to National Instruments Forums.
To output your signal to the PFI lines,
you can use external connectios between OUT0 and PFI lines. You can also use
the backplane to do so by routing into the same RTSI line.
1)
On the SCOPE and FGEN, the name of the
terminals are actually “PXI Trigger Line x/RTSIx” but on the 6602 you might
need to route the signal using the property:
You can also use the DAQmx route signal which perform the same opperation.
2)
This will depend on the frequency of
your pulse train. If this is lower than about 10 ms, then you can probably
place this on a loop and start and stop the acquisition every time. If the
frequency is higher than this, you will have to use:
- Scripting on the FGEN side (read more)
- MultiRecord Fetch (more information in the scope help file
section “Acquisition Functions Reading versus Fetching”).
3)
The short answer is yes. The longer one
might depend on how tight you need the synchronization to be (us, ns, ps). For
very tight synchronization, you should look into here.
Message Edited by Yardov on 06-18-2007 03:14 PM
Gerardo O.
RF Systems Engineering
National Instruments
Attachments:
property.JPG ‏7 KB

Counter/Timer Pulse Train generation

Hello,
I am having some trouble understanding why a particular VI I have isnt working(upper part of image below), I was wondering if someone could give me an idea of the cause from the error message. I have a counter/timer which I am using to generate a pulse train. It works fine on 'Continuous samples' but when I switch it to 'finite samples' I get a 'resource is reserved' error when it gets to the DAQmx 'Play' VI
I made a separate VI (lower part of image) and it works just fine with finite samples. So I am basically wondering what is different about finite versus continous sampling which could cause a resource to be reserved or not. (the board is a PXI 6281 if that matters)
Thanks,
Adam
Solved!
Go to Solution.

You're correct on what the problem is.
For what it's worth, the newer X Series boards (63xx) and 2nd Generation Compact DAQ Chassis don't require the use of two counters for finite pulse generation (although technically there is a paired internal counter to accomplish the finite pulse generation, it's not really evident to the user). These products also have 4 counters available instead of 2.
Best Regards,
John Passiak

Question of pulse train generation

Hi,
      I need to change the frequency of a continuous pulse train to control a stepper motor.
All examples I found is to update the parameters of a counter in a while loop. How fast
the frequency can be updated depends on the execution time of the loop. Most examples
have a 10ms delay function in the loop. I want to update the frequency in 0.01ms interval,
I wonder if is it possible to use this method. Is there a better way to do it?
      Thanks for help!
      Regards,
      Tao

Tao,
Unfortunately, you're not going to be able to update your frequency at a rate of 0.01 msec (100 kHz) for at least two reasons.
1. If you're using Windows, the OS won't loop at a consistent rate. The variations wil easily be in the order of milliseconds, possibly more.
2. The counter hw won't allow you to change a frequency until a full pulse has been generated at the prior frequency. You couldn't change the freq at 100 kHz unless the step rate was in the 100's of kHz.
I've been waiting for NI to provide NI-DAQ support for buffered pulse generation for about 7 years now, largely for the kind of stepper control you're describing. At this point, I've stopped holding my breath...
Meanwhile, there may be some other options. You could consider a dedicated motion control card. Or you could use a card supporting timed DIO (such as the new M-series cards). Finally, here's a link to an example I worked up that allows you to generate a finite pulse train with varying frequency. It isn't everything you need, but it might be a nudge in a useful direction...
http://forums.ni.com/ni/board/message?board.id=40&message.id=2411#M2411
-Kevin P.

How do I use the buffered counting mode at a fixed frequency?

Hi-
   I'm using a PCI-6259 M-series board with the Nidaq MX
drivers in Labview 7. I am trying to use one counter to do
buffered edge counting (eg. count how many pulses appear on one input
in 400 successive time bins of 10 uS each following a digital start
pulse). That is, my inputs are:
     Start Pulse (from experiment)
     Count Pulse (from a photomultiplier tube in the experiment)
And I want to know:
    # of pulses from 0 to 10 uS after the Start Pulse
    # of pulses from 11 to 20 uS after the Start
Pulse (or, equally good, # of pulses from 0 to 20 uS....I can
subtract later)
    # of pulses from 3991 to 4000 uS after the Start Pulse (or, # of pulses from 0 to 4000 uS...same thing)
   The Count Digital Events-Buffered-Finite-Ext Clk.vi sample
appears to do half of this. I can set this up CTR0 with the Count
pulse (and possibly add the start pulse as an Arm Start....I can't use
a Start Trigger, right?). However, I need to generate a Sample
Clock Source at 100 kHz (to trigger the card to buffer the counter
value and start counting in the next bin). So, I tried to set up
CTR1 along the lines of Gen Dig Pulse Train-Finite-Dig Start.vi for
generating a finite pulse train starting on a digital trigger, and
connecting the output from CTR1 to the Sample Clock Source on
CTR0. However, I get an error -50103 saying the specified
resource is reserved if I do both at the same time. But, I can't
see any resource conflicts...the pulse generation on CTR1 works fine
alone, as well as the buffered counting on CTR0, and all the PFI pins
are different. Is there some reason I can't use both counters at
the same time?
I think I can use the FREQOUT pin on the card to generate a Sample
Clock Source at 100 kHz, since I think this is independent of CTR0
& CTR1. However, I can't trigger the FREQOUT to always start
when I get a Start Pulse (as I can if I trigger a Digital Pulse Train
to start on a digital trigger...or can I?)...so my bins will move
randomly by up to 10 uS.
   This is an unrelated topic, but is there a discussion of
the relationship between the terminology in the manuals describing the
cards (SOURCE, GATE, OUTPUT terminals) and the terminology in NidaqMX
(Source Clock/SrcClk.Source, CI.CountEdges.Term, CO.Pulse.Term)?
Eg. is CTR0.GATE always the same thing as SrcClk.Source, or does it
depend on the mode of operation? If the M-series hardware manual
says to connect something to the SOURCE input, how do I assign an
alternate PFI pin to that SOURCE input in Labview? Does it depend
on the counter type, or is it always the same?

Dave,
Hi, you brought up several questions / issues -- let me see if I can help with some of them:
   I can set this up CTR0 with the Count pulse (and possibly add the start pulse as an Arm Start....I can't use a Start Trigger, right?).
Yes, you could set up this way. Also, as far as I know you're also correct that you need to configure for an "Arm Start" trigger using the DAQmx Trigger property node. The "Arm Start" trigger is used for counter input (measurement) apps while the regular "Start Trigger" can be used for counter output (pulse generation) tasks. I don't think I've experimented with recent versions of DAQmx though so it may have changed in 7.4 or 7.5
...I tried to set up CTR1 along the lines of Gen Dig Pulse Train-Finite-Dig Start.vi for generating a finite pulse train starting on a digital trigger, and connecting the output from CTR1 to the Sample Clock Source on CTR0. However, I get an error -50103 saying the specified resource is reserved if I do both at the same time
I highlighted the problem -- the FINITE pulse train. DAQmx uses CTR0 as a "helper" when you generate a finite pulse train on CTR1. It would generate a single pulse whose width corresponds to the exact amount of time needed for CTR1 to generate its specified # of pulses.
For your specific app, I think you could generate a triggered continuous pulse train with CTR1 -- this wouldn't need to use CTR0 as a helper.  The Start Pulse would arm CTR0 at the same instant that CTR1 is started.   If you set up CTR0 to acquire on the trailing edge of CTR1's pulses, then you'll get the time bins you want.
A final slight mod would be to setup CTR0 for measuring buffered periods (set units == "Ticks") instead of counting edges. In that mode, you wouldn't have to do the subtraction at the end.
   This is an unrelated topic, but is there a discussion of the relationship between the terminology in the manuals describing the cards (SOURCE, GATE, OUTPUT terminals) and the terminology in NidaqMX (Source Clock/SrcClk.Source, CI.CountEdges.Term, CO.Pulse.Term)? Eg. is CTR0.GATE always the same thing as SrcClk.Source, or does it depend on the mode of operation?
There's an NI app note and some discussion forum hits if you search the site for "daqmx terminology."
If the M-series hardware manual says to connect something to the SOURCE input, how do I assign an alternate PFI pin to that SOURCE input in Labview? Does it depend on the counter type, or is it always the same?
Usually, that choice would be available under the DAQmx Channel property node.   There'll be some place to define where the input signal is coming from, generally with "Term" or "Terminal" as part of its name.   Sorry I can't be more specific as I'm not at my LV computer now.
Happy counting!
-Kevin P.

Retriggerable finite pulse train

I have a problem using a retriggerable finite pulse train as in the NI example Retriggerable_Finite_Pulse_Train. I use ACTOUT to gate the first re-triggerable pulse control and the second pulse control generates the continueous pulse train which is gated by the first retriggerable pulse control. The ACTOUT signal is generated by an AI control which senses a crank trigger (Hall Sensor). The re-triggerable pulse train is used to modulate a fuel injector in sync with ignition timing and RPM. If the period of the ACTOUT signal changes due to a change in RPM, the pulse train is recalculated. It works OK with one hitch. Even at constant RPM, after about 15 re-triggerer pulse trains the final pulse of the train does not complete. This leaves the signal high in-between successive re-triggerer pulse trains. This incorrect high signal between re-triggerer pulse trains means that the fuel injector is incorrectly left on between pulse trains, when it should be turned off. This incorrect high signal goes on for about 10 pulse train events and then returns to normal. I use the ActualPeriod of the first re-triggerable pulse to ensure the pulse train ends correctly within window of the first re-triggerable pulse, but it seem to wander. Is there another way to create a different type of re-triggerable pulse train that overcomes this problem. I may have to use a single re-triggerable pulse instead of a re-triggerable pulse train as this work correctly every time. However, multiple pulses creates a finer mist from a fuel injector and is the correct why to modulate a fuel injector. The

CORRECTION TO PREVIOUS POSTING THERE WAS AN ERROR IN HOW I DESCRIBED THE PROBLEM:
I have a problem using a retriggerable finite pulse train as in the NI example Retriggerable_Finite_Pulse_Train. I use ACTOUT to gate the first re-triggerable pulse control and the second pulse control generates the continuous pulse train which is gated by the first retriggerable pulse control. The ACTOUT signal is generated by an AI control which senses a crank trigger (Hall Sensor). The re-triggerable pulse train is used to modulate a fuel injector in sync with ignition timing and RPM. If the period of the ACTOUT signal changes due to a change in RPM, the pulse train is recalculated. It works OK with one hitch. Even at constant RPM, after about 15 re-triggerer pulse trains the final pulse of the train does not complete. This leaves the signal high in-between successive re-triggerer pulse trains. This incorrect high signal between re-triggerer pulse trains means that the fuel injector is incorrectly left on in-between pulse trains. This incorrect high signal goes on for about 10 pulse train events and then returns to normal. This pattern repeats. I use the ActualPeriod of the second control's continuous pulse train to ensure the pulse train ends correctly within window of the first re-triggerable pulse. This work but with time this pulse train seem to shift slightly. Is there another way to create a different type of re-triggerable pulse train that overcomes this problem?

PXI 6602 - Retriggerable Finite Pulse Train Generation

Hi,
I have a VI in LV7.1 where I configure PXI 6602 to generate finite pulses whenever a trigger is received. And the Retriggerable Property is set to TRUE. I look for the task to complete in order to proceed with the other operations.. This actually works. As soon as the pulses are generated DAQmx Task Done becomes TRUE.
The same VI I upgraded to LV 2011but this time the 'DAQmx Task Done?' never becomes TRUE even after the trigger is received and pulses are generated.
Does anyone know if the 'DAQmx Task Done?' functionality is changed in higher version of LabVIEW so that it no more works as it was in LV 7.1?
Is yes, then do you know what property to use to know that the operation is done?
Any help is highly appreciated.
Thanks.

CORRECTION TO PREVIOUS POSTING THERE WAS AN ERROR IN HOW I DESCRIBED THE PROBLEM:
I have a problem using a retriggerable finite pulse train as in the NI example Retriggerable_Finite_Pulse_Train. I use ACTOUT to gate the first re-triggerable pulse control and the second pulse control generates the continuous pulse train which is gated by the first retriggerable pulse control. The ACTOUT signal is generated by an AI control which senses a crank trigger (Hall Sensor). The re-triggerable pulse train is used to modulate a fuel injector in sync with ignition timing and RPM. If the period of the ACTOUT signal changes due to a change in RPM, the pulse train is recalculated. It works OK with one hitch. Even at constant RPM, after about 15 re-triggerer pulse trains the final pulse of the train does not complete. This leaves the signal high in-between successive re-triggerer pulse trains. This incorrect high signal between re-triggerer pulse trains means that the fuel injector is incorrectly left on in-between pulse trains. This incorrect high signal goes on for about 10 pulse train events and then returns to normal. This pattern repeats. I use the ActualPeriod of the second control's continuous pulse train to ensure the pulse train ends correctly within window of the first re-triggerable pulse. This work but with time this pulse train seem to shift slightly. Is there another way to create a different type of re-triggerable pulse train that overcomes this problem?

Multiple pulse trains

I have to figure out a LabView program written by someone, which was basically used to generate 2 pulse trains alternating (ABABAB....). I need to modify the program so I can generate 3 alternating pulse trains (ABCABCABC....) using 3 counters (PXI 6602 and traditional DAQ).
A       ------------                                  ------------                                  ------------
         |              |                                 |               |                                |              |
         |              |                                 |               |                                |              |
B                      -------------                                   --------------
                        |                 |                                 |                 |
                        |                 |                                |                 |
C                                       ------------                                       ------------
                                        |               |                                      |              |
                                       |               |                                     |              |
When I looked at a typical Pulse Train Generation TIO. vi given below, I saw the pulse spec 1 (for idle time) and pulse spec 2 (for pulse length).
Is it possible to put another counter set attribute with pulse spec 1 after the pulse spec 1 and 2 again in order to give more delay time?
This will help a lot for me to modify the existing program in order to generate the 3 alternating pulse trains.
pchemjjang
Attachments:
Pulse Train Generation TIO test.vi ‏77 KB

Hi pchemjjang:
For a pulse train generation set up you will use one counter per pulse. In your case you card have 8 counters so you should be able to add another counter and change the delays to generate pulse phase delayed 180 degrees one from the other one, I have not tried it here so I’m not sure what obstacles you may find trying to setup this task. Here is an example that basically does the same but with four counters.
I know you are adding functionality to a program already written in Traditional DAQ, but you may consider NI-DAQmx for this or future development. This is especially important if you happen to upgrade your system in the future as any current and future hardware releases by NI will only be supported by the NI-DAQmx driver. Here’s a good link to get you started: Getting Started with NI-DAQmx: Main Page. I would also suggest reading: Transition from Traditional NI-DAQ to NI-DAQmx in LabVIEW, and the best thing you can look at is this examples code and these tutorials in traditional DAQ.
Jaime Hoffiz
National Instruments
Product Expert
Digital Multimeters and LCR Meters

Use angular Encoder position to trigger Digital out

Hi,
I am a beginner labview user, I have access to three modules, two NI9201 and one NI9401.
I have an angular encoder that is used to measure the angular position of a motors crankshaft, what I'm trying to do is use the encoder to trigger a digital out (spark event in the engine) at a certain angular position. For example, I would like to trigger at top dead center (or 0 degrees on the encoder), then I want to be able to change this to +5 degrees on the encoder, etc.
So far I am able to read in the angular encoder when the motor is running, I am also able to output digital out signals although I can't find a way to link the two together.
If anyone has any idea how to do this, it would be greatly appreciated, I have attached my VI.
Thanks in advance,
Nick
Solved!
Go to Solution.
Attachments:
Encoder_Spark.vi ‏40 KB
Encoder_Spark.vi ‏40 KB

Hi Nick,
I hope the attached vi will get you on track. It's just a general concept.
The while loop will run until you hit the stop button.
   I take it you will need one spark per revoultion.
This VI is really just an If/Then
   If the encoder value is equal to (in this example ) zero,
   Then trigger the digital output.
I know I have a broken wire, but I didn't know how to get the angular position from you DAQmx.
Let me know if this help. (Also let me know if I'm off target)
Good luck,
Bill
Attachments:
Trigger spark concept.vi ‏9 KB

PCI 6602:How can I use the digital lines of the board and in the same time to generate pulse train using a counter?

Hello!
My problem appeared when I tried to update my code from Traditional NI-DAQ Legacy to DAQmx.
I am using 2 counters (counter 5 and counter 7) from PCI-6602, to generate pulse train, and also the Digital I/O lines of the port 0 (the lines form 0 to 7). What I do in my application is that I am starting to generate the pulse train on the output of the 2 counters, and after that I am playing with the state of the digital lines.
In traditional there was no problem using the counters and the digital lines in the same time, everything was going perfectly, but in DAQmx this is not possible.
What happens: I start to generate pulse train on the output of the counters, no errors encountered, but when I try to modify the state of one line of the digital port the generation of the pulse train is stopped. This is happening when I start the task associated to the digital port.
My question is: it is possible to create a channel on the digital lines without altered the channels created for the counters?
Another thing what I manage to see using the "Measurement & Automation Explorer" and Test panels for PCI-6602, basically is the same thing, I generate pulse train on the output of the counter 7 and try to start a task on the digital line, but I get one error :
"Error -200022 occurred at Test Panel
Possible Reason(s):
Measurements: Resource requested by this task has already been reserved by a different task.
Device: Dev4
Terminal: PFI8"
Instead if I use the counter 0 or counter 1 to generate pulse train I don't encounter the same problem.
Which resources are used by the counters 2 to 7 from the PCI-6602 board and the counters 0 and 1 do not use?
Thank in advance for any replies!
Ciprian
Solved!
Go to Solution.

Hello Jordan, thank you for your reply.
I am sorry but I can not see or run your example, I don't use LabView, I use Visual C++ for developing.
Here is the code for generating the pulse train:
GeneratePulseTrain(unsigned long ulCount1, unsigned long ulCount2)
    short nStatus = 0;
    nStatus = DAQmxCreateTask("",&m_taskHandle);
    nStatus = DAQmxCreateCOPulseChanTicks (m_taskHandle, "Dev4/count5", "", NULL, DAQmx_Val_Low, 0.0, ulCount1,ulCount2);
    if( bTriggerMode == true) // if hardware trigger is enabled
       nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_ArmStartTrig_Type, DAQmx_Val_DigEdge);
       nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_DigEdge_ArmStartTrig_Edge, DAQmx_Val_Rising);
       nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_DigEdge_ArmStartTrig_Src,"Dev4/PFI17" );
   //set the internal timebase
   nStatus = DAQmxSetCOCtrTimebaseSrc(m_taskHandle,"Dev4/count5","20MHzTimeBase" );
   nStatus = DAQmxStartTask(m_taskHandle);
    return nStatus;
And the code where I try to set the digital line:
SetChannelState(short nState)
    short nStatus = 0;
    uInt8 wrtBuf0[1]={0};
    nStatus = DAQmxCreateTask("",&m_taskHandle);
    // Configure line as output
    nStatus = DAQmxCreateDOChan (m_taskHandle, "Dev4/port0/line0", "", DAQmx_Val_ChanPerLine);
nStatus = DAQmxStartTask(m_taskHandle);
    wrtBuf0[0] = nState;
    nStatus =DAQmxWriteDigitalLines (m_taskHandle, 1, 0, 0, DAQmx_Val_GroupByScanNumber , wrtBuf0, NULL, NULL);
    nStatus = DAQmxWaitUntilTaskDone(m_taskHandle,10);
    nStatus = DAQmxStopTask(m_taskHandle);
    nStatus = DAQmxClearTask(m_taskHandle);
    m_taskHandle = 0;
    return nStatus;

Generate a pulse train using a count from a quadrature encoder as the clock

I am trying to generate a pulse train with the same frequency as my quadrature encoder. Every time the encoder counts, I want the pulse to go high until the next count and then go low and so on. I am using a 6602 PCI card and a BNC 2121 accessory.

Maybe I'm not understanding your app, but I *think* you and I are approaching it from two very different directions.
As I understand it, you'd like to emit a pulse with each quad state change. Then that pulse would act as a counter Source signal. The counter will then increment on each pulse, to keep track of accumulated position. Further, you'd use your device-under-test (DUT) as a counter Gate signal, which would buffer the position count each time there's a rising edge on your DUT. The end result is a buffer of position values, captured at each rising edge of your DUT.
I'm talking about a different approach to produce the same data. You'd use 2 tasks on a M-series board. One of them is a hardware-timed digital input task based on "change detection." Each time one of the specified bits has a transition, your whole set of digital input bits can be captured and an internal "change detect pulse" is generated on the board. This task should be sensitive to the DUT edges.
The other task would be a buffered position measurement. It would receive the reference encoder inputs and internally do quad decode and keep a running count. The sampling clock for this task would be specified as the other task's "change detect pulse."
Net result: on each specified edge of your DUT, you'll buffer a reference encoder position value and a digital state of your DUT. You can choose to be sensitive to rising edges, falling edges, or (!!!!) both at once. You can also choose to be sensitive to many bits simultaneously. These are better capabilities than you get with the 6602 alone.
I *think* the 6220 should be ok, based on a quick overview of specs. I assume your 3.6 MHz is the rate of ref encoder quad state changes, right? In the approach I'm suggesting, you only need concern yourself with the rate of DUT edges which appear to be in the 10's of kHz or less.
Gotta go for now. Post back if any further questions.
-Kevin P.

How to change the frequency of pulse train on the fly using an array of values?

Hi all!
First I want to thank U for the great job you are doing for this forum.
Iam still busy trying to control a stepper motor, by sending pulses from my E-series 6024 to a compumotor s6- stepper Driver. I've managed to get it working. I desperately need to control the motor using the values from an array. I believe we can use two approaches for that:
1st - I can get an array of the "numbers of pulses". Each element must run for 10 milliseconds. Using that we can calculate the array of frequencies to send the number of pulses within 10 milliseconds for each specific element. Could we use the arrays of "number of pulses" and frequencies in a "finite pulse train " and up
date with each element every 10 millisecond?
2nd - Or Could we use of the frequency array in a "continuous pulse train vi" and update it every 10 milliseconds?
Please note that I must use the values as they are.
Can someone please built a good example for me? Your help will be appreciated.
Regards
Chris
Attachments:
number_of_steps.txt ‏17 KB
frequency.txt ‏15 KB

Tiano,
I will try to better explain the paragraph on LabVIEW. The original paragraph reads ...
"While in a loop for continuous pulse train generation, make two calls to Counter Set Attribute.vi to set the values for "pulse spec 1" (constant 14) and "pulse spec 2" (constant 15). Following these calls you would make a call to Counter Control.vi with the control code set to "switch cycle" (constant 7). The attached LabVIEW programs demonstrate this flow."
You can make two calls to Counter Set Attribute or you can make a call to Set Pulse Specs which, if you open this VI, you will see that it is just making two calls to Counter Set Attribute. What you are doing with the Counter Set Attribute VIs is setting two registers called "pulse s
pec 1" and "pulse spec 2". These two registers are used to configure the frequency and duty cycle of your output frequency.
The example program which is attached to this Knowledge Base demonstrates how to change the frequency of a continuous generation on the fly. Why continuous? Because changing the frequency of a finite train would be easy. When the train completes it's finite generation you would just change the frequency and run a finite train again. You would not care about the time delay due to reconfiguration of the counter.
If you would like to change the frequency of the pulse train using a knob, this functionality will have to be added in the while loop. The while loop will be continuously checking for the new value of the knob and using the knob value to set the pulse specs.
LabVIEW is a language, and as with learning all new languages (spoken or programatic) there is a lot of learning to be accomplished. The great thing is that LabVIEW is much easier than mo
st languages and the learning curve should be much smaller. Don't fret, you'll be an expert before you know it. Especially since you're tackling a challenging first project.
Regards,
Justin Britten

Retriggerable gated counter or analog pulse trains

Hi all,
I have a problem I could not resolve in the last days. It might be even a question of creativity of how to come up with a solution.
I have an external pulse train 1 at ca. 8 kHz (frequency not fully stable). With this pulse train, I want to trigger with each pulse an analog waveform. Using X-series boards, this works perfectly.
But now I want to gate this analog signal with another pulse train 2 that is much slower than the other one (pausetrig option). Theoretically, this works nicely, too. But in reality, the analog signal simply ends at the point where it is stopped by the pause trigger, whereas I want it to stop at the end point of the waveform.
Please have a look at the drawing attached
I would be really glad about any ideas on how to solve this problem.
Best regards,
Peter

I don't think I've ever defined both a start trigger and a pause trigger defined for the same task. Good to know it's allowed.
Given what you've already found, the solution is to control the timing of the end of the pause trigger pulse's active state (shown here as high).
Here's one approach:
1. Create the pause trigger pulse with a retriggerable single pulse task. Use a minimal "low time" and "initial delay". Set the high (active) time to be approximately (N+1) periods of your AO sample clock.  Technically, N+1 periods is a bit more than necessary, but it's sure to be enough and doesn't require research into deep details of AO timing.
2. Configure the AO task to use the pulse as *both* its start trigger (rising edge) and its pause trigger (pause when low).
Comments: this makes for a different timing diagram than you've drawn. Each external 8 kHz pulse causes a minimally-delayed pause trigger pulse which lasts long enough to generate the full AO waveform but ends before the next 8 kHz pulse. The choice of when to start and stop this trigger pulse will be up to your own logic and will be governed by software timing.
   Oh dang! That still leaves you susceptible to a partial waveform since you can't sync the software timing to occur during the desired small fraction of the 8 kHz interval with no AO waveform.
Second approach:
1. Similar to #1 above, but set the high (active) time to cover multiple 8 kHz periods and *don't* make the task retriggerable. To get the timing right in hardware, you'll need to generate a pulse that's *approximately* the requested length, but you'll reserve the right to tweak it so the edges fall in the right place.   You'll also define your pulse in terms of the external 8 kHz signal rather than in terms of internal board time.
     Specifically, configure to generate a pulse based on units of "Ticks" using the rising edges of the external 8 kHz signal as the "source of ticks." Set a minimal value (probably 2) for both the "low ticks" and "initial delay" inputs. The "high ticks" setting is where you do your tweaking.
    Suppose the desired pause trigger time is 10.3 msec. Nominally, that's 82.4 intervals of the 8 kHz external signal. Well, just round up or down as you see fit and wire this integer # into the "high ticks" input.
2. AO task is configured to retrigger off the external 8 kHz signal and be pause triggered by #1's counter pulse.
Comments: When you start the pause trigger pulse task, it will remain in its low idle state for the first two 8 kHz pulses. It will go high on the 3rd pulse and then revert low on the 82nd subsequent pulse.
   Because this pulse *also* acts as a pause trigger for the AO task, you're now synced such that the AO task is paused exactly as it is being retriggered, meaning that the previous waveform must have been allowed to complete. (The deep details of timing will prevent the AO task from generating 1 sample at this instant.)
-Kevin P

Can I generate pulse trains on more than one counter output at the same time?

I have a PCI 6601 card with a BNC 2121 to connect the signals to two devices. The card is used as a trigger for both devices and I want to be able to generate pulse trains on two output channels at the same time, with a time delay between the two. How do I do that in Labview 7.1 Development with DAQmx?

I feel foolish for not being able to figure this out, but it still doesn't work. Attached is the VI I use now. Counter 0 generates a finite pulse train and I programmed Counter 1 to generate a retriggerable single pulse triggered by CtrOinternaloutput. I still get the same error message: -50103 The specified resource is reserved. The operation could not be completed as specified.
The same happens if I set the trigger for counter 1 at PFI36 (default output of counter 0) or any other PFI line. If I try a pulse train generation on only one of the counters, both work fine.
If I try the example in traditional DAQ for multiple counter outputs with phase delay, it works fine.
Can you tell me what I'm doing wrong?
Attachments:
Shutter_AND_lamp_trigger.vi ‏103 KB

Using a SCC counter pulse train to control a SCC digital out signal

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