Variable amplitude pulse train

Does anyone have suggestions for ways to generate a biphasic pulse train with fixed pulse width (100 usec) and period (100 Hz), but variable amplitude? I use an NI-DAQcard. Thanks.

Hi Jeff- Thanks for the tip. This is how I ended up doing it...seems like this is what you suggested to do anyway?
I used simulate arbitrary signal to construct a scaled pulse according to the required pulse width and period (kind of like a signal prototype). I also used the random number generator as a scalar multiplier to vary the amplitude of the pulse prototype. Then I fed the multiplier output to the DAQmx timing and write vi and run them through a  while loop. This seems to work fine for the most part, except what I'm interested in is a normal distribution and not a uniform distribution random number generator. I can't seem to find one in Labview 8.2. I tried using the continuous random probability function but I'm getting an error with incompatible data types between array data source and waveform data sink. I'm too new to the data manipulation stuff and can't figure out how to get around that....I'm close though, right?. Can you help?
Thanks.

Similar Messages

  • Finite pulse train with variable pulse widths

    Greetings LabVIEW developers,
    Does anyone have code that can show me how to use E-series counters to generate a finite pulse train where the individual pulse widths vary? I need to generate a series of 20 pulses with the high time for each pulse randomly varying between 50 and 1000 microseconds. The low time for each pulse needs to be constant (around 50 microseconds).
    Thanks,
    Ryan Wright

    Ryan,
    Sorry, but this isn't possible with the counter/timers. I've been wanting this capability myself for about 6 years now.
    Personally, I think it's an unfortunate "hole" in product capability. The other major data acq hw allows you to capture and later replicate a signal of interest. You can capture an analog waveform with AI and later play it back with AO. You can capture a digital pattern and later play it back with timed DIO. You can capture buffered semi-periods with a counter -- but you can't play play them back later. So for your app, you'll need to generate the variable freq using timed DIO. The new M-series boards ought to work for this, or a dedicated high-speed digital board.
    There's another product that I think is even better for timed DIO though and it's put out by one of NI's "Alliance partners" -- Viewpoint systems. Here's an example of why I like it. Let's say you need to generate 20 pulses within 60 seconds. The times of the pulses need to be precise to within 1 usec, and they have no common divisors. The NI method will require you to use an update rate of 1 MHz and you'll create a buffer of 60 MB to represent the digital pattern at every usec. The Viewpoint method needs a buffer of 40 entries. Each entry is a combination of a timestamp and a pattern to generate at that timestamp. That pattern will just stay there until the next defined timestamp. So all you do is define the digital pattern at the instants when one or more bits will change. It works analogously for digital input - if you capture with 1 usec resolution for 1 minute but there are only 20 pulses (40 digital transitions), you only capture the 40 relevant timestamps & patterns instead of a full 60 MB.
    If interested, look for the PCI-DIO64 at Viewpoint's website.
    -Kevin P.

  • How do you set amplitude of pulse train?

    I have successfully downloaded and executed the sample program shown here:
    http://www.ni.com/white-paper/2991/en
    and see the pulse train generate in my oscilloscope.  When measuring the value of a pulse high, the oscilloscope says 5V. 
    How do I change it to 3?
    Looking at the DAQ Create Channel node I don't see any inputs for amplitude, only frequency and duty cycle.
    Where is the amplitude of 5volts being set and how can I change it to 3V?
    Solved!
    Go to Solution.

    Hi Nathand, and Ricky - 
    Do you guys think this website:
    https://decibel.ni.com/content/docs/DOC-3545
    Could help me? I noticed there is a minimum and maximum value passed in to the Analog Output function.  
    I could set the minimum = 0V and maximum = 3V.
    I will also look into the level shifter and transistor ideas.

  • How to continuously generate a pulse train with variable frequency

    Dear all,
    I am trying to use NI-USB 6259(BNC) to send Pulse signals to conduct position control of a servo motor with labview. The position control of servo motor follows these rules:
    The number of the pulse train determines how many degrees the motor rotate ;( e.g. the angular position of motor)
    The frequency of pulses determines how fast the motor rotate; (e.g. the speed of motor rotating)
    The digital determines the direction of rotation of motor (e.g. clockwise or counterclockwise)
    My question comes when I need to continuously generate a finite plus train signal in a period of time. Below is a sample:
    Time(s)
    Number of pulses
    Direction of rotation
    (1 is clockwise, 0 is counterclockwise)
    Frequency
    0-1
    923
    1
    923hz
    1-2
    3540
    0
    3540hz
    2-3
    1751
    1
    1751hz
    3-4
    2663
    0
    2663hz
    4-5
    353
    0
    353hz
    5-6
    1017
    1
    1017hz
    6-7
    3436
    1
    3436hz
    7-8
    302
    0
    302hz
    8-9
    1513
    1
    1513hz
    9-10
    570
    1
    570hz
    Here is the explanation of this table, the motor keeps rotating in clockwise direction during 0~1s. When the time reaches 1s, the motor just complete the rotation of 923 pulse signals. And then the motor starts to rotate in counterclockwise direction during 1s~2s. When the time reaches 2s, the motor just complete the rotation of 3540 pulse signals. So we can see that the rotating speed of motor in 0~1s is different from the speed in 1s~2s. Namely, the frequency of pulse signal in 0~1s is different from the frequency in 1s~2s.
    I have already use the counter output of DAQmx, it just can generate pulse signal with certain numbers and certain frequency in one time. The attachment is the vi which can generate a finite digital pulse train from a counter output channel and the frequency, duty cycle, Initial delay, and Idle state are all configurable.
    How can I continuously generate  a series of pulse train with varying numbers and frequencies during a certain period of time.
    Thank you very much for your help!
    Solved!
    Go to Solution.
    Attachments:
    Counter - Finite Output.vi ‏57 KB
    Finite output.png ‏13 KB

    Hi aacuna,
    Thank you for your reply!
    I already checked that  article.  The frequency in that Vi can change dynamically, but the method of adjusting the frequency is ‘manual’ .Below is the front panel of that Vi. When the Vi is running we can change the frequency by press the button.   
    Time(s)
    Frequency
    0-1
    923hz
    1-2
    3540hz
    2-3
    1751hz
    3-4
    2663hz
    4-5
    353hz
    5-6
    1017hz
    6-7
    3436hz
    7-8
    302hz
    8-9
    1513hz
    9-10
    570hz
    Thank you!

  • How can we generate a pulse train with variable inster pulse delays?

    I want to generate a pulse train with random inter pulse delays (100us-10000us) and the pulse width would be 50-100us. I programmed for single pulse generation using counter cfg,a for loop contaning set attribute parameters pulse spec 1 and pulse spec 2. I changed the pulse spec 1 value in every cycle
    This program is generating the pulses but not the exact values in the sense the some times the delays are more than 10 msec. As per the program the delay should be maximum 10 msec. please help me ASAP.
    thanks
    thota

    Hey Thota,
    I would suggest to take a look at the example program linked below. It shows how to change pulse specs on the fly. You have to be make sure you are ignoring a certain error when doing this.
    Pulse Train Generation with Changing Pulse Specs (PWM)
    http://sine.ni.com/apps/we/niepd_web_display.displ​ay_epd4?p_guid=B45EACE3E21756A4E034080020E74861&p_​node=DZ52328&p_source=External
    I hope this helps.
    Regards,
    Todd D.
    NI Applications Engineer

  • Need to unreserve a counter in a finite pulse train generation

    Hi. Let´s introduce my application first: I´m trying to generate a N-pulse train with the M series PCI-6221, in order to achieve a high frequency clock for an SSI transducer. That´s why i can´t use a software generation (because of the high frequency) and i have to use a finite pulse train. Besides, I would need to use another counter for a variable and finite count (but not simultaneously). The problem is that, as i think i have understood, this finite pulse train involves the two counters working together, so I can´t programm another task with that resources.
    My question is, Is there any way to do the finite pulse train generation, unreserve the counters, wait for a finite count to finish and so on?
    Thanks.

    Hello,
    My knowledges tell me that you need two counter to generate a finite pulse train.
    The first counter generates a pulsed of desired width and the second counter generates the pulse train which is gated by the pulse of the first counter (Counter 0=Pulse Generation, Counter 1=Pulse train generation).
    However, the finite pulse train generation and the continuous pulse train generation seem similar. The key difference is the generation mode from continuous to finite and the use fo a DAQmx Wait Until Done vi instead of a loop to monitor user input. From a point of view of the hardware there is a difference between the two. Continuous pulse train generation requires only 1 COUNTER.
    Maybe you can try with a continuous pulse train generation and with this method you have another counter to do a finite count.
    Regards
    DiegoM.

  • How to get delayed pulse train

    hello,
    i am using Labview 7 and a PCI 6014 interface card. i want to generate delayed pulse train. for this purpose i am generating a analog waveform using 'function generator.vi'. i supply this waveform to a counter and to generate delay i am using 'finite pulse train(daq-stc).vi'. when i set trigger mode to 'no trigger', the VI works fine. But if i supply generated waveform to the counter gate(i.e. setting trigger mode to external), i see for sometime pulses missing are missing. I have also tried several other VI's(like 'delayed pulse easy.vi' and 'cont pulse train easy.vi'), but facing same problem. Can you please tell me how can i solve this problem.
    regards,
    Abhijeet

    hello Alan,
    Ok! here i explain my code. My requirement is to supply contineous 5V pulses at around 10Hz to a camera. After some time of the rising edge of pulse to the camera, i want to trigger Laser-1 and after some time of rising edge of the pulse to the Laser-1, i want to trigger Laser-2. In PCI 6014 there are only two counters which i am using for two Lasers(for delay generation). For Pulse train generation i am using 'function generator.vi'which is basically a waveform generator, but to get pulse train i set offset equal to amplitude. I supply this pulse train to two counters. To generate delay from the counters i am using 'Delayed pulse easy(9513).vi' which i have put into while loop. To see the output i am using 2-channel oscilloscope vi where i see some pulses missing. Also I obsereved pulses missing when i supply the output to the Lasers(Lasers stops firing for moment).
    I am attaching a timing diagram which is explains my application and a labview code where i have combined three VIs (one 'function generator.vi' and two 'delayed pulse easy(9513).vi').
    Thank you,
    Abhijeet
    Attachments:
    camera+laser1+laser2.vi ‏188 KB

  • How to generate a bipolar pulse train in LabView using USB DAQ 6211?

    Hi,
    I am setting up a system to generate either a single square pulse or a train of square pulses using LabView, with controls to adjust the frequency, amplitude, number of pulses etc. I have had a lot of help from NI tech support setting up the actual VI itself which seems to be working fine, and outputting the pulses via a USB DAQ 6211 using a square waveform generator and the AO1 channel on the DAQ.
    The problem that I now have is that I need to pulses generated in a train to be bipolar (as they are connected to electrodes so need to be bipolar o avoid salt build up on the electrodes from the voltage going in one direction only, at least that is how I understand it!).
    How can I set up my LabView VI to generate a bipolar pulse train instead of always being positive voltage? I am new to this area and so am trying to learn but there is so much to learn!
    Thanks,
    spamjam

    Hi Shalini,
    Apologies for taking a while to get back to you, I hope I can explain what it is that we need to create with the pulses. I understand what you mean about the existing pulses having a positive and negative on the graph - but we need the pulses to start from a resting voltage and the first pulse to be positive, then back to zero, then the second pulse to be negative then back to zero etc. This is to do with reversing the direction of the current between two electrodes to prevent build up of salts on one electrod from the current always passing in the same direction. 
    I have attached a .Tif file to this post to try to illustrate what I mean - the top picture shows how the pulses are currently generated, then bottom on is what we would like to produce if this is possible?
    Thanks for your help,
    Spamjam
    Attachments:
    Slide1.jpg ‏38 KB

  • How to generate a pulse train with different pulse width and delay?

    How to generate a triggered pulse train with different pulse width. for example, after each trigger signal, let's say 2 ms, then the counter output a pulse with pulsewidth of 1 ms, and then after 3 ms delay after the first pulse, the second pulse was generated with a pulse width of 4 ms.  Next cycle when the trigger signal comes, the same two pulses will be generated and so on. Is it possible to achieve this by using 6601 counter card? and if yes, how to achieve this? Thanks!

    Unfortunately you can not create a hardware timed pulse train with different widths on each pulse from a counter. Whilst it can be changed on the fly using software, since you require a hardware triggered signal getting the software involved will not give a huge amount of accuracy when the pulse will actually change.
    So in short you can't use your 6601 card (or a counter timer) to achieve this
    There are three possible Alternative solutions
    1 You could use a high speed digital IO device such as the (6533/34) to generate your variable signal which would require setting up the pulse train as a series of states based around the burst transmission mode where the clock would give you your specific timing.
    2 A timed analogy output (for example on a MIO card with a clock (PCI-6220 / 62xx), i.e. Not the 6704 style static analogy output cards)
    3 A high speed digital waveform card such as the (, 656x , 655x, 654x, 6534, 6533 (http://www.ni.com/modularinstruments/find_right.ht​m) ) this could then be scripted to work with your triggering and also there is a digital waveform editor which will enable you to set up the pattern you wish to generate (http://sine.ni.com/nips/cds/view/p/lang/en/nid/135​55) 
    Hope that helps
    Tim Matthews
    NI (UK)

  • Finite Pulse Train TIO-Timing Specs

    Howdy everyone,
    Got a question regarding the pulse specs of finite pulse generation with a 6602 (TIO chip).
    I'm using a slightly modified version of the Finite Pulse Train (NI_TIO).vi found in the examples directory to produce finite pulses.
    The slight modifications are to allow for some hardware triggering.  I am using counters 2 and 3 to produce a finite pulse train.
    My external electronics provides the trigger to the gating counter.
    I want all of my timing specs relative to this external pulse.
    Let's say I want a delay of 10 seconds until my first output pulse is produced by the output counter; I want pulses to come every 1 sec; Pulses are 0.5 sec wide.
    I know from looking into the VI's that the TOTAL delay--ie the time from my external trigger until the time the output counter outputs a 0.5 sec pulse--is equal to the "initial delay (in secs) in the finite pulse specs cluster in the VI plus the interpulse interval minus the pulse width.
    Thus, If I enter a value of 10 seconds for initial delay, I actually expect the first pulse to be output at time = 10 +1 - 0.5 sec = 10.5 sec.  This is one-half second later than desired, but it is easy to correct.
    Now for my real question: 
    I'm usually looking at pulses coming about 20 msec after the trigger arrives.  The pulse interval is 5msec and the pulses are 0.5 msec wide.
     Even when I program my counters to get the timing I want with this correction, ie. implement the formula Desired Delay = "Initial Delay" - (pulse interval - pulse width), I still see my pulse arriving late by 1msec.  1 msec is enough that I care to get it right.  I don't understand the source of this delay.  Does anyone have any idea what could be happening?
    It seems totally independent of any parameters I enter for pulse interval, intial delay, pulse width. 
    Not sure if it matter, but I'm generating this finite pulse train inside of a much larger VI that is busy collecting and displaying data from a 6071E.
    Any thoughts/help would be greatly appreciated!

    I'm using Traditional DAQ (not DAQmx), so I think points 3 and 4 are not strictly true for my VI.
    (I'm am very hesitant at this moment to think about switching over to DAQmx :  I"m at the end of my graduate career and don't have the time to overhaul my program at the moment; and my VI works perfectly for my needs..except the 1msec delay.  I'll suggest future lab peoples move to mx...)
    As I understand, for traditional DAQ:
    1. Start the counter -- I believe it will force the output into its idle state (low by default).
    2. Trigger edge occurs
    3. Output remains in idle state for "initial delay."
    4. Output transitions to armed state and remains low for "low time" which is computed/specified by the "frequency" and "duty cycle" specs.  So the total delay is the "initial delay" + "low time"
    5. Ouput transitions to high state for a time, also determined/computed by the frequency and duty cycle specs.
    6.Thereafter, the times will be based on your regular pulse specs, such as low time / high time.
    OK, I didn't want to drag the VI into it, but it seems there is no other way; and I really want to know why my timing is not quite as I would expect.
    The VI I posted has 3 outter sequence frames.  The action, as far as we're concerned in this post, is in outter frame number 3; inner frame number 3, case True, subVI Finite Pulse Train (NI-TIO)-jev4.vi.  This VI is "slightly" modified from the example that came packaged with LV "Finite Pulse Train (NI-TIO).vi"  The modifcations I made were 1. removed the while loop that checked the status of the counters, because I needed this subVI to return before the pulse train had actually finished executing.  2. Added start trig capability to the gating counter's gate.  (Maybe  this is the source of the 1msec error?).
    There is a variable "stim delay (msec)"  that specifies when the first high pulse should be output from the 6602. (device 2  for me.)
    To complicate things further, " stim delay" is actually relative to another variable in Neurochip-legacy.vi called "record delay."  Record delay specifies the delay between the the arrival of the trigger pulse and start of data acquisition on NI6071E.  (had to do this because of the way things are set up in the lab).  This trigger pulse  is shared with the 6602--it is hardwired in a breakout box to also be routed to my 6602 card.  Thus, if the trigger arrives at time = 0, record delay = 20 msec, and stim delay = 40 msec, I would like to see my first output pulse of the train (on the 6602) come at time = 60 msec.
    For the time being I have set the "initial delay" = record delay + stim delay - (pulse interval - Ta), where pulse interval is just 1/"frequency" parameter for finite pulse generation, and Ta is the desired width of the output pulse which in turn specifies "duty cycle" parameter.  For the moment, I've also hardcoded in a 1msec correction--which was the whole reason for the original post.
    Maybe in all this arithmetic and wiring I've made a goof somewhere...if so, maybe a fresh pair of eyes would help.
    Ok, so if you are brave enough to check out the code,  it is attached.
    If you find that you are getting the same result as me, I would love to know it.
    If you are getting different result than me, I'd love to know it.
    If you see where I went wrong, I'd really love to know where.
    Thanks very much
    jon
    Attachments:
    Neurochip-Legacy.vi.zip ‏637 KB

  • How generate real pulses in myRIO from pulse train function

    Hi,
     I need to generate modulated pulses for an experiment. I should be able to select the number of pulse for second and their frequency, variate the amplitude among then and produce them in myRIO. To build those pulses I used the tool pulse train; however, I am stuck about how to generate those pulse from the pulse train function in real pulses in myRIO. The PWM tool, aparently, doesn't allow to select and change the amplitude between the pulses. Does anyone knows how to produce them from pulse train or even another way to do so? Thanks.
    Solved!
    Go to Solution.

    I need that each pulse have the same amplitude in the same pulse train, but just in case I want to change to each pulse different I made this draft code where I can manipulate everything that I need and change with few adjusts to the second option. I can control also the gap time. The program is running fine so far, but I still have one more task to do that is struggling me. I need to generate numbers inside the range (max-min) according to the steps with no repeatition. In case of lack of option the number does not need to to follow the rule of 2up1down. After run all the numbers between the range I need to start all over again. This code should be attached probably after restrict the number to the steps.  Any idea? The code is still not clean, which may cause confusion in some aspects. However, all I need to change is the beginning of the code to attach the non repeatition cicle. Thanks.
    Attachments:
    MonophasicGenerator.vi ‏36 KB

  • Signal generator Pulse train with switch cycle

    Bonjour,
    J'essaie de générer un signal avec un rapport cyclique tres variable sur une carte PCI6602
    Par exemple,
    j'utilise  en signal source internal clock de 20MHz et je souhaite que mon signal soit de la forme suivante :
    4cycles d'horloge à l'etat haut
    puis 2cycles d'horloge à l'etat bas
    puis 17cycles d'horloge à l'etat haut
    puis 4cycles d'horloge à l'etat bas
    puis 20cycles d'horloge à l'etat haut
    puis 5cycles d'horloge à l'etat bas
    pour cela j'utilise le generateur de signaux Pulse Train avec la fonction ND_SWITCH_CYCLE
    mais en verifiant à l'oscillo je ne vois pas le signal varier de cette sorte juste appliquer le dernier rapport cyclique défini.

    Unfortunately, I don't think you can accomplish that with a 6602.  The only way to change the pulse specs on-the-fly is through software calls to the driver, and those won't execute nearly as quickly as you need.  You would need to change the pulse specs for each and every pulse, and do it at a rate of ~1+ MHz.  The software calls will limit you far below that -- I'd guess somewhere in the order of 10 kHz.
    There's a further issue that you must let the prior pulse specs produce a pulse before the new pulse specs are allowed to take their place. So even for very slow pulse trains, it's difficult if not impossible to produce exactly one pulse at each set of specs.
    What is needed (see my wishlist starting at reply #10-11) is the ability to perform hw-timed buffered counter pulsetrain outputs.  Some of the M-series boards allow for hw-timed digital output at rates up to 10 MHz, but it appears that some of your intervals need to be odd multiples of a 20 MHz clock.  Some of the high-speed digital boards could work, but you're looking at ~$2000.
    How many cycles of precisely-timed pulses do you need?  If 8 or fewer, there may be a way to setup a bunch of separate counters that are hw-triggered to start simultaneously, but each produces a single pulse with just the right specs.  Then you'd need an output logic circuit which would essentially OR all the counter outputs together to produce the 1 output you need.
    -Kevin P.

  • High speed variable width pulse generation

    I searched NI's website the best I could but could not find anything relating specifically to my question.
    I want to produce a pulse of variable width every 10 ms.  It seems
    the ideal way to do this is to specify a counter to count a certain
    number of ticks and then go negative when it's reached that
    number.  It's pretty easy to get the counter to do that, however
    the speed is an issue.  Is there any way to have the counter
    generate a different width pulse specified by an input number of ticks
    that can update every 10 ms.  Any resources to help me figure this
    out that you can suggest would help greatly.
    I have PCI 6229 card and if I can figure this out, I'll submit a real nice stepper motor control VI as an example.
    Thanks,
    Phil
    Message Edited by flip518 on 07-19-2005 12:10 PM

    Phil,
    It isn't possible to do deterministic pulse width modulation with you
    board, however, I can think of a couple ways to try to get close. 
    If you set your board up to do a continous pulse train generation, you
    have the ability through a DAQmx Channel Property Node to
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    Millisecond Multiple to be 10, and thus approximately every 10 ms you
    would change the count register.  You can change the frequency of
    the pulse three ways, by frequency and duty cycle, actual pulse high
    time and low time, or actual clock ticks for the high and low parts of
    the cycle.  The problem with this method is that since Windows
    isn't deterministic, plus you are writing over the PCI bus to the
    hardware, you are not guaranteed the accuracy of the 10ms loop.
    Attached is a VI that shows this -- it is modified from the Gen Dig
    Pulse Train-Continuous.vi example that ships with the NI-DAQmx driver.
    Doug M
    Applications Engineer
    National Instruments
    For those unfamiliar with NBC's The Office, my icon is NOT a picture of me
    Attachments:
    Software timed Pulse Width Modulation .vi ‏65 KB

  • USB-6009 pulse train generation with digital output....

    Hello!
    I've bought a new USB NI-Card (USB-6009) and now I'm trying to adopt an old vi that uses traditional DAQ drivers. I wrote that vi for a PCI NI-Card (PCI-6024E), which has two counters to generate two pulse trains simultaneously. Now I've only one counter and that's why I'm searching for a good way to create pulse trains using a digital output! The pulse trains are both ranging between 100 Hz and 100 kHz.
    I'm sure somebody has an idea how I can solve the probem in the best way
    Kind regards,
    Peter

    You can't do it with this low cost board. Both digital and analog outputs are software timed only. The analog out is rated at only 150  samples/sec and the digital is about the same. You can't even use one of the counters because it is not a hardware timed counter output. It is an event counter only as an input.

  • Pulse train generation fails with certain values for "number of samples"

    I'm generating a retriggerable analog output signal, and so I'm using a counter as the sample clock (see: Retriggerable AI Using Retriggerable Counter). I am finding that, above a certain number of samples, and only for certain values of the number of samples, the counter task gives me error -200305, "Desired finite pulse train generation is not possibe." The error crops up only when actually starting the task.
    The analog signal that I'm trying to generate will be about 800 kHz, so my counter is set to run at the same frequency. I find that the counter task works fine if the number of samples to generate is anywhere between zero and 671,088 samples. Setting the number of samples to 671,089 gives the error above, as does 671,090 samples and so on. However, using 671,096, the counter task works fine. After that, the counter seems to output fine only if the number of samples is divisible by 8.
    The only thing I can think of is that (617088 samples) / (800000 Hz) = 0.839 s. At the internal clock rate of 20 MHz, 0.839 s is 2^24 samples, and it is a 24-bit counter on this hardware. So if it's this internal counter rolling over, that's fine and I can work around that. But if that's the case, what I don't understand is why increasing the number of samples in increments of 8 samples still works.
    The hardware is a PXI-6733 board, running with LabView 7.1.1 and NI-DAQmx 8.1.

    Hmmm,  multiples of 50 & 100?  Now I'm puzzled again.
    Here's how to make sense of the 100 kHz timebase idea though, even if it turns out not to be the right explanation.  For a retriggerable finite pulse train, you actually use a pair of counters.  If you were to program it manually, you could set your output counter to generate a continuous pulsetrain at 800 kHz using the internal 20 MHz timebase.  This output counter would also be configured to use the other counter's output as a digital level-based pause trigger.  So the 800 kHz pulsetrain is only output while the other counter's output is, say, high.
    The other counter is configured for retriggerable pulse generation.  The pulse duration or high time should be set for (# pulses) / (800e3 pulses/sec).  This other counter can be configured to use the 100 kHz timebase, so its high time would then have to be an integer multiple of 10 usec.
    So let's see...  An 800 kHz pulsetrain is possible with a 20 MHz timebase (exactly 25 cycles).  A 700 kHz (28 + 4/7 cycles) or 900 kHz (22 + 2/9 cycles) is not.  So when you request those other frequencies, you actually get a near approximation.  I dunno if DAQmx can be queried for the actual value correctly or not -- I recall an early version that reported back whatever freq you had asked for rather than what it actually used.  Queries based on ticks (rather than time or freq) did return what was actually used, as I recall.
    Let's suppose a request for 700 kHz gets truncated to 28 cycles of the 20 MHz timebase making a 1.4 usec period.  Then 50 of those periods becomes 70 usec, which is evenly divisible by the 100 kHz timebase.  Bingo!  (Note: 70 is the least common multiple of 10 and 1.4)
    Now suppose the request for 900 kHz turns into 22 cycles of the 20 MHz timebase, or a 1.1 usec period.  Now it takes 100 of those periods to get to 110 usec, which is also evenly divisible by the 100 kHz timebase.  Bingo again!  (Note: 110 is the lcm of 10 and 1.1).
    Did you follow the method here?  It should help you figure out expected results for various output freqs and #'s of samples.
    -Kevin P.

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