Vcd file generation for the T2 core

Question

Hello everybody,
I want to generate a vcd file of a specific unit of the T2 using vcs (I haven't Debussy).
Which are the compile time flags and the runtime flags to be set using the sims script?
I tried the -enableEvcd and vcsd and cli at compile time and in the compile.log file I read
***** Warning: ACC/CLI capabilities have been enabled for the entire design.
For faster performance enable module specific capability in pli.tab file
But when I run the simulation with -dump_evcd instance_name in the sims.log I read
Error: $dumppports needs acc/cli capabilites specified at compile time. Please recompile with acc/cli capabilites enabled.
What am I doing wrong? I checked and I run the correct simv executable.
Thanks a lot in advance
Regards
pico

Answer 1

it is very simple, for example I wanted to generate the evcd file for the pick unit of the T2 core so I added
$dumpports( tb_top.cpu.spc0.pku, "pku.evcd");
in the file verif/env/common/verilog/misc/dump.v
after :
`ifndef VCD_OFF
// VCD Dumpfile
// sims does file naming and start/stop for us.
initial begin
$dumpports( tb_top.cpu.spc0.pku, "pku.evcd");
and I recompiled the T2.
Then as vcs_run_args I put +vcd
I recall you that this is not a clean solution, the evcd file will be created every time, maybe you can find something better!
HTH
pico