Video Scaler clocking problem

Question

Hi all,
I have a problem with making work such configuration:
TPG->Scaler->VidOut->HDMI
                                |
                             VTC
TPG is configured to output 336x256 image yuv422.
Scaler input is configured to take 336x256 input, aperture is configured to take whole picture (0,0,335,255), output is configured to upscale to 640x480. AXI-Lite is off. Lanczos coeff, YUV422, Separate coeff all off, dual engine for YC.
VideoOut is configured as Master with maximum input buffer of 8192.
VTC is configured as 640x480p preset.
Clocks:
VTC and vid_io_out_clk of VidOut is feed by 25MHz, which result to 59.5 fps. 
The main problem: 
1) when i set all other clocks to 25 MHz everything works fine, I have an scaled image on display.
2) Set core_clk of Scaler to 50 MHz - everything works fine.
3) Set core_clk of Scaler to 100 MHz - and Video Out core fail to lock, no output on screen.
It`s hard to debug what is going on with ILA`s, because with maximum buffer depth of ILA a can`t capture full frame data on axis buses.
It is very strange, that increasing, not decreasing, of internal core clock gives an error. What can it be?
Tested on AC701 board, Vivado 2014.4
P.S. 45 MHz works, but even 51 MHz don`t. 

Answer 1

Sorry for the delayed response. You are correct, though, that the scaler is really designed to have a framebuffer on the output to observe the 'burstiness' of its output data (which is hard for the AXIS to Video Out core to handle since it can only buffer a line or two).