X series PCIe-6351 encoder reset

Hi,
I am working on the X series PCIe-6351 encoder input by using an example gpctex4.cpp from X series DDK. It seems counting fine. However, it doesn't reset the counter even it is setup as follow:
counter->Gi_Mode_Register.setGi_Loading_On_Gate(nCounter::kReloadOnStopGate, &status);
counter->Gi_Mode_Register.setGi_Trigger_Mode_For_Edge_Gate(nCounter::kGateLoads, &status);
and
counter->Gi_Counting_Mode_Register.setGi_Index_Mode(indexMode, &status); //indexMode = nCounter::kIndexModeSet;
Can anyone tell me what is wrong? Do I miss something?
Thanks,
Larry

LarryL wrote:
I am working on the X series PCIe-6351 encoder input by using an example gpctex4.cpp from X series DDK. It seems counting fine. However, it doesn't reset the counter even it is setup as follow:
counter->Gi_Mode_Register.setGi_Loading_On_Gate(nCounter::kReloadOnStopGate, &status);
counter->Gi_Mode_Register.setGi_Trigger_Mode_For_Edge_Gate(nCounter::kGateLoads, &status);
counter->Gi_Counting_Mode_Register.setGi_Index_Mode(indexMode, &status); // indexMode = nCounter::kIndexModeSet;
Can anyone tell me what is wrong? Do I miss something?
Just closing the loop in case others search and find this post later. Larry shared his resolution in another thread:
X series PCIe-6351 encoder reset
http://forums.ni.com/t5/Counter-Timer/X-series-PCIe-6351-encoder-reset/m-p/1996057#M10458
Joe Friedchicken
NI VirtualBench Application Software
Get with your fellow hardware users :: [ NI's VirtualBench User Group ]
Get with your fellow OS users :: [ NI's Linux User Group ] [ NI's OS X User Group ]
Get with your fellow developers :: [ NI's DAQmx Base User Group ] [ NI's DDK User Group ]
Senior Software Engineer :: Multifunction Instruments Applications Group
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)

Similar Messages

PCI-7344 motion controller encoder reset problem

I'm using a PCI-7344 motion controller for my application. I'm currently working on simple display of position and velocity using an encoder. I am able to read the encoder pulser, but I am unable to reset it. I want the encoder pulses to be display continously till I press a reset button on the screen. After pressing the reset button on the front panel, the encoder count should become zero and start counting again till I press stop button. Kindly give me a simple example of encoder reset using push button. Thanks.
Regards,
Giridhar Rajan
Cruiser Controls
Mumbai, India

This should do what you are looking for. I am not at the computer that has a motion controller card in it, so I have not tested it.
It resets the encoders for Axis 1 and Axis 2. Unless you have a different configuration for encoders and axes, it should work.
Hope that this helps,
Bob
Bob Young - Test Engineer - Lapsed Certified LabVIEW Developer
DISTek Integration, Inc. - NI Alliance Member
mailto:[email protected]
Attachments:
Reset encoders.vi ‏66 KB

How to use external timebase for Two Edge Separation measurement with PCIe 6351

Hi
I am working with PCIe 6351 x series DAQ card.
counter measurements.
Here i need to measure the time/no edges between two edges. Falling to Raising of two signals.
I got the measurement with internal time base.
here i need to synchronize the measurements with external clock from the external setup.
so i need to use that external clock,timebase for the counters.
Any solution please..
Regards,
Hari

First, the VI you mention is NOT for STC timer/counters. Therefore, it won't work.
If you want to get the time interval between two edges, you want to use the Functions -> Data Acquisition -> Counter -> Count Events or Time VI. This will do the function you are looking for.
Mark

NI PCIe-6351 Count Edges Channel error on fast TTL - Multiple Sample Clock pulses were detected

Hello,
I am trying to use a PCIe-6351 to record the arrival times of a fast TTL pulse stream (generated by an Excilitas/Elmer Perkin APD). The TTL pulses are 2.5 volt amplitude, 20 ns duration, with a gauranteed dead time of 50 ns between pulses. I am trying to use the the Count Edges function, with the 100MhzTimebase as the input terminal and the input to counter 0 (PFI8) as the sample clock. After a few seconds of acquiring data at 100 Mhz, the application throws the following error (-201314):
"Multiple Sample Clock pulses were detected within one period of the input signal"
I had thought that because there is 50 ns dead time between pulses, multiple pulses would never arrive within a single clock cycle of the 100 Mhz timebase. Is there any way this might not be the case? Alternatively, is it possible that the counter is triggering on some jitter around the edges of the pulses? If so, is there any way to filter such high frequencies without losing the 20 ns pulses?
I have read through the forums for similar problems with photon detectors, but have not been able to resolve this issue. Thank you for the help.
Matthew Bakalar

It sounds like the input signal is being detected as multiple edges.
The PFI filtering feature on the X Series card likely isn't going to be suitable for you. The minimum setting is actually exactly 20 ns, which should in theory guarantee a 20 ns pulse passing through. However, if the signal is high for anything less than that there wouldn't be a guarantee (depending on the phase of the timebase relative to the rising edge of the signal)--considering rise times and that there is evidently a glitch in the signal itself, it probably isn't actually a continuous 20 ns high time by the time the DAQ card sees it.
What you should do instead:
Configure a second counter as a retriggerable counter output (single pulse).
Use your external signal as the start trigger for this counter output task.
Set the initial delay, high time, and low time for the counter output task all to 20 ns (the minimum).
Use the internal output of the counter output task as the sample clock source for the original edge count task.
The counter output will be triggered when it sees the external signal, wait 10-20 ns, then generate a 20 ns pulse. If there is a glitch on the trigger line during this 30-40 ns that the output is generating, it will be ignored. The counter output will be re-armed in time for the next pulse given the minimum dead time of 50 ns between pulses.
Best Regards,
John Passiak

Incremental encoder: reset counter on pci 6014?

I want to connect an incremental encoder with A, B and Z to a PCI 6014 card. I found some VI's for counting A and B (DAQmx->Counter->Count Digital Events; DAQmx->Counter->Measure Posititon) . However I can't figure out what to do with the Z. Is there a way to reset the counters by Z? (I am using labview 2009)
Thank you very much!

Sorry, my fault. I didn't see you have an E-Series device.
Resetting your counter with a digital trigger is possible for Counter/Timer devices but not for your PCI 6014.
You can reset the counter with DAQmx by stopping and starting the task again. You could read your Z index on a digital input, if the input goes high (or low) you could reset the counter.
DAQmx: Count Digital Events with Option to Reset Counter
http://decibel.ni.com/content/docs/DOC-6576
I think this is the only way for the PCI 6014. Since you have to go through several software layers, the performance goes down a bit. If it is possible, i would recommend to change to a M-Series device...
Cheggers
Sascha E.
Group Leader Applications Engineering
National Instruments Switzerland

File Name Encoding resets to Roman from Cyrillic when importing into iTunes

I have added a large number of Russian songs to my library. Many of the file names were not imported using the correct file name encoding. I downloaded the file name encoding repair app and fixed all the file names in my iTunes library, but whenever I add the songs into iTunes, the names are reset to Roman encoding from Cyrillic. Is there any way to set and lock the encoding so iTunes doesn't reset it?

Fixing the filenames probably doesn't do what you need. iTunes uses the ID3 tags. See this note for info on fixing those:
http://homepage.mac.com/thgewecke/mlingos9.html#itunes

ISA500 series PCI compliance scans

We have a single customer who's having a problem with their credit card PCI vendor, First Data, scanning their ISA550W running 1.2.15. Of all my customers with an ISA500 series device, this is the only customer who has had a PCI vendor tell them they cannot run their scans and that they must whitelist an entire /24 to allow the scans to continue. The only open port is an encrypted remote support port and there are no other ACLs in place to block anything other than the defaults that ship with the ISA. Anyone have any ideas why the First Data would have a problem with the ISA550W?

Thanks for your reply. First Data http://biz.yahoo.com/ic/14/14441.html well, what can you say, they're big bully and in this case you have to love what ended up being the problem. First Data sent this to the customer:
This is an automated email to notify you that a PCI vulnerability scan of the IP addresses or domains used by CUSTOMER NAME could not be completed. This scan is included as part of your PCI Rapid Comply services.
Please confirm that the following IP addresses or domains are the ones you use for the transmission of cardholder data. Unless you have paid extra to your Internet Service Provider to get a "static" IP address, your IP address may have changed.
xxx.xxx.xxx.xxx
Also, please make sure you have added the following IP addresses to your firewall (and/or IDS/IPS) whitelist:
38.123.140.0/24 for the duration of your PCI scan. If another department within your organization (or a vendor) manages your firewall and IDS/IPS, please make them aware of this scan and request that the above IP addresses are temporarily added to the whitelist.
You need to have a passing PCI scan to be compliant. Therefore, once you have confirmed that the target hosts are correct and that your firewall and IDS/IPS whitelist allows access by 38.123.140.0/24, please schedule another PCI scan of the networks used to process, transmit, or store cardholder data.
Thank you,
First Data PCI Rapid Comply Support Team
[email protected]
As you stated, what these fools don't seem to get is by whitelisting their IPs any outside network scans (this isn't done by an internal software scanner but from their remote network) becomes moot. I tried explaining to their trained monkey that the proper behavior for a firewall that detects remote scans is to block those scans. The guy kep reading to me off his 3"x5" index card (I'm sure it wasn't a card, but you get my drift). He clearly had never even seen a firewall let alone managed a network.
After a couple hours of bouncing around inside First Data and shaking limbs, my customer got a call back from their account rep who stated that they were totally PCI compliant and that the e-mail was BOGUS! The e-mail was sent out just after 10AM Sunday, 23 June 2013 and we were notified 24 hours later. So 26 hours later this company who prides itself on being one of the biggest CC processing companies out there is too lazy to send a follow-up e-mail admitting they sent out false notifications wasting their customers' time and mine. I asked their media rep who called me back about 3 hours after I got the call from the customer, "who gets the bill for my time?" She had no answer. Hopefully the lawsuits pending against PCI and CC processors will have a chilling effect on their strong arm tactics and their clueless PCI scans.

SCB-68 & M-Series PCI-6221

I have a PCI-6221 M series (68PIN) that I want to connect to SCB-68
The manual that came with the SCB-68 (under Quick REference labales) does not show M Series Devices!
It only shows, E,S, 670X671X/673X,660X,653X and 7811R/7831R Devices.
Any idea where do I find the information for the M series devices?
Thank you

Hi,
The device pin-outs given in this manual for your PCI-6221 should match with your SCB 68 pin numbers.
As far as i know, the switch settings on SCB 68 has not changed for M series.
Plus your MAX also shows the device pinouts.
Go to device and interfaces, click on your card and select for device pinouts from the drop-down menu.
hope this helps
Regards
Dev
Attachments:
NI_622x_Specifications.pdf ‏192 KB

Register information on X series driver for encoder

Hi All:
I am working on the X series driver development by using MHDDK. After comparing M series and X series I found that theere is a Gi_Save_Trace bit in register Gi_Command_Register in M series. When it is set, the register goes into the latched mode after the next clock edge to assure valid data was latched. However, I can't find equivalent register bit in all X series counter registers.
Can anyone tell me what is the equivalent register bit for same function that Gi_Save_Trace does?
Thanks,
Larry

Hi PedroMunoz,
Actually, I wanted to post it at DDK forum. I don't know why it is shown here. I may need to do it again.
Thanks,
Larry

Can the M Series PCI 6221 control 24 VDC solenoid valves like the NI 9477?

Hi,
I am working on a project where three solenoid valves requiring 24 VDC and 8 Watts must be controlled by a PCI 6221 multifunction DAQ.
I read on the NI website that an external power supply and the NI 9477 can be used together to actuate solenoid valves. Since I already have the PCI 6221,
I was wondering if an external power supply would allow the PCI 6221 to power the valves.
Sincerely,
Tristram Jordan

Hey,
Is there any way to control solenoid valves using the PCI 6221 DAQ card? Is it possible for the DAQ card to control a driver circuit for the valves?
If there isn't an alternate way to control the valves, which DAQ do you recommend purchasing to control 3 solenoid valves and a pressure transducer?
I am not familiar with the compactDAQ. Does the digital output module need to connect to a DAQ card within the computer? If not, how does it communicate with the computer?
Sincerely,
Tristram Jordan

T7900 with Creative X-Fi Titanium Fatal1ty Professional Series(PCI-E)

Can I connect my T7900 with above mentioned soundcard. I mean my speakersystem only have a green, red, and black connector cable. Soundcard have 4 Connectors to connect speakers green, red, black and grey. Grey is for side speakers. Is this a problem to connect speakers with soundcard to use 7.1
thx for help

Hi CpTMaverick,
Do you have the Inspire T7900?
There are 4 connectors on the subwoofer, green, black, orange and grey. You will need a 4:4 cable to connect your speakers to your soundcard. Get in touch with the online store to check for availability.

X Series Board Driver

I have been reviewing the XSeries MHDDK documentation and examples as I figure out how I can use the X series PCIe-6351 to replace
the M series PCIe-6251 in our in-house control application.  As a start, I use the example aiex2 for anaalog input test. Now the problem is:
After armed the AI subsystem
aiHelper.getInTimerHelper(status).armTiming(timingConfig, status);
It can't get the following condition met
if (device.AI.AI_Timer.Status_2_Register.readSC_Q_St(&status) == nInTimer::kSC_Counting)
The device.AI.AI_Timer.Status_2_Register.readSC_Q_St(&status) returns 1 and nInTimer::kSC_Counting is 5
Therefore the measurement can't be started.
Any ideas?
Thanks,
Larry

Hi Joe,
That's where my problem is. I went through the aiex2.cpp code line by line and couldn't find why the start trigger signal is not detected. The following is some of the code, can you see any problem???
aiHelper.reset(status);
device.AI.AI_Timer.Reset_Register.writeConfiguration_Start(kTrue, &status);
aiHelper.programExternalGate(
       nAI::kGate_Disabled,// No external pause signal
       nAI::kActive_High_Or_Rising_Edge,// Don't care
       status);
aiHelper.programStart1(
       startTrigger,// Set the PFI line
       startTrigPolarity,// Make line active on...
       kTrue,// ...edge (not level)
status);
aiHelper.programStart(
       nAI::kStartCnv_InternalTiming,// Drive the clock line from internal oscillator
       nAI::kActive_High_Or_Rising_Edge,// Make the line active on rising...
       kTrue,// ...edge (not high level)
       status);
if(deviceInfo->isSimultaneous)
// Program the convert to be the same as START
aiHelper.programConvert(
       nAI::kStartCnv_InternalTiming,
       nAI::kActive_High_Or_Rising_Edge,
       status);
printf ("isSimultaneous\n");
else
// Program the convert clock to start on the sample clock
aiHelper.programConvert(
       nAI::kStartCnv_InternalTiming,// Drive the clock line from internal sample clock
       nAI::kActive_Low_Or_Falling_Edge,// Convert on falling edge
       status);
       printf ("convert clock to start on sample clock\n");
// Program the sample and convert clock timing specifications
timingConfig.setAcqLevelTimingMode(nNISTC3::kInTimerPostTrigger, status);// This is a finite measurement with samples after the trigger (eg post-trigger samples)
timingConfig.setUseSICounter(kTrue, status);// Use SI for internal sample clocking
timingConfig.setSamplePeriod(samplePeriod, status);
timingConfig.setSampleDelay(sampleDelay, status);
timingConfig.setNumberOfSamples(sampsPerChan, status);
timingConfig.setRetriggerRecord(kTrue, status);// Set the measurement to be retriggerable
if(!deviceInfo->isSimultaneous)
timingConfig.setUseSI2Counter(kTrue, status);// Use SI2 for internal convert clocking
timingConfig.setConvertPeriod(convertPeriod, status);
timingConfig.setConvertDelay(convertDelay, status);
printf("not simultaneou timing configuration\n");
aiHelper.getInTimerHelper(status).programTiming(timingConfig, status);
aiHelper.programFIFOWidth(nAI::kTwoByteFifo, status);
aiHelper.getInTimerHelper(status).clearConfigurationMemory(status);
for(u16 i=0; i<numberOfChannels; ++i)
// Set channel parameters
chanConfig[i].isLastChannel = (i == numberOfChannels-1) ? kTrue : kFalse;// Last channel?
chanConfig[i].enableDither = nAI::kEnabled;// Dithering helps increase ADC accuracy
chanConfig[i].gain = gain;// Set the gain (used by the hardware)
chanConfig[i].channelType = termConfig;// Set the terminal configuration
chanConfig[i].bank = nAI::kBank0;// AI channels 0..15 are on bank0
chanConfig[i].channel = i%maxChannel;// aiN where N = i%maxChannel
chanConfig[i].range = range;// Set the range (used by the scaler)// Push the channel configuration to the device
aiHelper.programChannel(chanConfig[i], status);
aiHelper.getInTimerHelper(status).primeConfigFifo(status);
device.AI.AI_Timer.Reset_Register.writeConfiguration_End(kTrue, &status);
aiHelper.getInTimerHelper(status).armTiming(timingConfig, status);
device.AI.AI_Timer.Status_2_Register.readSC_Q_St(&status);
printf("device.AI.AI_Timer.Status_2_Register.readSC_Q_St is: %x\n", device.AI.AI_Timer.Status_2_Register.readSC_Q_St(&status));
printf("nInTimer::kSC_Counting %x\n", nInTimer::kSC_Counting);
Thanks,
Larry

Do I need extra logic circuit for quadrature encoder using M-series DAQ PCI-6221?

Hi,
I understand that extra logic circuit, say quadrature clock converter LS7083/7084, is needed to enchance the reliability or integrity of the data for E-series board DAQ in accordance to application note: AN084.
This is due to the vibration/jitter of the motor during running.
Currently, I'm using M-series PCI-6221.
Is it this new model itself can eliminate to construct this extra circuit?
Coz I observed error is accumulating after motor rotating certain period of time. It defintely affect the control performance.
Other than using hardware, can we use software to eliminate/mitigate the error?
Please enlighten me. Thanks.
Best regards,
IANES

Hello,
The ap note you are referring to discusses circuitry that conditions the quadrature encoder signals before they get to the DAQ device to eliminate 'false' signals being sent to the DAQ device. The same system would apply to an M Series Device. I am not aware of any way to achieve this functionality in software. FYI, there is some good documentation for counters and counter applications for M Series. Take a look at the attached M Series help file. Hope this helps some.
-Alan A.
Attachments:
M_Series_Help.zip ‏1145 KB

Does Stop task reset a quadrature encoder counter?

I am using an M-Series PCI-6280 board, with one of its onboard counters wired as a quadrature encoder.
1)I start the counter task, take a set of measurements with the counter, and then stop the task.
2) The encoder which the encoder counter is monitoring continues to output quadrature encoder signals into the PCI board's counter.
3) I start the task again, and perform another set of measurements.
Which of the following occurs?
Upon starting the task again, the counter's previous value was wiped and the measurements taken in (3) start at 0 counts.
The counter keeps the value it had before it was stopped and subsequently started, and the measurements in (3) cumulate on top of the measurements taken in (1).
The counter keeps the value it had before it was stopped, continues to increment/decrement position in (2) even after the task is stopped, and when the task is started in (3) the counter value is cumulative with the quadrature encoder pulses in (1) and (2).
Thanks in advance for the help.
Solved!
Go to Solution.

Hello acmap,
In this case The behavior will be the following:
Upon starting the task again, the counter's previous value was wiped and the measurements taken in (3) start at 0 counts.
However, you can specify the initial count value of the counter on the Initial Count terminal of the DAQmx Start Task VI, so it doesn't have to start at zero, and you can implement the behavior described in your second option.
Daniel

Can I use the 'Export Signal Property Node' on a quadrature encoder?

Hi,
So I don't know which counter board I'd be using yet for this (it's used in conjunction with a PCI-6280--the PCI-6280's counter inputs are all taken and so I need another board), but assuming this is possible at all in DAQmx I wouldn't mind knowing whether, say, the PCI-6601 (or any other timer board for that matter) could do this. I'm programming this in LabVIEW 2010 by the way.
I want to have a counter which counts the number of pulses on one channel (I'll call this the 'clock' channel) between when another channel goes from low to high (which I'll call the trigger). It's basically a pulse width measurement, but I only care if there are more than n clock pulses between triggers. I need to have a hardware-timed digital signal which goes from low to high if there are ever more than n pulses between trigger changing state from low to high.
What I am planning to do is this:
Wire 'trigger' to the z-input of the quadrature encoder, and set the z-input value to some arbitrary large value such that, at the quadrature encoder counter task's settings, the counter reaches terminal count in n pulses.
Configure the quadrature encoder counter using DAQmx Export Signal Property Node (tutorial I was looking at is here: http://zone.ni.com/devzone/cda/tut/p/id/5387 ) to toggle a digital channel ('counter event output') from low to high if the counter reaches terminal count (ie, if the encoder reads n pulses).
If the encoder ever reads n pulses on 'clock' between two rising pulses on 'trigger', it sets counter event output high.
Is this possible? Reading through the manual of M series PCI-62xx devices, the index pulse loads the counter with a particular value so it seems like you could conceivably set the counter to the terminal count if you wanted. My only real problem is whether DAQmx Export Signal Property Node works on all counter tasks or just on edge counting tasks.
Thanks in advance for your help. If this isn't possible, I can reply with more details on the problem this is supposed to solve so that you can help me figure out an alternate method.
Solved!
Go to Solution.

There is probably a way to do it, but it it may be easier to use an X-series board for the job. They support a new counter capability for count reset on a digital edge without needing to be configured in encoder position mode. I am not sure exactly how that feature's been implemented however, so maybe it won't make things easier after all.
The plan based on the hoped-for behavior:
1. Configure an X-series counter for pulse generation based on "ticks" of your clock channel.
2. Set both initial delay and low time to the critical # of ticks.
3. Configure for count reset on a digital edge (if possible in pulse generation mode)
4. Configure the count reset value to be the critical # (or possibly 1 less, if possible in pulse generation mode)
5. If you want the output to remain high indefinitely, configure the counter task to use its own output as a
pause trigger, and pause while high.
The way pulse generation works is to preload a # of "low time" ticks into the count register. Then every source edge will decrement the count. When the count reaches terminal count (0), the counter's output is toggled (or can be configured to pulse). The register is then loaded with the # of "high time" ticks and the process continues.
You would be perpetually interrupting the count-down process as long as you got your triggers in time. The count would keep getting reset to the # of low counts, keep decrementing toward 0 without reaching it, and so on. If ever you did reach 0, the output state would toggle high, then the high state would prevent subsequent clock signals from decrementing the count.
You can conceivably do a similar thing with a 6601, but I'm pretty sure you'd need 2 counters working together to get it working.
-Kevin P

X series PCIe-6351 encoder reset

Similar Messages

Maybe you are looking for