Combinational logic for BCD seven segment
HI all,
I have to design the combinational logic for BCD to seven segment display using only And, Or and Not gates and simulate it using the multisim software. I had come out with the truth tables, kmaps and finally i got all the SOP for each of the segments (a - g).
Now i have a problem, using multisim i do not know how to simulate the output. Am i going to draw all the logic diagram for a to g, and how am i going to combine them together?
What other components do i need to proceed with the simulation? Please advice, thanks in advance!
I'm not sure what SOP means, but I am very, very familiar with this project.
Here is a file that sets up a basic structure for you so you can see how it works. I used a Common-anode 7-segment display since those seem to be more common in school kits, which makes the final gate outputs active low. I've only done the "A" segment for an example. You may notice that the gates I have are different than what you get with Karnaugh mapping, because I used the Quine-McCluskey method that Multisim's Logic Converter can produce. It makes for less gates, but is not a method you really want to do manually. If you are doing a school assignment, I would advise against using the Quine-McCluskey result, because an instructor will tear you apart if it doesn't work and you can't show your proofs, so don't forget to remove my gates!
Ryan R.
R&D
Attachments:
7-Segment Driver Array Starter.ms10 101 KB
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Moderator message : Spec dumping not allowed. Thread locked.
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