High Consistent Gets and memory settings

What is actually high consistent gets?
I get High Consistent Gets for certain sessions. Following are some of my parameter settings.
db_16k_cache_size = 0
db_2k_cache_size = 0
db_32k_cache_size = 0
db_4k_cache_size = 0
db_8k_cache_size = 0
db_block_size = 8192
sga_max_size = 7632M
sga_target = 7632M
shared_pool_reserved_size = 119957094
shared_pool_size = 48M
pga_aggregate_target = 1500M
Will setting AMM by configuring following parameter help Oracle to manage the memory in terms of workload and reduce CONSISTENT GETS?
Or do I need to manually configure parameter such as "db_8k_cache_size".?
memory_max_target = my SGA+PGA: 9.5G
memory_target = my SGA+PGA: 9.5G
sga_target = 0
pga_agreegate_target =0
Regards, Lily

Lily wrote:
What is actually high consistent gets?These are the logical IO's . If the logical IOs are high, it may mean that you have selected a lot of data which is now supposed to be given back to you. The high Logical IOs is not something that you should try to minimize using a high amount of memory since its already cached data. That sort of workaround works or would work if the physical IOs are high. If the session is doing more logical IO's check the query and the selectivity of the data and see if you can limit it further.
I get High Consistent Gets for certain sessions. Following are some of my parameter settings.
db_16k_cache_size = 0
db_2k_cache_size = 0
db_32k_cache_size = 0
db_4k_cache_size = 0
db_8k_cache_size = 0
db_block_size = 8192
sga_max_size = 7632M
sga_target = 7632M
shared_pool_reserved_size = 119957094
shared_pool_size = 48M
pga_aggregate_target = 1500M
Will setting AMM by configuring following parameter help Oracle to manage the memory in terms of workload and reduce CONSISTENT GETS?
Or do I need to manually configure parameter such as "db_8k_cache_size".?
memory_max_target = my SGA+PGA: 9.5G
memory_target = my SGA+PGA: 9.5G
sga_target = 0
pga_agreegate_target =0
As I said, instance tuning is not something that you should aim for .
Aman....

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    | Id  | Operation              | Name         | Rows  | Bytes | Cost (%CPU)| Time     |
    |   0 | SELECT STATEMENT       |              |    27 |  4536 |    14   (8)| 00:00:01 |
    |   1 |  HASH GROUP BY         |              |    27 |  4536 |    14   (8)| 00:00:01 |
    |   2 |   VIEW                 |              |    27 |  4536 |    14   (8)| 00:00:01 |
    |*  3 |    FILTER              |              |       |       |            |          |
    |   4 |     HASH GROUP BY      |              |    27 |  2916 |    14   (8)| 00:00:01 |
    |   5 |      NESTED LOOPS      |              |  2686 |   283K|    13   (0)| 00:00:01 |
    |   6 |       TABLE ACCESS FULL| CI_ACCT_CHAR |  2686 |   157K|    12   (0)| 00:00:01 |
    |*  7 |       INDEX RANGE SCAN | XM064P0      |     1 |    48 |     1   (0)| 00:00:01 |
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    Execute      1      0.00       0.00          0          0          0           0
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          0    VIEW
          0     FILTER
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      ----------------------------------------   Waited  ----------  ------------
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      SQL*Net message from client                   179        0.00          0.08
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    Girish Sharma

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    It is what I see when each of the 7 processes start to write a simple string like 'Hello!' in parallel to each page in their shared memory segment that I get surprised. I run out of memory on my ws after a while and the system starts to wildly page out physical memory to disk so that the next 'Hello!' can be written to the next page in the shared memory segment. It seems that each page written to in the shared memory chunk is mapped into each process private address space. This means that the shared memory is not physically shared, just virtually shared. Is this correct?
    Can memory be physically shared, so that my 7 processes only use 200 MB? ISM? DISM?
    I create a shared memory segment in a C-program with the following calls:
    shmid = shmget(key, SHM_SIZE, 0644 | IPC_CREAT)
    data = shmat(shmid, (void *)0, 0);Thanks in advance
    /Sune

    Your problem seemed reasonable. What were you doing wrong?
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  • Virtex6:Configuration data download to FPGA was not successful. DONE did not go high, please check your configuration setup and mode settings

    Hello,everyone.
    I am using virtex6 FPGA and trying to download mcs file to PROM and have failed.
    I download .bit file to FPGA and succeed.
    When i try to download .mcs file to PROM XCF128X-FTG64C(BPI Flash) and choose Slave SelectMAP Mode
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    done.
    PROGRESS_END - End Operation.
    Elapsed time =      0 sec.
    // *** BATCH CMD : identifyMPM
    // *** BATCH CMD : assignFile -p 1 -file "C:/Users/Administrator/Desktop/TEST/LED/led.bit"
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    INFO:iMPACT:501 - '1': Added Device xc6vlx240t successfully.
    INFO:iMPACT - Current time: 2014/3/13 8:48:14
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    PROGRESS_START - Starting Operation.
    Maximum TCK operating frequency for this device chain: 66000000.
    Validating chain...
    Boundary-scan chain validated successfully.
    INFO:iMPACT - 1: Over-temperature condition detected! [ 230.52C >  120.00C]
    1: Device Temperature: Current Reading:  230.52 C, Max. Reading:  230.52 C
    1: VCCINT Supply: Current Reading:   2.997 V, Max. Reading:   2.997 V
    1: VCCAUX Supply: Current Reading:   2.997 V, Max. Reading:   2.997 V
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     Match_cycle = NoWait.
    Match cycle: NoWait
     LCK_cycle = NoWait.
    LCK cycle: NoWait
    done.
    INFO:iMPACT:2219 - Status register values:
    INFO:iMPACT - 0011 1111 0111 1110 0100 1011 1100 0000
    INFO:iMPACT:579 - '1': Completed downloading bit file to device.
    INFO:iMPACT:188 - '1': Programming completed successfully.
     Match_cycle = NoWait.
    Match cycle: NoWait
     LCK_cycle = NoWait.
    LCK cycle: NoWait
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    '1': Programmed successfully.
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    // *** BATCH CMD : assignfiletoattachedflash -position 1 -file "C:/Users/Administrator/Desktop/TEST/LED/leda.mcs"
    INFO:iMPACT - Current time: 2014/3/13 8:49:32
    // *** BATCH CMD : Program -p 1 -dataWidth 16 -rs1 NONE -rs0 NONE -bpionly -e -v -loadfpga
    PROGRESS_START - Starting Operation.
    Maximum TCK operating frequency for this device chain: 66000000.
    Validating chain...
    Boundary-scan chain validated successfully.
    INFO:iMPACT - 1: Over-temperature condition detected! [ 230.52C >  120.00C]
    1: Device Temperature: Current Reading:  230.52 C, Max. Reading:  230.52 C
    1: VCCINT Supply: Current Reading:   2.997 V, Max. Reading:   2.997 V
    1: VCCAUX Supply: Current Reading:   2.997 V, Max. Reading:   2.997 V
    '1': BPI access core not detected. BPI access core will be downloaded to the device to enable operations.
    INFO:iMPACT - Downloading core file D:/Xilinx/14.3/ISE_DS/ISE/virtex6/data/xc6vlx240t_jbpi.cor.
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     Match_cycle = NoWait.
    Match cycle: NoWait
     LCK_cycle = NoWait.
    LCK cycle: NoWait
    done.
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    INFO:iMPACT - 0011 1111 0111 1110 0100 1011 1100 0000
    INFO:iMPACT:2492 - '1': Completed downloading core to device.
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    Cable speed is default to 3Mhz or lower for BPI operations.
    Current cable speed is set to 3.000 Mhz.
    Setting Flash Control Pins ...
    Setting Configuration Register ...
    Populating BPI common flash interface ...
    Common Flash Interface Information Query completed successfully.
    INFO:iMPACT - Common Flash Interface Information from Device:
    INFO:iMPACT - Verification string:  51 52 59
    INFO:iMPACT - Manufacturer ID:         49
    INFO:iMPACT - Vendor ID:              01
    INFO:iMPACT - Device Code:            18
    Setting Flash Control Pins ...
    Using x16 mode ...
    Setting Flash Control Pins ...
    Setting Configuration Register ...
    '1': Erasing device...
    '1': Start address = 0x00000000, End address = 0x008CE03B.
    done.
    '1': Erasure completed successfully.
    Setting Flash Control Pins ...
    Using x16 mode ...
    Setting Flash Control Pins ...
    Setting Configuration Register ...
    INFO:iMPACT - Using Word Programming.
    '1': Programming Flash.
    done.
    Setting Flash Control Pins ...
    '1': Flash Programming completed successfully.
    Using x16 mode ...
    Setting Flash Control Pins ...
    Setting Configuration Register ...
    '1': Reading device contents...
    done.
    '1': Verification completed.
    Setting Flash Control Pins ...
    Current cable speed is resumed to 6.000 Mhz.
    '1': Configuration data download to FPGA was not successful. DONE did not go high, please check your configuration setup and mode settings.
    `Elapsed time =    814 sec.
    and i find many people have met the same thing. But they are spartan  series FPGA and i try to low the Resistances of Mode pins,M0 M1 and M2, but the problem does not been solved.
    I have read the status Registers and find there is an over-temperature state 
    and in Impact i could not readback the registers. It is strange.
    I am anxious about this problem and have not solved it yet
    What reasons may it be?
    Hope for your answer, thank you

    Hi~I want to know if you solve the configuration problem for virtex-6?
    As I encounter the  same configuration problem, I want to consult  you with some question.
    Can I have your email?
    gszakacs wrote:
    I have measured the VCCINT and find it is 1.0V, not 2.997V;
    That is not at all surprising.  I always assumed the problem is with reading the XADC (system monitor) block and not with the voltage or temperature.
    my Reference board is ML605
    That would have been nice to know at the beginning...
    It seems that you have selected the correct mode, assuming your jumpers are set as required in the ML605 Hardware User's Guide.  See table 1-27, table 1-33 and the note below it about switch S1.
    I'm not that familiar with the details of this reference design, but it may be that the slave SelectMap circuitry requires a reset or power cycle to actually configure the FPGA.  Have you tried power-cycling to see if the FPGA boots from the flash?
    I'd also suggest that you select the V6 in the JTAG chain view, then go to the debug menu of Impact and select Read Device Status (this is from memory, but it's something like that).  That will not only show the bits of the configuration status register, but also describe what each bit means.  Among other things you can check the state of the FPGA's configuration logic and the Mode pins.
     

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