How can I with LabVIEW programatically control the RS-422 port?

I would like to talk to my hardware through the RS-422 protocal, how would I do this in LabVIEW?
Thanks alot for ANY help.
Brian

Most likely the communication would be identical to what you do for RS-232, only you would use the port number associated with your serial hardware. Thus you can use VISA starting with the serial examples in LabVIEW.
There are a few extra things like the transceiver control on NI-Serial RS-485 hardware that have special VISA calls, but those are easy to add.

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If I recall, CTRL-D is EOF on most ASCII tables.
You'd probably have to use an escape sequence
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In article <[email protected]>, TLS
wrote:
> How can I use LabVIEW to send the equivalent of a CTRL D (in VT 100
> format) out the serial port of my computer?
>
> I am trying to write a vi that interfaces with a piece of OEM
> equipment that is set up to talk with a VT 100 terminal. I can't seem
> to locate the ASCII equivalent string (if there is such a thing) of a
> CTRL D. Is there a vi that emulates VT 100 commands?

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how can we publish Labview data using the web?
Dr. Eugene Berman, Moran Kamilyan and Ravit Bar

[email protected] wrote:
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I have kind of run into a stone wall. I am building a production test executive based on LabView. Part of this process includes loading an FPGA image on to a CFI flash that is in the JTAG chain. I am trying to make so that the production operators don't have to open a second application, select the right FPGA and Flash navigate to the file then load it, then go back to LabView and run the rest of the tests.
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C:\altera\12.1sp1\qprogrammer\bin>quartus_pgm -c USB-BLASTER -m JTAG S_FPGA.
cdf
Info: *******************************************************************
Info: Running Quartus II 32-bit Programmer
    Info: Version 12.1 Build 243 01/31/2013 Service Pack 1 SJ Full Version
    Info: Copyright (C) 1991-2012 Altera Corporation. All rights reserved.
    Info: Your use of Altera Corporation's design tools, logic functions
    Info: and other software and tools, and its AMPP partner logic
    Info: functions, and any output files from any of the foregoing
    Info: (including device programming or simulation files), and any
    Info: associated documentation or information are expressly subject
    Info: to the terms and conditions of the Altera Program License
    Info: Subscription Agreement, Altera MegaCore Function License
    Info: Agreement, or other applicable license agreement, including,
    Info: without limitation, that your use is for the sole purpose of
    Info: programming logic devices manufactured by Altera and sold by
    Info: Altera or its authorized distributors. Please refer to the
    Info: applicable agreement for further details.
    Info: Processing started: Thu Oct 03 18:16:53 2013
Info: Command: quartus_pgm -c USB-BLASTER -m JTAG S_FPGA.cdf
Info (213045): Using programming cable "USB-Blaster [USB-0]"
Info (209060): Started Programmer operation at Thu Oct 03 18:17:19 2013
Error (209062): Flash Loader IP not loaded on device 1
Error (209053): Unexpected error in JTAG server -- error code 5
Error (209012): Operation failed
Info (209061): Ended Programmer operation at Thu Oct 03 18:17:21 2013
Error: Quartus II 32-bit Programmer was unsuccessful. 3 errors, 0 warnings
    Error: Peak virtual memory: 376 megabytes
    Error: Processing ended: Thu Oct 03 18:17:21 2013
    Error: Elapsed time: 00:00:28
    Error: Total CPU time (on all processors): 00:00:03
Solved!
Go to Solution.

Hi Eric,
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Thanks for the interest though
Best regards John

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