How to determine FPGA code size ?

Question

Hi!
Designing my application, I would like to have an estimation of the memory space it will take into the FPGA ... Is that possible ?

Answer 1

Yes I agree with you. Here are some tips that might help you during coding.
1. Avoid using series of multipliers.
2. Avoid using too many nested case structures.
3. Avoid using replacing more than one element of an array at a time.
4. Try and pipeline your code as much as possible to achieve higer clock rates.
5. Identify the critical path and see if you can reduce this length by adding register in between sections of the code.
6. After all this, do not forget to test the functionality of the code on your PC before starting the compilation process.
All the above are applicable when you are writing code inside a single cycle time-loop.
I would also recommend that, do compile your code in parts rather the complete system. In the meantime, you can disconnect the compile server from LV and continue work on other sections of the code. After the compilation is done, you can always reconnect to the compile server to link the bitfile to the VI.
You will learn to estimate the clock rate and slices used on the FPGA.
--Vinay