LabVIEW FPGA Sine Wave Generator Reset Input Behavior

I would like to know what the output from the Sine Wave Generator express VI is while the reset input is true, and what happens to the output immediately after the reset input is set false.
I need to generate a regular sequence of positive half-cycles of a sine wave, with an arbitrary delay between them that is not related to the actual frequency of the sine wave. So my plan is basically to periodically fire a trigger in the fpga software that resets a sine wave generator and directs its output to an analog output until the sine wave goes negative, at which point the analog output is set to 0 until the next trigger.
Thanks

Muchas gracias por responder steve.bm
El problema que tengo es el siguiente, estoy desarrollando un proyecto en el cual uso los conversores DAC y ADC de la  tarjeta FPGA Spartan 3E para lo cual use como base el proyecto que esta subido por la NI que se encuentra en uno de los enlaces que me dejaste,( Lesson 8 - Linking Existing VHDL Code from WebPACK into LabVIEW FPGA) del mismo solo modifique para usar el ADC y el DAC mediante el cual adquiero una señal senosoidal y la tengo que reconstruir, el problema es que como uso un generador de señal de laboratorio al ingresar la frecuencia de muestreo para obtener una buena reconstruccion, la frecuencia se baja lo cual en el proyecto real no podra pasar ya que la frecuencia ya en proyecto final la adquiero de la red electrica publica pero ahora para pruebas estoy con un generador, la verdad no se que pasa porque tiene un retrazo la señal.....
Te parece si te puedo dejar mi proyecto subido en enlace para que lo revices ??

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