Maintaining previous idle state while loading a waveform

Question

Hi,
Is it possible to generate waveform1, in idle state hold the last bits of waveform1 (using 'X' in the idle state function), then load waveform2 while still maintaining the idle state from waveform1, and then generate waveform2 having it start from the idle state of waveform1?  Or is the idle state lost when waveform2 is loaded and/or initiated?
Thanks!

Answer 1

Hi hch3,
Our Digital boards hold last value when in generation mode. So they will hold the last state by default, and once stopped will hold last value until the board is reset. You can then load a waveform, while it holds last state, and once starting your generation session again, it will generate waveform 2 as you expect.
Some terminology discussion: An Idle State is what happens you are waiting for a trigger, you are in a pause trigger state, or the board completes normally. It sounds like in your scenario, you are outside of a session and you are loading a new waveform to be generated by your session. In this case, the board will hold its last value (default Idle State setting).
We give customers the ability to change the idle state behavior though the niHSDIO_ConfigureIdleState function or Configure Idle State VI. It is default hold last value, but you can set it to logic high, logic low, or tristate if you desire.
If you do not want to hold last value any longer for any reason, the HSDIO Tristate VI is what I would recommend to set the data lines back to their initial default state. Calling a board reset will cause the data lines to tristate as well.
Kyle A.
National Instruments
High Speed Digital I/O Product Support Engineer - R&D