Multiple timed loop question

I am currently in the planning stage of a medium sized labview application and I need some help figuring out the best approach as application of this size is still new territory for me.
I have a daq device monitoring 4 channels, a couple of motor controls, and the goal is to update the GUI with the information from the 4 channels, and also calculations performed on that information, all while letting the user control the motors in real time. All actions and data will be logged and written to disc preferrably in real time.
The plan so far is of course to beak them up into subVI's, with the motor controls in 1 subVI, and the monitoring in 1 subVI, calculation performed on the data in another subVI, and a main driver VI that controls the timing of the loops and updates the GUI.
I initially thought about using action engines for the data acquisitions, but I realized that using action engines might "freeze" the program when data acquisition is happening, and the user will lose control of the motors. Another approach is the producer/consumer pattern, where the incoming data from the DAQ is consumed to perform calculations and the data logged onto disc. This is the approach that I think I will take, but how do I implement the real time motor controls into this pattern?
The idea that I have is to have a main program state machine that handles all user input, and parallel loops that implement the producer/consumer model, and another parallel loop that will update the motor information when it is changing. Is this a suitable approach for an application of this type? Would a queue help the timing aspect in between the parallel loops? As calculations must be performed on each iteration and updated to the gui before the next data point is acquired, at the speed of 100hz. I am having trouble visualizing how to implement multiple loops in separate subVI's and synchronizing the data in between each other.
Please advice if there are other better patterns/approach for something like this.
Thank you.

Producer consumer would fit here well. You will also need to use a state machine system for flow control. I would also look into event structures and firing events. If you put all of this together it will make a nice simple upgradable program. This is a system that I helped somone else start.
Tim
Johnson Controls
Holland Michigan
Attachments:
Try This System.zip ‏84 KB

Similar Messages

Limited sampling rate with multiple timed loops

I am trying to use two timed loops. The first timed loop is supposed to acquire some analog inputs, average the values, and then display the average values on the Front Panel at a rate of 2 Hz. When I want to acquire data I enter a second timed loop and try to acquire data at a rate of 50 Hz. The second timed loop is designed to acquire 1 value and then append the data to a file. During the 50 Hz acquisition I want the first timed loop to also run so that the Front Panel continues to refresh values at 2 Hz.
The problem I'm getting is that the second timed loop doesn't acquire and write data any faster than the first timed loop. So in this case I'm limited to 2 Hz data acquisition when I want 50 Hz.
Attachments:
SWIFT_Dive Record2.vi ‏270 KB

Hi FRLFTE,
the second loop run not faster because both loops are in the same "big" while loop, so that the second loop has to wait till the first is ready.
Mike

Write to XML File crashes when multiple Timed Loops present

Hello All,
It took me forever to track this bug down.
In this project we can edit operating parameters on the Host and send them down to an RT program in a cRIO-9025. The data is converted to XML and stored on the cRIO's disk.
Occasionally, the RT program would lock up and had to be rebooted.
It turns out that if you use Timed Loops , then a Write to XML File (or presumably any file write) will not return.
Attached is an example. This has 5 loops to make it crash faster, but it will eventually crash with only 2.
Paul J
Attachments:
XML Write test.vi ‏93 KB

Hello Chris,
I know that Write to XML File fails because I put in debug code in my actual program, a flat sequence which updated an indicator, and after the crash, the indicator had not updated.
Yes, I know that it replaces the file. It's a configuration file, not data gathering. This is just an example of the bug.
FYI,
I increased the period for the loop with the file save to 500msecs and it still crashed.
I then decreased it to 50 msecs, and replaced all of the other Timed loops with While loops and it does not crash, even though the file save takes much longer than 50 msecs, average ~150msecs.
I replaced the loop with the file save with a While loop while leaving the others as Timed loops and it does not crash.
So the bug is systemic and related to a file save in a Timed Loop when there are other Timed Loops.
I'm not looking for a solution, I'm only reporting a bug in Labview. The solution is not to use Timed Loops, especially, as you point out, when there is file saving. It cost me several days of dicking around to figure it out. Maybe someone can save some time if they find this.
Paul J

Multiple timed loops in RT interface- initialization, communication

Problem Description :
I am attempting to deploy an adaptive control system using cRIO. I have an NI
9505 that controls a motor, and triggers other part of the machine to produce
data. I get data in my control loop and perform on-line estimation (currently)
using RLS estimator.
I have two-fold trouble
1> My Motor control and data acquisition is on one FPGA VIs and data filtering
and Estimation algorthon is on the other FPGA VI. I am supposed to call both of
the FPGAs in my RT interface VI with necessary operations.
Problem 1: How to simultaneously call two FPGA VIs in separate timed/while
loops in my interface VI?
2> Note that these two loops are supposed to talk with each other, once
estimation VI produces new coefficients, they are to be fed back to control VI,
I am not sure how to perform this.
It's kind of time critical that I accomplish this , Please help.
Thanks,
NI Software : LabVIEW Professional Development System version
NI Hardware : CompactRIO device

Because of the nature of FPGA, you can’t call two FPGA VIs at the same time. When you call an FPGA VI, you load up an FPGA bit file and physically reconfigure the FPGA chip. The FPGA chip can only be configured for one bit file at a time, so simultaneously calling two files at once will not be possible. If you need to perform functions from both VIs simultaneously, you could try combining them into one master VI that contains the functionality of both VIs. You could then pass information to and from each RT loop to the appropriate section of FPGA code. Keep in mind that FPGAs are a finite resource, so you’ll need to make sure that this new larger FPGA VI still fits on your chip.
Hope this helps answer your questions!

Unable to run Timed Loops

Bit of an odd one that had me scratching my head.
I have a development system consisting of a PC running a 7842R, acquiring analogue and digital data from the FPGA, loading it into a shared variable, and reading it out within a timed loop on the host as one parallel loop in a producer-consumer architecture.
All's well until one day last week when I noticed my host VI becoming unresponsive.
After a bit of digging, I find that the timed loop doesn't run at all. Replacing with a while loop with a wait at least allows me to show that the error is timed loop related, but it's not a viable long term option for me. Creating a new project and a new VI with a simple timed loop showed the same behaviour.
A restart of the system, and rerunning the same VIs, and no problems since.
So, questions:
1) Has anyone else seen this behaviour?
2) Any idea what causes it? A service crashing, for example?
3) Is there a way of recovering without a reboot? If it's a service crash, I'm hopeful.
The system will eventually form part of a production test environment, hence the query.
Edit - also, wiring error terminals of a timed loop is a good way of highlighting errors of course.
FWIW, LV2012 SP1 32bit, Win7 64bit, Core2 Duo, 4GB RAM, tassels from the handlebars etc.
CLD

The timed loop is used to read all elements from a DMA FIFO and load them into a buffer FGV, which spits out packets of N samples long once they've assembled within the FGV. Ordinarily, I'd do this with a timed while loop and be perfectly happy to do so. However, the elements are actually an interleaved array, meaning that I have to demux them in the correct order that they were loaded.
I use timed loops for a number of reasons: on my current Windows host, I've found that using a while loop has caused me more problems with respect to disordered packets, and that at least with using multiple timed loops (two, at most), I can assign priority to the acquire loop. Finally, it's also a development platform, and will be deployed onto an sbRIO once the electronics integration is finished in a week or two!
W.r.t. system resources, there's very little else running on that system, but that doesn't normally stop Windows
I recognise it's not ideal to run a software timed loop under Windows, but when you cannot run a blank project with Optimizing timed loop rate.vi from the shipped examples with nothing else running, it makes me curious to know why!
CLD

Why does a CRIO-9004 only provide a timed loop of 1kHz (clock) and not 1MHz?

I essentially have a compact CRIO-9004 and require a PID loop with update rates around 4-5 kHz. Additionally, I was hoping to use multiple 'timed loops' in the program in order to synchronize certain events. During this coding, the timed while loop will not work with a 1MHz clock rate and I am stuck with a clock rate of 1kHz instead. NI claims that PID loops in conjunction with the CRIO may have up date rates as high as 200 ksps. However, it appears that by employing the 1kHz clock that I can only obtain 1 ksps.
What are my options?
Thanks,
Shane

John-
The 9215 has a conversion time of 4.4us when scanning 1 channel (see page 14 of the 9215 operating manual). This equates to a little over 227KS/s. The 100KHz value is if you are reading from all 4 channels.
Link to operating manual:
http://digital.ni.com/manuals.nsf/websearch/5F2E9640C1CFE645862573AF007ABAD9
Dustin
Message Edited by Support on 10-16-2009 09:16 AM

How do I associate timing with multiple AI loops that is independant of loop execution speed

I am using Labview 7.1 and I am performing AI of
voltage on different channels of the same multifunction DAQ. I am
using while loops to aquire the data. I am writing the data to
spreadsheet file with an associated time as a 2D array. Currently I am
using the 'elapsed time' interactive subVI to get the time in seconds
(attempting to use the 'Get Date/Time in seconds' and converting it to
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maybe the number of seconds is too large to display single second
precision with a DBL floating point number). When I run AI on two
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from "elapsed time" are accumulated at different rates. I have tried
using timed loops to control timing, but if one loop executes at a rate
slower than the timing of the loop the 'elapsed time' still accumulates
at different rates. I need to be able to associate both analog inputs
to the same time
value in the spreadsheet value and I would like to find a way to
associate a time with each data point that is independant of loop
execution speed (although I would still like to control execution speed
of the loops. I am pretty new to Labview and programming in general,
any help would be greatly appreciated.

If you want to read more than one AI at the same time, you should use a trigger. You would need to set up the AI Trigger to an external source. Then you would have to use a function generator or digital out to create a clock. The clock would be wired to the AI external trigger. When the clock goes high (or low depending on configuration), both AIs would read. That is the method I use when needing to sync multiple AI inputs.
- tbob
Inventor of the WORM Global

Questions about parallel and series sturcture in SCTL (single clock timed loop) in FPGA VI

I am using LV 8.2.
I have wriiten a FPGA VI, in this VI, there are 3 filters inside the SCTL (single clock timed loop) (I use the shift register to be the effect of unit delay). Would I save the resources of the FPGA used (such as slices and LUT) in the compliation report if I use 3 SCTL ( 1 SCTL contain 1 filter) and cascade them in series?
Thank you!

Sorry, I am afraid that you have misunderstood my meaning.
Here is the method you suggested before:
I mean I use the shift registers attached in the while loop, not in the SCTL. The number of shift registers used will not be decreased when we increase the number of SCTL in the second plate of the flat sequence structure. Totally , there are 6 pairs shift registers for 3 filters (1 filter needs 2 pairs). I mean I put the calculation parts, such as b0*x[n]+b1*x[n-1]+b2*x[n-2] inside the SCTL ( the operations of multiplication and add). Instead of putting 3 filters numeric operation part in one SCTL. will we reduce the resources used if we use 1 SCTL to do the operation parts of 1 filter? As the code inside each SCTL will be reduced.
Maybe you tell me if such approach will reduce the reosources used? Or there is no difference?
Thank you!

LabVIEW crashes in timed loops

Hi,
I'm running LabVIEW 8 on a
Pentium D, 2 GB RAM, Windows XP sp2 with an ETS target Pentium 4, 256
MB RAM. I have two timed loops in a sequence, so they do not execute at
the same time. A similar sequence is on the target allowing me to make
a state machine between both computers.
The loops on the host
simply update the GUI for the user have a large period of 45-ms. This
makes the CPU usage virtually zero. Also, task manager tells me that
LabVIEW on the host only uses 200 MB of memory, so I know that the
computer is not running out of memory.
When I run the multiple
VIs, the host will randomly crash. It works about 9 times out of 10
with no crashes. Windows will tell me that it (is sorry and) has to
close LabVIEW on the host. The target side continues to run like
nothing happened. When I click on the link requesting details, I get
this information from Dr. Watson:
AppName: labview.exe
AppVer: 8.0.0.4005
ModName: lvalarms.dll
ModVer:8.0.0.6
Offset: 00001df4
I
have narrowed it down and I know that it will only crash in the two GUI
loops. Does anyone have any ideas about how to approach this problem?
-J

Recently, I have had similar problems with timed loops (LV8.0.1/W XP). According to NI's answer, this is linked to hyperthreading. Unfortunately, until now, my question if this incompatibility is a bug or not remains unanswered. Because my application is critical, I have replaced all the timed loops with while loops even if the crash didn't appear during a short test with disabled hyperthreading.
Hope this solves your problem.
Here is an extract of the exchange with JR Andrews from NI :
04/04/06
The preliminary investigation of the issue indicated that it may be due to hyperthreading (or having dual processors) and that disabling hyperthreading resolved the issue as a potential workaround. If you have the time and ability, I would be interested to know if you were seeing the issue on a hyperthreaded machine and if disabling hyperthreading does in fact resolve the issue for you. I can then pass that information on to the developer to assist them in fixing the issue.
Regards,
JR
JR Andrews | LabVIEW Real-Time & PDA Product Support Engineer | 512-683-2820
05/04/06
Even though your computers only have 1 processor, that processor may be using "Hyperthreading" to make it appear to the OS that there are 2 processors. You can check this by looking that Performance tab in the Windows Task manager or at the number of processors shown in the Device Manager. I've attached a screen shot of my system which is a single P4 processor which is hyperthreaded. Disabling the LV option for "Run with Multiple Thread" would probably not have any effect because to Timed Loops are always their own thread and that setting only applies to non-timed loop LabVIEW code. So I wanted to clarify that double check that your machine indeed does not have hyperthreading. To disable hyperthreading, you can go into the BIOS and you should be able to disable it. You can always go back and enable it again too.

Timed loop and CPU usage

Platform is WIN_XP Pro and machine is a P4 at 2.5Ghz with 512 Mb ram.
LV7.1 + PCI 6229
I am using 50ms Timed loop for running a state machine inside it
and also a whole lot of other things like reading / writing
DAQMx functions; file I/O functions and such. As the
project involves a main and sub-panlel set up local variables
could not be elimnated fully and there should be something like 150 of
them. But not all are accessed always - maybe about 15 of them at any
given time depending on the SM staus.
Problem :
Once started the "Finished late" indication is off and
the actual timing alternates between 49 to 52 ms. The CPU
usage is around 25%.
But as time goes by, the system gets unstable : After 15 minutes
or so, the Finished Late indication is always ON and the CPU usage is
gradually tending towards or exceeds 100%.
Obviously the machine control timing now gets affected and things slow
down badly. Closing the application ands restarting repeats the above
cycle.
I am at a loss to understand what is happening ? WIll
breaking down the single Timed Loop to multiple ones help ? WIll
that be an efficient way of parallel threading ?
I can post the code but its quite large and will do it as a last resort.
thanks
Raghunathan
Raghunathan
LV2012 to Automate Hydraulic Test rigs.

Hello,
It sounds like an interesting problem. It would be worth some experimentation to figure out what's going wrong - attempting to decouple major "pieces" of the code would be helpful. For example, you could try breaking your code into multiple loops if that makes sense in your architecture, but perhaps you could even eliminate all but one of the loops to begin with, and see if you can correlate the problem to the code in just one of your loops.
Another concern is that you mention using many local variables. Variable read operations cause new buffer allocations, so if you're passing arrays around that way, you could be hitting a problem of forcing your machine to perform many allocations and deallocations of memory. As arrays grow, this can be a bigger and bigger problem. You can use other techniques for passing data around your block diagram, such as dataflow if possible (just simple wires), or queues where dataflow can't dicatate program flow completely.
Hopefully looking into your code with the above considerations will lead you in the right direction. In your case, removing code so that you can identify which elements are causing the problem should help significantly.
Best Regards,
JLS
Best,
JLS
Sixclear

Using timer/counter with PCI-6221/USB-6210 to control timed-loop VI

Dear all,
I need to ask about two devices and one of their functionalities, PCI-6221 and USB-6210. For our NI-based system, we need to control some timings in a Timed-Loop vi, for that currently we are using PCI-6221 and we give external TTL signal (at 1 kHz) to it,
recenntly we need to make some changes and for that we found USB 6210 DAQ to be more suitable, but we need to clear ourselves on some specific things.
Can the counter/timers functions available in the either PCI 6221 or USB 6210 can be used to control the Timed-loop VI by giving external clock or by using their own internal clock source?
Although we are using external clock with the PCI 6221 but we want to know about the usage of their internal clock, also are controlling timed-loop also possible for USB-6210
Also... What if we use the RTOS, are they still able to control the timed-loop VI without giving any 'EXTERNAL CLOCK' and using the internal clock sources of the DAQs
Waiting for reply,
Bests,
RaJaf
Solved!
Go to Solution.

Ben,
I having read previous email which I send earlier with general overview, we discussed in more detail within our team and I am giviing the specific answers.
Please check in RED the most recent answers. Blue are the questions/suggestions by your side.
1.    Using Internal hardware clock of PCI-6221 would enable us get rid of external clock, but how to divert the internal hardware clock to the current settings. Any idea (can you provide us with some reference manul for otherwise). I mean is there some flag-bit etc. or VI
2.       Is it also meant that with the installation of RTOS the timed-loop can directly get the timing source from the internal hardware clock PCI-6221? --- How???
3.       In order to make desktop to work as RT system, what is the hardware (motherboard, processor, etc..) requirement? What are the LabVIEW modules (specific name) that needed to be installed? Our platform is LabVIEW 8.6. (Currently we have windows-7 with i7 core processor)
What kind of application are you intending for this system? ---- high-speed laser scanning system.
Are you most concerned about accuracy, speed, or responsiveness? To control the laser mirror scanner to move at 1 kHz or 2 kHz speed. On the other hands, using PCI-5105 (128 MB memory) as a DAQ for real-time/on-the-fly data processing.
Bests,
RAJAF

Timed Loop in Producer/Consumer Loop

Hello!
I have a producer/consumer loop LabVIEW program setup to allow me to properly capture images that are quite large (8MP) at approximately 14 frames per second (FPS). The program works great when the consumer loop is a 'while loop' (records at 14fps no problem), but I wanted to make it into a timed loop, so that I may vary the FPS as required. An oddity arises when I do this. Anywhere below 12fps, the loop works fine and the data is recorded properly. However, when I bump it up to 13fps, the consumer calculated FPS goes haywire and starts jumping between ~9 and ~13fps (data processing gets bogged?). When I set the required FPS to 14, the loop executes at a steady 7FPS maximum. Is there something I can do to rectify this situation?
I have attached my .VI
Thanks in advance!
Solved!
Go to Solution.
Attachments:
ProcessSplitJPG-FPS.vi ‏100 KB

Palanski,
Are you using LabVIEW Real-Time? Timed loops in a windows OS don't really increase determinism more than a while loop with a wait until next multiple timer. Before you changed the producer consumer loop to include a while loop was the programming running correctly? You may also want to vuse the VI analyizer to see how long things are taking to run. I would leave the producer consumer loop in the traditional set up and change the FPS by controlling the wait timer, after benchmarking your code this should be done the same way as you have it for the timed loop
Sam S
Applications Engineer
National Instruments

What is the best/most effective way to dynamically build a timed loop in LabView?

I am relatively new to labview (not to code in general) and am looking for the "LabVIEW" way to dynamically build a timed loop. This is what I am trying to accomplish:
I have several heaters controlled through labview using Labview's PID toolkit. This works great. I have no issues with DAQ in general. However, throughout an experiment, I want to change the set point of each heater. I could set this up fairly easily using either a timed loop or the wait vi if I knew exactly how many different set points there would be.
If possible, I would like to be able to read in a config file that includes the different times and set points for all heaters and dynamically create a loop that can handle this. I have tried using the Elapsed Time vi with an array of time targets; however that didn't seem to work.
Has anyone been able to do this? Does anyone know where I could learn about using LabView in this manner? All help is appreciated.

DHagan wrote:
I am relatively new to labview (not to code in general) and am looking for the "LabVIEW" way to dynamically build a timed loop. This is what I am trying to accomplish: I have several heaters controlled through labview using Labview's PID toolkit. This works great. I have no issues with DAQ in general. However, throughout an experiment, I want to change the set point of each heater. I could set this up fairly easily using either a timed loop or the wait vi if I knew exactly how many different set points there would be. If possible, I would like to be able to read in a config file that includes the different times and set points for all heaters and dynamically create a loop that can handle this. I have tried using the Elapsed Time vi with an array of time targets; however that didn't seem to work. Has anyone been able to do this? Does anyone know where I could learn about using LabView in this manner? All help is appreciated.
Write a tab-separated spreadsheet file makes it easy to use the write/read from spreadsheet files. Assuming you have a 2D-array of your times and set points it's just a question of setting up a for-loop going through the array row-by-row and extract the elements (expanded index array) to set your points and wait time.
/Y
LabVIEW 8.2 - 2014
"Only dead fish swim downstream" - "My life for Kudos!" - "Dumb people repeat old mistakes - smart ones create new ones."
G# - Free award winning reference based OOP for LV

Memory leak in Real-Time caused by VISA Read and Timed Loop data nodes? Doesn't make sense.

Working with LV 8.2.1 real-time to develop a host of applications that monitor or emulate computers on RS-422 busses. The following screen shots were taken from an application that monitors a 200Hz transmission. After a few hours, the PXI station would crash with an awesome array of angry messages...most implying something about a loss of memory. After much hair pulling and passing of the buck, my associate was able to discover while watching the available memory on the controller that memory loss was occurring with every loop containing a VISA read and error propogation using the data nodes (see Memory Leak.jpg). He found that if he switched the error propogation to regular old-fashioned shift registers, then the available memory was rock-solid. (a la No Memory Leak.jpg)
Any ideas what could be causing this? Do you see any problems with the way we code these sorts of loops? We are always attempting to optimize the way we use memory on our time-critical applications and VISA reads and DAQmx Reads give us the most heartache as we are never able to preallocate memory for these VIs. Any tips?
Dan Marlow
GDLS
Solved!
Go to Solution.
Attachments:
Memory Leak.JPG ‏136 KB
No Memory Leak.JPG ‏137 KB

Hi thisisnotadream,
This problem has been reported, and you seem to be exactly reproducing the conditions required to see this problem. This was reported to R&D (# 134314) for further investigation. There are multiple possible workarounds, one of which is the one that you have already found of wiring the error directly into the loop. Other situations that result in no memory leak are:
1. If the bytes at port property node is not there and a read just happens in every iteration and resulting timeouts are ignored.
2. If the case structure is gone and just blindly check the bytes at port and read every iteration.
3. If the Timed Loop is turned into a While loop.
Thanks for the feedback!
Regards,Stephen S.
National Instruments
Applications Engineering

How to pause and restart a timed loop in Labview

I am trying to pause and then restart a timed process (series of stepd that happen at precise times), which is implemented using a timed loop.
I was wondering if anybody out there can give me a hint.
Thanks

Roxanne,
Well, it's not exactly a "pause", but here's a way to stop and re-start your Timed Loop.
See the attached example in LV2010.
A While Loop and a Queue are used to allow you to start and re-start the Timed Loop.
The "Stop Timed Structure" vi is used to stop the Timed Loop.
Releasing the Queue stops the While Loop when you end the program.
Note that the example is very similar to the NI template "Producer/Consumer Design Pattern (Events)". (File>>New)
steve
Help the forum when you get help. Click the "Solution?" icon on the reply that answers your
question. Give "Kudos" to replies that help.
Attachments:
timed loop.vi ‏39 KB

Multiple timed loop question

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