Performance verification PXI 6608

Hi,
I have a question about the performance verification of the PXI 6608.
This is what I was able to perceive from the manual.
We have two modules:
CTR0: referenced to an external clock that has a minimum uncertainty of 0.75 ppb and generates a 400 s pulse to CRT1.
CTR1: is referenced to the internal 10 MHz OCXO and counts the number of cycles in that 400 s window: 400 * 10 MHz=4*10^9 . Any result different from this means an error.
Now to my understanding the performance verification is comparing the 10 MHz OCXO with the external clock. So by looking at the manual we have a uncertainty of 75ppb when the 10 MHz OCXO is on the slot 2: 0.75ppb * 10 MHz = +/- 0.75 Hz. BUT the performance verification assumes a tolerance of 0.1 Hz (10,000,000.1 < Hz < 9,999,999.9 Hz)
The calibration execute has the same approach as the performance verification,
Why does the PXI 6608 have a tolerance different from the manual?
Are we not testing the 10 MHz OCXO?

Hi,
Thanks for your suggestion but my Qauestion is lillte bit different.
1) We have Equipment master in PM module.
2) Calibration scenario already mapped in PM with maintainance oreder with "14" inpsection type.
3) This is related to performance verification which is different from Calibration scenario.
4) i dont understand that what we have to do in QA05?
5) I want another inspection lot for "Performance verification" except "14".
6) We have defined frequency with test paramater. e.g. HPLC have PV frequency 3 month, 6 month & 12 month with different test parameter.
7) now i want that at each time point, i required auto generation of inpsetcion lot with defiened inspection plan in QA32. After testing will be completed, we will give UD and declare as this Equipment is Qaulified.
It is different from Calibration scenario.
Calibration actvity done by PM member but perfomance activity monitor by QA (QM) person.
Pls help me to design this scenario.
Thanks & Regards,
Ms. Kruti Shah

Similar Messages

PXI-6608 specifications

Hi,
I have a question about the performance verification of the PXI 6608.
This is what I was able to perceive from the manual.
We have two modules:
CTR0: referenced to an external clock that has a minimum uncertainty of 0.75 ppb and generates a 400 s pulse to CRT1.
CTR1: is referenced to the internal 10 MHz OCXO and counts the number of cycles in that 400 s window: 400 * 10 MHz=4*10^9 . Any result different from this means an error.
Now to my understanding the performance verification is comparing the 10 MHz OCXO with the external clock. So by looking at the manual we have a uncertainty of 75ppb when the 10 MHz OCXO is on the slot 2: 0.75ppb * 10 MHz = +/- 0.75 Hz. BUT the performance verification assumes a tolerance of 0.1 Hz (10,000,000.1 < Hz < 9,999,999.9 Hz)
The calibration execute has the same approach as the performance verification,
Why does the PXI 6608 have a tolerance different from the manual?
Are we not testing the 10 MHz OCXO?

Hello,
In order to set the counter source to the timebase, you can use the the get/set/reset CI_CtrTimebaseSrc in order to set this in CVI. Please consult the DAQmx C reference Help for more information. Here are the functions if you can't find it in the help.
int32 __CFUNC DAQmxGetCICtrTimebaseSrc(TaskHandle taskHandle,
const char channel[], char *data, uInt32 bufferSize);
int32 __CFUNC DAQmxSetCICtrTimebaseSrc(TaskHandle taskHandle,
const char channel[], const char *data);
int32 __CFUNC DAQmxResetCICtrTimebaseSrc(TaskHandle taskHandle,
const char channel[]);
As for performing a loopback test to test its accuracy, this isn't the best way to do this because the source is creating a signal with relatively the same accuracy as you are reading in back on the same device. Knowing that this signal is accurate down to .7ppm, we need to apply a source for the counter that is much more accurate than this. First way to do this is to change the timebase source to the 10MHz clock like I mentioned above. The other way is to place the PXI-6608 in slot 2 so that it overwrites the 10MHz clock on the backplane. This 10MHz clock is used with PLLing the 80MHz clock that is normally used in counter tasks. Which slot do you have the PXI-6608 in? Could it be placed in this slot?
Jim St
National Instruments
RF Product Support Engineer

PXI 6608 Measure Frequency 1Hz with accuracy 1ppm

I need to measure a frequency of 1 Hz with accuracy less than 1 ppm
icant do it with a PXI 6608 its normal ?
1 Hz is measured 1,000007 Hz by a PXI 6608
in this case, the error is 7ppm but i need less than 1ppm, i should measure 1,0000007 to have 0,7 ppm
please help its so urgent !!!!!!!!!

Hello,
In order to set the counter source to the timebase, you can use the the get/set/reset CI_CtrTimebaseSrc in order to set this in CVI. Please consult the DAQmx C reference Help for more information. Here are the functions if you can't find it in the help.
int32 __CFUNC DAQmxGetCICtrTimebaseSrc(TaskHandle taskHandle,
const char channel[], char *data, uInt32 bufferSize);
int32 __CFUNC DAQmxSetCICtrTimebaseSrc(TaskHandle taskHandle,
const char channel[], const char *data);
int32 __CFUNC DAQmxResetCICtrTimebaseSrc(TaskHandle taskHandle,
const char channel[]);
As for performing a loopback test to test its accuracy, this isn't the best way to do this because the source is creating a signal with relatively the same accuracy as you are reading in back on the same device. Knowing that this signal is accurate down to .7ppm, we need to apply a source for the counter that is much more accurate than this. First way to do this is to change the timebase source to the 10MHz clock like I mentioned above. The other way is to place the PXI-6608 in slot 2 so that it overwrites the 10MHz clock on the backplane. This 10MHz clock is used with PLLing the 80MHz clock that is normally used in counter tasks. Which slot do you have the PXI-6608 in? Could it be placed in this slot?
Jim St
National Instruments
RF Product Support Engineer

How to reset the Terminal Count indicator on the PXI-6608

Dear Community,
Is there any way to reset the terminal count indicator on the PXI-6608? When I Use Get Attribute.vi I get the correct value the first time, but unfortunately (unlike DAQmx) reading the value doesn't reset it...
I'd like to keep track of how many times it has rolled over. And I don't want to use another counter to do that because I'd like to keep them free for other things.
Thanks!
Cas
Solved!
Go to Solution.

Traditional daq does not have a means to reset the terminal count indicator, as far as I know. One thing you might be able to do is change the "output mode" to "toggle" and then read the "output state" to determine rollovers by determining when the output state has changed during your application.
I hope this helps!
gus....

Live discussion on "EJB Performance Verification"

Empirix, the maker of the Bean-test EJB testing tool, is offering a
free one hour web event presentation called "Enterprise JavaBeans
Performance Verification". This event will be held this Friday
November 16th at 2pm EST.
To register for this web event or learn about about web events being
offering by Empirix, go to: http://webevents.empirix.com/Q42001/
Enterprise JavaBeans Performance Verification
Enterprise Java Beans (EJBs) are the central components in a
Java-based enterprise architecture solution. They contain the business
logic for an enterprise system and implement the communication between
the Web-tier and database tiers. EJBs typically are architected and
implemented for months before integrating with the Web-tier hardware
and software. Waiting to verify the scalability of the overall EJB
design and the efficient implementation until late in the software
project with a Web test tool is risky and may cause the entire
software project to fail.
Due to the important role EJBs play, performance testing of the EJB
architecture and implementation is critical during the entire design
cycle, the test cycle, application server tuning, and with any
hardware and software environment changes. Manual vs. automated EJB
component verification strategies will be discussed. During the
presentation, we will show how an example EJB will be scalability
tested using Bean-test, Empirix's automated EJB component test tool.
We will show how Bean-test automatically creates a test harness,
exercises an EJB under load, isolates a scalability problem, and
confirms an implemented correction to the scalability problem is
successful.

Note, there is a replay of this free web event on Monday, December
10th at 2pm EST for those who could not make it the first time.
Steve
[email protected] (Steven Kolak) wrote in message
Empirix, the maker of the Bean-test EJB testing tool, is offering a
free one hour web event presentation called "Enterprise JavaBeans
Performance Verification". This event will be held this Friday
November 16th at 2pm EST.
To register for this web event or learn about about web events being
offering by Empirix, go to: http://webevents.empirix.com/Q42001/
Enterprise JavaBeans Performance Verification
Enterprise Java Beans (EJBs) are the central components in a
Java-based enterprise architecture solution. They contain the business
logic for an enterprise system and implement the communication between
the Web-tier and database tiers. EJBs typically are architected and
implemented for months before integrating with the Web-tier hardware
and software. Waiting to verify the scalability of the overall EJB
design and the efficient implementation until late in the software
project with a Web test tool is risky and may cause the entire
software project to fail.
Due to the important role EJBs play, performance testing of the EJB
architecture and implementation is critical during the entire design
cycle, the test cycle, application server tuning, and with any
hardware and software environment changes. Manual vs. automated EJB
component verification strategies will be discussed. During the
presentation, we will show how an example EJB will be scalability
tested using Bean-test, Empirix's automated EJB component test tool.
We will show how Bean-test automatically creates a test harness,
exercises an EJB under load, isolates a scalability problem, and
confirms an implemented correction to the scalability problem is
successful.

Auto switch to BNC ref-in to replace backplane 10MHz if detected clock signal there with PXI-6608 on Slot2

Hi,
I m using chassis PXI-1045. The priority of backplane frequency is Slot 2 => Ref-In => Origin Backplane 10MHz.
But I wanted the backplane frequency to be in the priority order of Ref-In => Slot 2 => Origin Backplane 10MHz.
So,
It is possible to change the priority ? maybe by edit the config file somewhere else ?
If the priority is uneditable, is there any function/VI to disable the Slot 2 PXI-6608 from replace the backplane 10MHz ? (from LabVIEW interface) Let say disable the device without access to MAX ?
Thanks a loottt
BR,
engwei

Hi Eng Wei,
I've checked with R&D, and the priority of the clock selection is embedded in the firmware on the backplane. So unfortunately it is not possible to change the priority via software.
As far as the DAQmx functions are concerned, I did a check but was also not able to find any function that can disable the NI 6608 clock from being used to override the PXI backplane clock.
Is it a must that the NI 6608 be placed in slot 2, if it is not used to drive the backplane?
Best regards,
Victor
NI ASEAN

How Can I Driving the PXI Backplane Clock with a PXI-6608?

How Can I Driving the PXI Backplane Clock with a PXI-6608?
Is the PXI Backplane Clock the timebase of the PXI Trigger BUS?
How Can I use a PXI-6608 as the timebase of the PXI Trigger BUS?
Thanks!

Hi,
The 6608 must be in slot 2 of the chassis. Once you make a call to the DAQ driver, the OCXO on the 6608 will be routed to the PXI_Clk 10 line.
More information on the backplane and routing clock signals can be found in these Knowledge Bases:
http://digital.ni.com/public.nsf/websearch/5EC370419A5ECA7A86256CFC0061C528?OpenDocument
http://digital.ni.com/public.nsf/websearch/D5B8D4D3B67DF1E086256BF8007BBF93?OpenDocument
I hope this helps. Have a Great Day!
George

How To output the PXI-6608 OCXO to PXI_CLK10_IN

Hi!
I am trying to make high accuracy measurements with the PXI-6608.
I am using a 3rd party PXI backplane which has no StarTrigger slot that would override the PXI_CLK10 automatically with the PXI-6608 OCXO output PXI_CLK10_IN.
It appears that the PXI-6608's OCXO has no direct link to the time source of the counters but that instead the time source can "only" be PLL-synced to PXI_CLK10 signal of the backplane. Is this correct?
I tried to measure the high accuracy OCXO output on PXI_CLK10_IN but got nothing. What needs to have the PXI-6608 output its OCXO clock to PXI_CLK10_IN?
ThanXs for your help, Hezapeter

By connecting the OCXO to the PXI_CLK10_IN, you are overriding the PXI clock to make a more accurate reference clock. So anything that is using the PXI clock at a reference will become more accurate. I believe you have to set the source reference clock for the DAQmx tasks to the PXI clock in order to get this benefit.
But here's how you connect the OCXO to the PXI clock.
There are only two ways to tell somebody thanks: Kudos and Marked Solutions
Attachments:
Connect Clock.png ‏9 KB

Strange number from pxi 6608

We are using the PXI 6608 card with a six channel system
involving counters. When we run the program we get a very large count,
somewhere around 40million, and it the same number every time. The problem is
that there is no way that can be a real count. We do get other counts that seem
to be actual data but every couple of cycles this large number occurs .Our
counters our connected to a kill switch, programmed in LabVIEW that will cut
the power to the counters if they reach the maximum number of counts we have
set. We know the kill switch is working because we have measured counts that
cut the power. However, when this large number comes up nothing happens and the
counters remain on and our limit is set far below 40million. Has anyone seen
this or other instances like it?
Thanks

Hi,
At the moment I am not sure why your problem is occuring but am happy to look into the matter for you when I have a bit more information.
What version of LabVIEW are you using?
How is the PXI system set up? For example are you connecting remotely from a host PC using LabVIEW realtime or are you booting the system into windows?
Would you be able to provide an example VI and any project files that demonstrate the problem?
Tom Clark
Message Edited by ThomasC on 08-06-2008 11:01 AM
Applications Engineer
National Instruments UK & Ireland

PXI-6608: Typical accuracy & stability for a 10 Hertz pulse-train output ?

I need to generate a very accurate and stable
10 Hertz continuous pulse-train for a test system.
What typical frequency accuracy & stability
can expect to achieve from the PXI-6608 for
a generated 10 Hertz continuous pulse-train.
I have read the specs ... just want to make
certain I am interpreting them correctly.
Thanks!

Hello there!
Though this was long time ago already I need confirmation on the same kind of calculations.
(However, in my case, I am measuring frequency, not reading, also with the 6608)
I thought the stability of 6608 OCXO was 75ppb per year (or 45ppb as stated in the OCXO notes). So therefore 11.25ppb/day. Not 0.45ppb/day.
In any case, if the stability of the OCXO is 75ppb :
- Stability on the 10Mhz clock: 10,000,000*75/1,000,000,000 = 0.75Hz
The question is, if you measure a 10Hz signal with this device, will you have a 0.75Hz accuracy? Or would you have the accuracy of the clock that you use to MEASURE (using a 100Khz timebase):
- Stability on time base: 100,000*75/100,000,0000 = 0.0075Hz
So apart from my measurement error (according to http://zone.ni.com/devzone/cda/tut/p/id/3619) I have to add up this error like this:
TOTAL ERROR = MEASUREMENT ERROR + CLOCK ERROR = X + 0.0075hZ
Being XX the calculated error made by the frequency estimation algorithm.

Simple performance verification

I wish to do a simple performance verification on 6035E and 6034E cards as follows: Input a 2Vpp 1kHz square wave into each analog input on the BNC-2110. Can anyone tell me what tolerances I might allow when viewing the results on the monitor using the scope function?
Thank you,
Jim

Hello Jared, and thank you for replying.
The VIs that we use in the scope program to make measurements are:
AI Acquire Waveform.vi
Amplitude and Levels.vi
Extract Single Tone.vi
We have also selected a +5 to -5 Volt range.
I must admit to being confused by NI's published specs on these boards, that is why I am hoping to have a more familiar spec like 2Vpp +/- xx and 1 kHz +/- xx.
Thank you again,
Jim
Hello,
I am unfamiliar with Scope function that you mentioned. Maybe if you could shine a little more light on this I might be able to better help.
When you say tolerance of a measurement, I'm going to think you are looking to find some specifications for your device. You can find some of the published accuracy numbers accuracy for your devices in the E Series User Help file.
If I'm totally missing on what you really want to know, post back and I'll have a look.

PXI 6608 80 MHz timebase

I have a PXI system with a 6608 timer device in slot 2 and a 5122 digitizer in slot 3. I know that the 6608 has an internal 80 MHz timebase, and I would like to use this timebase as a clock source for the 5122 using LabVIEW. I would prefer to route the timebase internally through the PXI backplane or a RTSI line, but would accept routing the timebase to something like PFI 0 and wiring it externally to the digitizer CLK IN. I have not been able to learn how to route the timer's 80 MHz timebase to another line that the digitizer can use for a clock source, and I have not learned how to use any digitizer external clock source but CLK IN and PXI Star. Any help would be appreciated in learning any of these things.

Please see this post.
Regards,
Natasa

Ni pxi 6608 programs for timestamping

can any one give sample programs for time stamping using ni6608 in vc++ by using gps and without gps .with reference to system clock.and also drivers for ni6608

Hi,
I believe that this Devzone article provides a great tutorial performing exactly what you wish to do. I hope this helps.
JaceD
Signal Sources Product Support Engineer
National Instruments

Doing something the DAQmx way that doesn't fit? (Triggered counter on PXI 6608)

Hi,
I want to create a counter with my PXI6608 that is triggered with an external input, then counts up. I then want to be able to read the count in LabVIEW and hence determine the time since the trigger. I have achieved this before with old-style code, but it is not clear how to do it the DAQmx way. In particular, I can't create a task because what I'm looking to do doesn't seem to fit in with any of the pre-envisaged DAQmx task templates.
Can anyone help? I'm assuming there's some way to create an 'empty' DAQmx task so I can fill in the details with property nodes?
Cheers
Lee
Solved!
Go to Solution.

You'll want to make an edge count task and set the source to be one of the internal timebases using a DAQmx property node (set it before starting the task):
The trigging functionality you're looking for is called an "arm start trigger" in DAQmx. It's configured through a property node (also before starting the task):
I'm not sure what you're getting at with regards to the "empty" DAQmx Task. Typically you'll use the standard API to set typical properties and the property nodes for more advanced functionality so you'll end up with a combination of the two. In many cases you could replace the DAQmx API with property nodes (for a fun example of this, open up the DAQmx Timing VI), but odds are you might be forgetting something important so I would always suggest using the VIs and then tacking on property nodes for additional functionality when necessary.
If you're using LV 2012, this example should get you started (or if not, the picture still shows you what the task would look like).
Best Regards,
John Passiak

What is the recommended way to perform tape verification?

I currently have 12 protection groups with a total of about 30 protected members. I have the "Check backup for data integrity (time consuming operation)" option enabled for all jobs. The problem is with the way that DPM 2012R2 performs
verification. Here is the chronology of backing up an SCCM server's SQL databases that I just witnessed:
The summary of what DPM did is as follows:
write and verify approximately 5.6 GB of data
unload and load the same tape 8 times
elapsed time: 43 minutes, 6 seconds
average data rate: 2.2 megabytes per second
When doing verification DPM unloads and loads the same tape once for each protected member. Obviously this doesn't scale. Furthermore, these unnecessary cycles of the tape loading mechanism will reduce the life of the tape library because
the mechanism has a mean time before failure measured in tape load cycles. So the question is, what is the currently recommend practice for achieving tape verification with DPM 2012R2?
I have
read here that "Tape verify jobs should be scheduled to start after all the tape backups jobs finish." Is the corollary to this statement to "disable Check backup for data integrity" on all protection groups? Also, if
this is indeed the recommended practice, then how, exactly, do you "schedule a tape verify job to start after all the tape backup jobs finish"?
Thanks for your help,
Alex

Ugh. This is looking pretty awkward. Here are the facts as I see them. If you want to verify that the entire contents of a tape was correctly written you have three options:
enable "Check backup for data integrity (time consuming operation)" for each PG that is written to the tape
run Test-DPMTapeData for each recovery point on the tape
recover each recovery point on the tape
Each and every one of these options results in a minimum of one tape load and unload cycle per recovery point. I am using a Dell TL2000 tape library and DPM 2012R2. Based on the example in my original post, DPM was able to load, verify, and unload
6 recovery points in 32 minutes for a rate of approximately 11 recovery points per hour. If you are doing daily tape backups, then the absolute highest number of recovery points you can ever expect to verify is 11*24=264 recovery points. This is
so even if all of those recovery points are on a single tape and is a best-case scenario assuming 100% of the duty cycle of the tape library is dedicated to verification, which of course would never be the case in real life.
If I have made a factual error here please correct me. Assuming I have these facts correct, we can conclude the following:
Using DPM 2012R2 there is no possible method to comprehensively verify the contents of daily tape backups if there are more than approximately 250 recovery points per day.
Above that limit, the most verification you could hope for is spot-checking. Furthermore, the life expectancy of a tape library is likely to be reduced to months from years if it is performing 250 tape load cycles every day. This is rather an
unacceptable result for an enterprise-class backup system. The solution is straightforward: DPM should provide a means of verifying, copying, or recovering all recovery points on a single tape in a single load/read/unload cycle.
Am I missing something here? I just don't see how any form of substantial tape backup verification can work using DPM in its current form at scale.
Alex

Performance verification PXI 6608

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