RTSI implemention between FPGA and PXI controller

I have a need to be able to send and receive data from a r-series modules. I note these have an RTSI bus (PXI form). I am looking to implement this bus so I can pass results to a PXI controller and send new settings (info for PWM), can someone point me at an article as I have been looking for a while now to no avail.
Many thanks
Please remember to accept any solutions and give kudos, Thanks
LV 8.6.1, LV2010,LV2011SP1, FPGA, Win7

To pass data from an FPGA depending on the data type it is common to use a FIFO as R series cards tend to gather data faster than most devices can handle so the buffer is used so data isnt lost. If you could post some example code I would be happy to point you in the right direction.
Matthew Trott
Applications Engineer
National Instruments UK
www.ni.com/ask

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    "the LWAPP Control and Data messages are encapsulated in UDP packets that are carried over the IP network. The only requirement is established IP connectivity between the access points and the WLC. The LWAPP tunnel uses the access point's IP address and the WLC's AP Manager interface IP address as endpoints. The AP Manager interface is explained in further detail in the
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  • What are the differences between CompactRIO and PXI-RT?

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    00:40:9d:33:eb:4b 130 Associated 6 Yes
    00:40:9d:31:22:1d 130 Associated 6 Yes
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    Thu Feb 26 18:54:10 2009: mell9s1ap4: 0040.9d33.eecb 192 6 0000 2800000FF 7195/7200 0-0 10111 200 0-10 10000000 016
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    hi Leo,
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    regards
    Joe

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