Software Master Clock?

Is there such a thing as a Software Master Clock for recording studios? I'm talking about the Clock that syncs all digital hardware such as converters. There is a super-precise clock inside every computer, so it's odd to have to rely on an external hardware clock...

do you mean a software version of something like this:
http://www.apogeedigital.com/products/bigben.php
if that's what you mean, it's an interesting idea.. you could dedicate an old computer like a demoted G4 to the task, instead of buying a dedicated unit.
I've not heard of any software like this.. but one would think that someone like apogee could certainly make a software version of big ben, even with a PCI card. it might end up cheaper for them to put on the market, and given that studios turn over computers a fair bit these days it might have a demand.

Similar Messages

  • How do I set the master clock output frequency on the PCI-1424?

    I want to use the master clock to generate the pixel clock to the imaging chip.

    Hi,
    We have tried everything to be able to set the Master Clock Frequency (please confirm pins 89 and 90 on the 100 pin connector). Everything we try including opening NI supplied camera files sets the Master clock to 40MHz.
    You're code however does do something, the Master clock frequency is set to 5MHz when we open a camera file with your code included. All the attributes show up in MaX but changing the values from Max has no effect, and the frequency remains at 5MHz. We undertake an apply and snap after each change of value with no effect.
    Am I missing something as the command OnBoardClock is supposed to be used to set the Master Clock Frequency, but you don't use that in your text at all. I would appreciate an explanation of the text yo
    u use, if you have the time, as I cannot find any reference to how the software knows what "Frame Grabber Clock" is.
    Thank you in advance for your help.
    Andy

  • What should the Master Clock be set to when using the Rode NT-USB Microphone? (Audition)

    Re: Adobe Audition
    Just received a Rode NT-USB and curious as to what Master Clock is and what it should be set to in Audtion CC for the NT-USB mic under Preferences > Audio Hardware.
    *I do not see an Audition Support Forum, reason for posting in PP CC.

    It's listed in the "Communities" box to the right side of the PrPro "Overview" tab page ...
    Audition CS5.5, CS6 & CC
    Neil

  • Master Clock synchronization fix?

    When i was recording some audio in Audition, I kept on getting a strange feedback effect, like a slight delay repeating everything at a much lower volume. I tracked  the problem down to Master Clock being set to the wrog device, speakers instead of the mic.
    Anyway, my question is: Is there a way to remove/reduce that feedback from an already recorded file? Is there some kind of filter or trick I can use to correct this?
    Here's ther link to a sample of the audio: http://beyourownmom.com/problem.mp3
    Thank you so much in advance!

    It is highly recommended that the system clocks on the hosts where the OMSes, Repository, and agents reside are synchronized. Among other things, clock synchronization facilitates incidents and events tracking. See Support note 359524.1 for more information.
    Regards,
    - Loc

  • Where to get Toshiba software providing clock/city temp/rate details

    I used to have a Toshiba programme on my A660 laptop where I could see instantly the clock, temp. in my city, Rates of Exchange, etc. but I have lost it due hard-drive fell and wondered if someone knows what it's called so I can re-download it ?
    Thanks

    All Toshiba tools and utilities can be downloaded from Toshiba EU driver page
    http://www.toshiba.eu/innovation/download_drivers_bios.jsp?service=EU
    I assume you are talking about software or utility which was part of the Toshiba image.
    The Toshiba image is a package containing the Widows system, Toshiba driver, Toshiba tools as well as other 3rd party software.
    Im not quite sure if the described software was developed by Toshiba or by 3rd party company.
    In case its Toshiba software, you will find it on the Toshiba driver page as mentioned above.
    Would recommend you to check the Service Station, Bulletin Board, Bulletin Board Assistant or Toshiba ReelTime
    But if such tool was developed by 3rd party company, you will not be able to download such tool anymore due to copy right rules.

  • K7 Master & Clock multipliers

    I recently upgraded the cpu on a MS 6341 to an XP 2000.  The bios was sucessfully flashed from ver. 1.1 to ver. 1.5 prior to the installation.  
    After clearing the CMOS, my PC boots reading the new CPU as an Athlon 1250.  If I attempt to adjust the cpu frequency and ratio at all, the system hangs ( all 4 red on d-led )  Also, the correct multiplier (12.5) is not available in the list of ratios.
    Any help or suggestions would be greatly appreciated.
    BG

    PCB version 1.1
    Quote
    Originally posted by wonkanoby
    what pcb revision
    http://www.msi.com.tw/program/support/cpu_support/cpu/spt_cpu_detail.php?UID=93%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20%20&NAME=MS-6341

  • How do I use the PXI_clk10 backplane clock? It's not there!

    Hi, folks!
    This might seem a trivial question, but I'm completely at a loss here. I have made an RT-project in LV8 which (among other things) samples data continuously from two cards located in a PXI-system. All 32 (16+16) differential channels are used and one task for each card is configured in MAX. Since signal phase is an issue, I need to synchronize both tasks accurately. The lv8 code examples have a couple of VIs that should have been directly applicable to my situation, and I have studied them (and lots of others) in detail.
     I have attached one example below that seemed to be spot on, and it makes use of the external PXI_Clk10 clock located in the pxi backplane. Here the confusion starts. When you attach a constant to the "source" input of the "sample clock" VI you get a drop-down list of possible sources. In the example code, PXI_Clk10 is chosen in this list, but when I try to do the same I discover that this option is simply not present. Only internal timing sources (located on the cards) can be chosen. If I configure the timing of the tasks directly in MAX, the PXI_Clk10 is an available option, but this leads to a vague error message when I start the tasks saying roughly that "it might be that you did not specify a name for the external sample clock...".
    I have tried everything. My PXI-settings in MAX, routing signals via PFI-pins (didn't work at all), etc etc.
    What is going on? Also: when routing a signal through a pfi-port, does this necessitate connecting the pfi-connectors physically or is the signal routed internally through the backplane? It doesn't help that I use BNC-2110 connector blocks. How can I be sure that the connectors on these blocks actually correspond to the terminals on the cards? I can't find a wiring diagram anywhere on the web.
    Some facts: PXI-1031 chassis with PXI-8184 controller (dual boot) and two cards PXI-6229 / PXI-6259. These cards are located in slot 3-4.
    Regards, Einar
    Attachments:
    Multi-Device Synch-Analog Input-Cont Acquisition.vi ‏77 KB

    All PXI chassis produce PXI_CLK10 on the backplane (from an on-board 10 MHz oscillator), and most of them can also receive a 10 MHz clock from Slot 2 and broadcast that on the backplane. Some models can receive 10 MHz from a BNC connector on the back. Similarly, both 10 MHz and 100 MHz clocks are always available on PXI Express chassis.
    Unfortunately, the 6143 and 6133 have no provision to connect to PXI_CLK10. This is likely because the master clock on those boards is 20 MHz, and there may not have been board space or room in the cost budget for a PLL to lock it to 10 MHz. Many other PXI products can use PXI_CLK10, such as the 6120. There is a list of products which use CLK10 and other PXI features here:
    http://digital.ni.com/public.nsf/allkb/F4AD3B87DC8CD62E862571E3007042E5
    I suspect this list is a little outdated; perhaps someone reading this knows where a more updated version is.
    Hope this helps,
    Ed

  • Multiple PRI ports clocking issue

    Hello,
    We have a 3845 with 2 VWIC2-2MFT-G703 cards. The router is between Telcos and another 3945. 
    This router acts as a forwarder, fax gateway, etc. We are working with 2 Telcos and we are getting voice service.
    3845 has 4 PRI ports. 2 of them are connected to Telcos and they are on the first VWIC2 card and the other 2 is connected to 3945 which is the main device for our IP Telephony.
    Telco1----           -----
                     3845         3945
    Telco2----           -----
    I have the following commands for network clock:
    network-clock-participate wic 0
    network-clock-participate wic 1
    network-clock-select 1 E1 0/0/0
    network-clock-select 2 E1 0/0/1
    Telco1 has no slip errors since it is the master clock source.
    Telco2 has slip errors since we are using Telco1's clock
    We can not use clock source line independent since this is a voice line.
    3845 acts as network side for the connections between 3845 and 3945. We do have slip errors on these connections as well.
    Unfortunately I do not have access to 3945 router.
    Any ideas to get rid of slip errors?
    Here is E1 controllers status:
    E1 0/0/0 is up.
      Applique type is Channelized E1 - balanced
      No alarms detected.
      alarm-trigger is not set
      Version info Firmware: 20100222, FPGA: 13, spm_count = 0
      Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.
      Data in current interval (238 seconds elapsed):
         0 Line Code Violations, 0 Path Code Violations
         0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
         0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
      Total Data (last 24 hours)
         0 Line Code Violations, 0 Path Code Violations,
         0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
         0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
    E1 0/0/1 is up.
      Applique type is Channelized E1 - balanced
      No alarms detected.
      alarm-trigger is not set
      Version info Firmware: 20100222, FPGA: 13, spm_count = 0
      Framing is CRC4, Line Code is HDB3, Clock Source is Line.
      Data in current interval (239 seconds elapsed):
         0 Line Code Violations, 0 Path Code Violations
         30 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
         30 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
      Total Data (last 24 hours)
         0 Line Code Violations, 0 Path Code Violations,
         10938 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
         10938 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
    E1 0/1/0 is up.
      Applique type is Channelized E1 - balanced
      No alarms detected.
      alarm-trigger is not set
      Version info Firmware: 20100222, FPGA: 13, spm_count = 0
      Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.
      Data in current interval (238 seconds elapsed):
         0 Line Code Violations, 0 Path Code Violations
         84 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
         84 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
      Total Data (last 24 hours)
         0 Line Code Violations, 0 Path Code Violations,
         30432 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
         30432 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
    E1 0/1/1 is up.
      Applique type is Channelized E1 - balanced
      No alarms detected.
      alarm-trigger is not set
      Version info Firmware: 20100222, FPGA: 13, spm_count = 0
      Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.
      Data in current interval (239 seconds elapsed):
         0 Line Code Violations, 0 Path Code Violations
         53 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
         53 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
      Total Data (last 24 hours)
         0 Line Code Violations, 0 Path Code Violations,
         4259 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
         4259 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

    If the appropriate IOS images are used with all the supported hardware, then there should not be any issues. Guess, you have enough memory too for the required images.

  • Z781 changed clock, will not start :(

    greetings,
    I foolishly changed the master clock (?) from default of 100 MHZ to 110 MHz, using the MSI supplied tuning tool.
    The unit now does not start. It tries to start for a few seconds, shuts off, and oscillates.  i7  3.7Ghz
    Since it does not start, i can not set the clock back to 100 MHZ.
    so, what do I do,
    thanks, alan
    ps.  I do have a small (300w) power supply for it.  No graphics card

     Do a clear CMOS to revert BIOS settings to default. Max setting for the Bclk is 5 (105) and usually will have problems if going over 3 anyway.
     >> Clear CMOS Guide <<

  • Synching external clock

    i have a presonus firepod and a mytek a/d converter. How do I get logic to recognize the mytek device through spdif?

    You'd typically tell the interface where the master clock is coming in or internal - from it's own controller/app. Some low end i/fs don't support this.
    J

  • NI6682H using IEEE1588 Clock to synchronize Boardtime

    Hello,
    I'm working with NI 6682H. I want to use IEEE 1588 Clock to synchronize the board time.
    If I understand correctly  I've to configure it for SLAVE.
    What I don't understand is how I can do it.
    I've seen through the examples and wrote some code, which works but the Clock is running as MASTER.
    My second question would be: how/where can I specify the Source for the MASTER-Clock (URL, IP, ...).
    My thrist question: where can I find the MAC Adresse of the RJ45 Port on the Module. I didn't finde it MAX or VI/Propertynodes.
    best regards
    christian

    Hi Christian,
    yes i think you've understand it correctly but you need an IEEE 1588 Master, if you want to use the NI6682 Module as Slave.
    I've attached you a Master VI and a Slave VI. There you can see that the Master is using the "Send Time to UDP" function and the Slave the "Get Time from UDP" Function.
    You don't need to specify the Source of the Master Clock, because for the communication the UDP Protocoll is used. The Master and the Slaves only need the same UDP Port to communicate together.
    http://www.ni.com/white-paper/4950/en/
    I think you can find the MAC-Address of the Module on a Label that is attached to the 6682H Card. And i found an example to programmaticly get the IP & MAC Address: https://decibel.ni.com/content/docs/DOC-15459
    Regards,
    Stefan
    Attachments:
    Generate Sync Clock-Slave.vi ‏32 KB
    Generate Sync Clock-Master.vi ‏67 KB

  • AI/AO at different frequency

    Hi,
    As a newbie, I met a problem when I tried to input and output analog signal at different frequency.
    I followed PID-control-Multichannel.vi to build a control program, so input/output can be synchronized. However, the project requires that the AI frequency to be ten times of the AO. I could rewrite the while loop to make the output value constant for 9 of 10 cycles. However, I believe there is more straight forward way to do it.
    Could anybody provide an example?
    Thank you in advance.
    Sincerely yours
    Ming 
    Solved!
    Go to Solution.

    lmuri wrote:
    Hi,
    As a newbie, I met a problem when I tried to input and output analog signal at different frequency.
    I followed PID-control-Multichannel.vi to build a control program, so input/output can be synchronized. However, the project requires that the AI frequency to be ten times of the AO. I could rewrite the while loop to make the output value constant for 9 of 10 cycles. However, I believe there is more straight forward way to do it.
    Could anybody provide an example?
    Thank you in advance.
    Sincerely yours
    Ming 
    Hello Ming!
    Thank you for using the NI Forums. You'll be glad to know that DAQmx allows I/O tasks such as these to be ran not only concurrently but also at different rates.
    The problem with the solution you've devised is that this implementation will remove the delegation of the tasks down to the hardware level and your program would become software driven; this becomes problematic when running data acquisition tasks at very high speeds as you become limited to the output speed of your Operating System (OS).
    You can co-ordinate your tasks to operate synchronously and perform output and acquisition at different rates by creating a task master. This generally means that you configure a task through DAQmx that maintains a clock frequency and you create tasks which use this clock frequency, or a division of it, to operate at their own individual frequency. This will ease not only the implementation of synchronous DAQmx tasks but also provide an entirely hardware driven solution to maximimse performance.
    Through LabVIEW, if you go to Help > Find Examples to open the NI Example Finder. If you browse through Hardware Input and Output > DAQmx > Synchronization > Multi-Function > Multi-Function-Synch Dig Read Write With Counter.vi, you will find an example of how to configure a Counter as a task master to control the operation of both a Read and Write operation. (This example shows a digital implementation but may be easily replaced with analogue.)
    By setting the counter rate to the maximum frequency that you will require for your task (In this case, the speed at which you want to output values) and applying it to the output task SampleClock, you will drive the output task clock with the Counter as the clock source. You can then use the Counter as the source for the SampleClock for the input task, however set the rate to whatever division of the driving frequency you want. In the case of your example, you can set the input rate to 0.1 times the Counter Frequency to acquire at a 10th of the rate.
    If you wanted to acquire at the same rate but only retrieve values at the 10th of the speed, this same solution could be configured to instead produce a trigger to return a buffered acquisition. With a master clocking task, the opportunities are endless!
    I hope that you find this helpful, and if you need any more clarifcation don't hesitate to let me know. Have fun with your DAQ!
    Alex Thomas, University of Manchester School of EEE LabVIEW Ambassador (CLAD)

  • Recording from minidisc to Logic pro 7 via an fa-66

    Hi, I'm having issues recording from a sony minidisc deck through my edirol fa-66 to my macbook. I've tried the various anologue inputs on the fa66, the 1/4 jacks and the RCA inputs on the back. With the anologue it's sounds fine until I arm the track to record, then it starts jumping and phasing. Same with the optical input, I press the "Digital sync" on the fa-66, without the "R" record armed it sounds fine, when I arm it the sound starts jumping and a message comes up "saying sample rate not recognised- Sample rate 3674"
    The minidisc was recorded from a PA at I assume the satndard rate for mnidisc players of 4100Khz.

    If you are using the Digital input (SPDIF) to record from MiniDisc then you are correct that it is 44.1Khz, but are you ensuring that the SPDIF input is set as the master clock? You will need to ensure that is so whilst you record digitally from it.
    I can't fanthom why you might be have a problem recording from the analogue outs though. The phasing sound you describe sounds like you are hearing the original sound plus the slightly delayed sound due to software monitoring perhaps?

  • Recording from minidisc to creative player with an x

    I tried recording from my?minidisc onto my computer with the x-fi card, through the line-in and mic jacks. When I stop recording and turn off the source, I still have the record volume showing some input even though nothing is on. I?even?tried disconnecting the minidisc from the input jack but the player is still showing some input. This is causing my recording to have a steady interrupting noise every quarter of a second or so. Any ideas where to search for this mysterious input or how to get around this problem.Louis?

    If you are using the Digital input (SPDIF) to record from MiniDisc then you are correct that it is 44.1Khz, but are you ensuring that the SPDIF input is set as the master clock? You will need to ensure that is so whilst you record digitally from it.
    I can't fanthom why you might be have a problem recording from the analogue outs though. The phasing sound you describe sounds like you are hearing the original sound plus the slightly delayed sound due to software monitoring perhaps?

  • Problems with Games Center after latest update

    Dear All
    I have never used, or wanted to use, the 'Games Center' pre-installed on my iPhone. After the recent software update I now find that all my games have shifted themselves into this utility such that everything greets me with 'welcome back....' etc. I didn't want this but figured it was unavoidable. I have the 'Inception' app - I bought it when it first came out and have all the dreams associated with it (except 'Africa') which takes some time and effort. I opened it yesterday and all the dreams have simply disappeared, likewise 'achievements' in Angry Birds (not that I know what they are anyway).
    PLEASE, PLEASE someone... how do I remove games from the clutches of the Games Center and get my old games back - especially the 'dreams' in Inception which has really p....d me off since I love using that app!
    Thank you....
    Karen

    Possible solution here...
    I have an aggregate of two interfaces with 16 channels. I can address now all inputs an outputs, but the slave interface doesn't meter anything and i don't hear anyting on the outputs routed to the slave interface. Also some debug output is printk'ed:
    AM824NuDCLRead::Start() failed: 0xe0008020
       Finally, after a night long research, it is working as proposed.
    My setup now en detail:
    Mac Book Pro 2,4Ghz/3GB RAM/OSX 10.5.4
    2 lynx aurora 8 / LTFW
    1 Lynx / Internal Clock
    2 Lynx /External Clock (via 75 ohm cable)
    Uplink of the devices with a gold fw cable.
    Link to the 1394a port via gold cable to the mac book.
    I use an aggrgate of two devices 16/IN 16/OUT.
    Problem was:
    No sound on the slave Interface.
    Problems that i found out:
    Never run pppd via WLAN in the background.
    A crosseffect letting the Systems Panel die and the devices are not accessbible.
    After turning off wlan (dectivate) the interfaces are accessible again.
    A weird crosseffect i mean.
    Problem in the Audio-Midi Setup -> aggregate device:
    BE SURE TO SELECT THE MASTER INTERFACE AT FIRST, OTHERWISE THE PLIST FILE IS WRONG, SINCE THE CLOCK HAS ALSWAYS ID 0 IN THE PLIST FILE.
    IF SELECTING THE SLAVE FIRST  AND THEN SELECT THE MASTER CLOCK, THE PLIST FILE IS WRONG. CAUSE THE MASTER CLOCK IS THE SLAVE AND HAS ID 1 , WHICH IS ACTUALLY WRONG.
    Hidden File with aggr. config: /Library/Preferences/.GlobalPreferences.plist
    To view copy the file in your home dir in the console like: cp  /Library/Preferences/.GlobalPreferences.plist ~/test.plist.
    Open the property list editor and select Your home directory.
    View the properties.
    SO, SELECT THE FIRST DEVICE AS MASTER CLOCK AND THEN THE RIGHT INTERFACE HAS ID 0. THEN SELECT THE SECOND ONE.
    NO TROUBLES IN THE KERNEL ANYMORE. NO ATCP TIMEOUTS:-))
    This solutions works for me now.
    http://www.lynxstudio.com/forum/forum_posts.asp?TID=2250&title=two-aurora8-with- logic-8

Maybe you are looking for

  • Query Performance and reading an Explain Plan

    Hi, Below I have posted a query that is running slowly for me - upwards of 10 minutes which I would not expect. I have also supplied the explain plan. I'm fairly new to explain plans and not sure what the danger signs are that I should be looking out

  • Mac Mini and IMac

    I have a 20' G4 Imac and would really like to upgrade it as I love the design. Is it possible to hook up a Mac mini so that one just uses the IMac as a display and gets the benefit of the processing power of the mini??

  • User authorization query/report

    Has anyone determined a method of printing a query or report of all authorizations for a user? From reading SOX requirements, this appears to be standard in almost every company yet there does not appear to be a way to do it in Business One.

  • Matching 2 Data Sets

    Hello - I am trying to match up 2 separate sources of data. For example, let's say I have a set of wine data that is categoried by varietal, region, year, winery, etc. And let's say I get a 2nd set of wine data that is not categorized. I was thinking

  • GENERIC ERROR COMING RUNNING A PACKAGE

    Hi friends, I have a package and under that many procedures has written. When i am trying to add a new procedure and compiling it, it is compiling correct but when i am trying to run it, it is throwing error as ORA-04063: package body "DEV.NEW" has e